From: Varun Gupta <varun.gupta@intel.com>
To: igt-dev@lists.freedesktop.org
Cc: priyanka.dandamudi@intel.com, andrzej.hajda@intel.com
Subject: [PATCH i-g-t v3 1/2] tests/intel/xe_prefetch_fault: refactor test to accept shader function pointer
Date: Tue, 18 Aug 2026 22:42:41 +0530 [thread overview]
Message-ID: <20260818171239.277897-5-varun.gupta@intel.com> (raw)
In-Reply-To: <20260818171239.277897-4-varun.gupta@intel.com>
Parameterize test_prefetch_fault() to accept a shader getter function
pointer instead of hardcoding get_prefetch_shader(). This enables reuse
of the same test logic with different shader configurations (e.g., L2
prefetch fault shaders) without duplicating the test function.
No functional change for existing subtests.
Signed-off-by: Varun Gupta <varun.gupta@intel.com>
---
tests/intel/xe_prefetch_fault.c | 23 +++++++++++++++--------
1 file changed, 15 insertions(+), 8 deletions(-)
diff --git a/tests/intel/xe_prefetch_fault.c b/tests/intel/xe_prefetch_fault.c
index d3b5aff47..e86cd68d9 100644
--- a/tests/intel/xe_prefetch_fault.c
+++ b/tests/intel/xe_prefetch_fault.c
@@ -117,9 +117,11 @@ static struct intel_bb *xe_bb_create_on_offset(int fd, uint32_t exec_queue, uint
return ibb;
}
+typedef struct gpgpu_shader *(*get_shader_fn)(int fd);
+
static struct gpgpu_shader *get_prefetch_shader(int fd)
{
- static struct gpgpu_shader *shader;
+ struct gpgpu_shader *shader;
shader = gpgpu_shader_create(fd);
gpgpu_shader__prefetch_fault(shader, xe_canonical_va(fd, PREFETCH_ADDR));
@@ -130,14 +132,17 @@ static struct gpgpu_shader *get_prefetch_shader(int fd)
/**
* SUBTEST: prefetch-fault
- * Description: Validate prefetch fault and hit-under-miss behavior
+ * Description: Validate L1 prefetch fault and hit-under-miss behavior with
+ * L1 cached, L2 cached cache policy (fault source: LSC)
* Run type: FULL
*
* SUBTEST: prefetch-fault-svm
- * Description: Validate prefetch fault and hit-under-miss behavior in SVM mode
+ * Description: Validate L1 prefetch fault and hit-under-miss behavior in SVM
+ * mode with L1 cached, L2 cached cache policy (fault source: LSC)
* Run type: FULL
*/
-static void test_prefetch_fault(int fd, struct drm_xe_engine_class_instance *hwe, bool svm)
+static void test_prefetch_fault(int fd, struct drm_xe_engine_class_instance *hwe,
+ bool svm, get_shader_fn get_shader)
{
uint64_t bb_offset = BB_OFFSET;
/*
@@ -191,7 +196,7 @@ static void test_prefetch_fault(int fd, struct drm_xe_engine_class_instance *hwe
ibb = xe_bb_create_on_offset(fd, exec_queue_id, vm, bb_offset, bb_size);
intel_bb_set_lr_mode(ibb, true);
- shader = get_prefetch_shader(fd);
+ shader = get_shader(fd);
gpgpu_shader_exec(ibb, buf, w_dim.x, w_dim.y, shader, NULL, 0, 0);
gpgpu_shader_destroy(shader);
intel_bb_sync(ibb);
@@ -225,7 +230,7 @@ static void test_prefetch_fault(int fd, struct drm_xe_engine_class_instance *hwe
ibb = xe_bb_create_on_offset(fd, exec_queue_id, vm, bb_offset2, bb_size);
intel_bb_set_lr_mode(ibb, true);
- shader = get_prefetch_shader(fd);
+ shader = get_shader(fd);
gpgpu_shader_exec(ibb, buf, w_dim.x, w_dim.y, shader, NULL, 0, 0);
gpgpu_shader_destroy(shader);
intel_bb_sync(ibb);
@@ -271,7 +276,8 @@ int igt_main()
hwe->engine_class == DRM_XE_ENGINE_CLASS_COMPUTE) {
igt_dynamic_f("%s%d", xe_engine_class_string(hwe->engine_class),
hwe->engine_instance)
- test_prefetch_fault(fd, hwe, false);
+ test_prefetch_fault(fd, hwe, false,
+ get_prefetch_shader);
}
}
}
@@ -284,7 +290,8 @@ int igt_main()
hwe->engine_class == DRM_XE_ENGINE_CLASS_COMPUTE) {
igt_dynamic_f("%s%d", xe_engine_class_string(hwe->engine_class),
hwe->engine_instance)
- test_prefetch_fault(fd, hwe, true);
+ test_prefetch_fault(fd, hwe, true,
+ get_prefetch_shader);
}
}
}
--
2.43.0
next prev parent reply other threads:[~2026-08-18 17:14 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-18 17:12 [PATCH i-g-t v3 0/2] tests/intel/xe_prefetch_fault: Add L2 prefetch fault tests Varun Gupta
2026-08-18 17:12 ` Varun Gupta [this message]
2026-08-18 17:12 ` [PATCH i-g-t v3 2/2] tests/intel/xe_prefetch_fault: add L2 prefetch fault subtests Varun Gupta
2026-08-18 18:10 ` ✓ Xe.CI.BAT: success for tests/intel/xe_prefetch_fault: Add L2 prefetch fault tests (rev4) Patchwork
2026-08-18 18:15 ` ✓ i915.CI.BAT: " Patchwork
2026-08-18 21:28 ` ✓ Xe.CI.FULL: " Patchwork
2026-08-19 3:45 ` ✗ i915.CI.Full: failure " Patchwork
2026-08-19 6:55 ` [PATCH i-g-t v3 0/2] tests/intel/xe_prefetch_fault: Add L2 prefetch fault tests Hajda, Andrzej
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260818171239.277897-5-varun.gupta@intel.com \
--to=varun.gupta@intel.com \
--cc=andrzej.hajda@intel.com \
--cc=igt-dev@lists.freedesktop.org \
--cc=priyanka.dandamudi@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox