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Thu, 3 Sep 2026 19:24:46 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=satlexmb07.amd.com; pr=C Received: from satlexmb07.amd.com (165.204.84.17) by SJ1PEPF000037A0.mail.protection.outlook.com (10.167.244.132) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.21.382.8 via Frontend Transport; Thu, 3 Sep 2026 19:24:46 +0000 Received: from georzhanmkm.amd.com (10.180.168.240) by satlexmb07.amd.com (10.181.42.216) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.46; Thu, 3 Sep 2026 14:24:45 -0500 From: George Zhang To: CC: Fangzhi Zuo , Ivan Lipski , "Alex Hung" , Harry Wentland , "George Zhang" Subject: [i-g-t, v2 1/2] tests/amdgpu/amd_dp_dsc: Do not disable DSC for high bw panels Date: Thu, 3 Sep 2026 15:24:51 -0400 Message-ID: <20260903192458.1149302-1-george.zhang@amd.com> X-Mailer: git-send-email 2.55.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: satlexmb08.amd.com (10.181.42.217) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ1PEPF000037A0:EE_|MN2PR12MB4224:EE_ X-MS-Office365-Filtering-Correlation-Id: c93021b5-2d3c-4f15-a360-08df09f103f9 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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Ip=[165.204.84.17]; Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF000037A0.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB4224 X-BeenThere: igt-dev@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Development mailing list for IGT GPU Tools List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: igt-dev-bounces@lists.freedesktop.org Sender: "igt-dev" The test previously attempted to disable DSC even on high bandwidth panels. This would erroneously fail the dsc_enable test even though DSC is on. Fix this by checking what mode the panel defaults to when set to automatic. If DSC is on, then do not attempt to force it off later. Signed-off-by: George Zhang --- tests/amdgpu/amd_dp_dsc.c | 20 ++++++++++++++++---- 1 file changed, 16 insertions(+), 4 deletions(-) diff --git a/tests/amdgpu/amd_dp_dsc.c b/tests/amdgpu/amd_dp_dsc.c index dc71e903e..690a6c39d 100644 --- a/tests/amdgpu/amd_dp_dsc.c +++ b/tests/amdgpu/amd_dp_dsc.c @@ -137,6 +137,9 @@ static void test_dsc_enable(data_t *data) igt_output_set_crtc(output, crtc); igt_plane_set_fb(data->primary[crtc->crtc_index], &ref_fb); + + /* Make sure we are in automatic mode before we start */ + igt_amd_write_dsc_clock_en(data->fd, output->name, DSC_AUTOMATIC); igt_display_commit_atomic(display, DRM_MODE_ATOMIC_ALLOW_MODESET, 0); test_conn_cnt++; @@ -153,8 +156,12 @@ static void test_dsc_enable(data_t *data) /* Check if DSC is enabled */ dsc_on = igt_amd_read_dsc_clock_status(data->fd, output->name) == 1; - /* Revert DSC to automatic state */ - igt_amd_write_dsc_clock_en(data->fd, output->name, DSC_FORCE_OFF); + /** + * We can only force off if the panel is capable of running with DSC disabled. + * If DSC was ON in automatic mode, we cannot (and should not) force it OFF. + */ + if (!dsc_before) + igt_amd_write_dsc_clock_en(data->fd, output->name, DSC_FORCE_OFF); igt_plane_set_fb(data->primary[crtc->crtc_index], &ref_fb); igt_display_commit_atomic(display, DRM_MODE_ATOMIC_ALLOW_MODESET, NULL); @@ -286,6 +293,7 @@ static void test_dsc_slice_dimensions_change(data_t *data) igt_output_set_crtc(output, crtc); igt_plane_set_fb(data->primary[crtc->crtc_index], &ref_fb); + igt_amd_write_dsc_clock_en(data->fd, output->name, DSC_AUTOMATIC); igt_display_commit_atomic(display, DRM_MODE_ATOMIC_ALLOW_MODESET, 0); test_conn_cnt++; @@ -316,8 +324,12 @@ static void test_dsc_slice_dimensions_change(data_t *data) ref_fb); } - /* Force disable DSC */ - igt_amd_write_dsc_clock_en(data->fd, output->name, DSC_FORCE_OFF); + /** + * We can only force off if the panel is capable of running with DSC disabled. + * If DSC was ON in automatic mode, we cannot (and should not) force it OFF. + */ + if (!dsc_before) + igt_amd_write_dsc_clock_en(data->fd, output->name, DSC_FORCE_OFF); igt_plane_set_fb(data->primary[crtc->crtc_index], &ref_fb); igt_display_commit_atomic(display, DRM_MODE_ATOMIC_ALLOW_MODESET, NULL); -- 2.55.0