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Ip=[165.204.84.17]; Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ5PEPF000001EA.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA0PR12MB7464 X-BeenThere: igt-dev@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Development mailing list for IGT GPU Tools List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: igt-dev-bounces@lists.freedesktop.org Sender: "igt-dev" - Size the legacy IB from pm4_size: the IB carries the PM4 command stream, so its byte size derives from pm4_size, not from write_length (the data transfer size). amdgpu_test_exec_cs_helper() now computes ib_size from pm4_size. - WRITE_LINEAR/WRITE_ATOMIC/COPY_LINEAR take their operand GPU VAs (src/dst) from cmd_packet_params_t, so callers pass virtual addresses directly instead of relying on context-internal BOs. Signed-off-by: Junhua Shen --- lib/amdgpu/amd_command_submission.c | 46 +++++++++++++++++++---------- 1 file changed, 30 insertions(+), 16 deletions(-) diff --git a/lib/amdgpu/amd_command_submission.c b/lib/amdgpu/amd_command_submission.c index d5837e0f1..6d55bd107 100644 --- a/lib/amdgpu/amd_command_submission.c +++ b/lib/amdgpu/amd_command_submission.c @@ -46,13 +46,15 @@ int amdgpu_test_exec_cs_helper(amdgpu_device_handle device, unsigned int ip_type bool user_queue = ring_context->user_queue; const struct amdgpu_ip_block_version *ip_block = NULL; amdgpu_bo_handle *all_res; + uint64_t ib_size; ip_block = get_ip_block(device, ip_type); all_res = alloca(sizeof(ring_context->resources[0]) * (ring_context->res_cnt + 1)); + ib_size = (uint64_t)ring_context->pm4_size * sizeof(*ring_context->pm4); if (expect_failure) { /* allocate IB */ - r = amdgpu_bo_alloc_and_map_sync(device, ring_context->write_length, 4096, + r = amdgpu_bo_alloc_and_map_sync(device, ib_size, 4096, AMDGPU_GEM_DOMAIN_GTT, 0, AMDGPU_VM_MTYPE_UC, &ib_result_handle, &ib_result_cpu, &ib_result_mc_address, &va_handle, @@ -62,7 +64,7 @@ int amdgpu_test_exec_cs_helper(amdgpu_device_handle device, unsigned int ip_type /* prepare CS */ igt_assert(ring_context->pm4_dw <= 1024); /* allocate IB */ - r = amdgpu_bo_alloc_and_map_sync(device, ring_context->write_length, 4096, + r = amdgpu_bo_alloc_and_map_sync(device, ib_size, 4096, AMDGPU_GEM_DOMAIN_GTT, 0, AMDGPU_VM_MTYPE_UC, &ib_result_handle, &ib_result_cpu, &ib_result_mc_address, &va_handle, @@ -1225,8 +1227,11 @@ int cmd_place_packet(cmd_context_t *ctx, const cmd_packet_params_t *params) if (!ctx->ip_block->funcs->write_linear) return -ENOTSUP; - /* TODO: allow user set the dst and data */ - //ctx->ring_ctx->bo_mc = params->dst_addr; + /* Destination operand comes from the caller. */ + if (params->dst_addr) + ctx->ring_ctx->bo_mc = params->dst_addr; + igt_assert_f(ctx->ring_ctx->bo_mc, + "WRITE_LINEAR requires a destination address\n"); ctx->ring_ctx->write_length = params->size; /* Build PM4 packet */ @@ -1239,8 +1244,11 @@ int cmd_place_packet(cmd_context_t *ctx, const cmd_packet_params_t *params) if (!ctx->ip_block->funcs->write_linear_atomic) return -ENOTSUP; - /* TODO: allow user set the dst and data */ - //ctx->ring_ctx->bo_mc = params->dst_addr; + /* Destination operand comes from the caller. */ + if (params->dst_addr) + ctx->ring_ctx->bo_mc = params->dst_addr; + igt_assert_f(ctx->ring_ctx->bo_mc, + "WRITE_ATOMIC requires a destination address\n"); ctx->ring_ctx->write_length = 1; /* Atomic operations typically work on single DWORD */ result = ctx->ip_block->funcs->write_linear_atomic(ctx->ip_block->funcs, @@ -1249,18 +1257,24 @@ int cmd_place_packet(cmd_context_t *ctx, const cmd_packet_params_t *params) return result; case CMD_PACKET_COPY_LINEAR: - if (!ctx->ip_block->funcs->copy_linear) - return -ENOTSUP; + if (!ctx->ip_block->funcs->copy_linear) + return -ENOTSUP; - /* For copy operations, we need both source and destination addresses */ - /* This would require extending the API to pass both addresses */ - /* For now, use the internal buffer as source */ - ctx->ring_ctx->write_length = params->size; + /* Copy takes both operands from the caller: bo_mc = source VA, + * bo_mc2 = destination VA. + */ + if (params->src_addr) + ctx->ring_ctx->bo_mc = params->src_addr; + if (params->dst_addr) + ctx->ring_ctx->bo_mc2 = params->dst_addr; + igt_assert_f(ctx->ring_ctx->bo_mc && ctx->ring_ctx->bo_mc2, + "COPY_LINEAR requires source and destination addresses\n"); + ctx->ring_ctx->write_length = params->size; - result = ctx->ip_block->funcs->copy_linear(ctx->ip_block->funcs, - ctx->ring_ctx, - &ctx->ring_ctx->pm4_dw); - return result; + result = ctx->ip_block->funcs->copy_linear(ctx->ip_block->funcs, + ctx->ring_ctx, + &ctx->ring_ctx->pm4_dw); + return result; case CMD_PACKET_COPY_ATOMIC: /* TODO: Implement atomic copy if supported */ -- 2.34.1