From: "Piórkowski, Piotr" <piotr.piorkowski@intel.com>
To: <igt-dev@lists.freedesktop.org>
Cc: "Piotr Piórkowski" <piotr.piorkowski@intel.com>
Subject: [PATCH v1 1/4] lib/igt_pci: Add raw configuration space helpers
Date: Wed, 16 Sep 2026 13:51:58 +0200 [thread overview]
Message-ID: <20260916115201.1973752-2-piotr.piorkowski@intel.com> (raw)
In-Reply-To: <20260916115201.1973752-1-piotr.piorkowski@intel.com>
From: Piotr Piórkowski <piotr.piorkowski@intel.com>
Add helpers to read raw PCI configuration space from sysfs and access
its contents.
Provide little-endian u16/u32 readers and standard capability lookup
helpers for configuration-space buffers.
Signed-off-by: Piotr Piórkowski <piotr.piorkowski@intel.com>
Assisted-by: GPT-5.6 Luna
---
lib/igt_pci.c | 86 +++++++++++++++++++++++++++++++++++++++++++++++++++
lib/igt_pci.h | 7 +++++
2 files changed, 93 insertions(+)
diff --git a/lib/igt_pci.c b/lib/igt_pci.c
index b63550b390..06717fe8eb 100644
--- a/lib/igt_pci.c
+++ b/lib/igt_pci.c
@@ -61,6 +61,92 @@ int find_pci_cap_offset(struct pci_device *dev, enum pci_cap_id cap_id)
return find_pci_cap_offset_at(dev, cap_id, PCI_CAPS_START);
}
+/**
+ * igt_pci_config_raw_read:
+ * @pci_slot: PCI device BDF (e.g. "0000:01:00.0")
+ * @buffer: destination buffer
+ * @length: number of configuration-space bytes to read
+ *
+ * Read raw PCI configuration space through the device sysfs config attribute.
+ *
+ * Returns 0 on success, otherwise a negative errno-like value.
+ */
+int igt_pci_config_raw_read(const char *pci_slot, void *buffer, size_t length)
+{
+ char path[PATH_MAX];
+ ssize_t ret;
+ int err;
+ int fd;
+
+ if (!pci_slot || !buffer || !length)
+ return -EINVAL;
+
+ snprintf(path, sizeof(path), "/sys/bus/pci/devices/%s/config", pci_slot);
+ fd = open(path, O_RDONLY | O_CLOEXEC);
+ if (fd < 0)
+ return -errno;
+
+ ret = pread(fd, buffer, length, 0);
+ err = errno;
+ close(fd);
+ if (ret < 0)
+ return -err;
+
+ return (size_t)ret == length ? 0 : -EIO;
+}
+
+uint16_t igt_pci_config_raw_read_u16(const uint8_t *config, unsigned int offset)
+{
+ return config[offset] | (config[offset + 1] << 8);
+}
+
+uint32_t igt_pci_config_raw_read_u32(const uint8_t *config, unsigned int offset)
+{
+ return igt_pci_config_raw_read_u16(config, offset) |
+ ((uint32_t)igt_pci_config_raw_read_u16(config, offset + 2) << 16);
+}
+
+int igt_pci_config_raw_find_cap_offset(const uint8_t *config, uint8_t cap_id)
+{
+ unsigned int offset = config[PCI_CAPS_START];
+ unsigned int loop = (PCI_CFG_SPACE_SIZE - PCI_TYPE0_1_HEADER_SIZE) / 2;
+
+ while (offset && loop--) {
+ if (offset < PCI_TYPE0_1_HEADER_SIZE || offset >= PCI_CFG_SPACE_SIZE)
+ return -EINVAL;
+
+ if (config[offset] == cap_id)
+ return offset;
+
+ offset = config[offset + 1];
+ }
+
+ return offset ? -ELOOP : 0;
+}
+
+int igt_pci_config_raw_find_ext_cap_offset(const uint8_t *config, uint16_t cap_id)
+{
+ unsigned int offset = PCI_EXT_CAPS_START;
+ unsigned int loop = (PCI_EXT_CFG_SPACE_SIZE - offset) / 4;
+
+ while (loop--) {
+ uint32_t header = igt_pci_config_raw_read_u32(config, offset);
+
+ if (!header)
+ break;
+ if ((header & 0xffff) == cap_id)
+ return offset;
+
+ offset = (header >> 20) & 0xffc;
+ if (!offset)
+ break;
+ if (offset < PCI_EXT_CAPS_START || offset >= PCI_EXT_CFG_SPACE_SIZE)
+ return -EINVAL;
+ }
+
+ return loop ? 0 : -ELOOP;
+}
+
static int open_pci_driver_dir(const char *driver)
{
char path[PATH_MAX];
diff --git a/lib/igt_pci.h b/lib/igt_pci.h
index 509345b2d8..787c10fc51 100644
--- a/lib/igt_pci.h
+++ b/lib/igt_pci.h
@@ -16,6 +16,8 @@ struct pci_device;
#define PCI_TYPE0_1_HEADER_SIZE 0x40
#define PCI_CAPS_START 0x34
#define PCI_CFG_SPACE_SIZE 0x100
+#define PCI_EXT_CAPS_START 0x100
+#define PCI_EXT_CFG_SPACE_SIZE 0x1000
enum pci_cap_id {
PCI_EXPRESS_CAP_ID = 0x10
@@ -27,6 +29,11 @@ enum pci_cap_id {
#define PCI_SLOT_PWR_CTRL_PRESENT (1 << 1)
int find_pci_cap_offset(struct pci_device *dev, enum pci_cap_id cap_id);
+int igt_pci_config_raw_read(const char *pci_slot, void *buffer, size_t length);
+uint16_t igt_pci_config_raw_read_u16(const uint8_t *config, unsigned int offset);
+uint32_t igt_pci_config_raw_read_u32(const uint8_t *config, unsigned int offset);
+int igt_pci_config_raw_find_cap_offset(const uint8_t *config, uint8_t cap_id);
+int igt_pci_config_raw_find_ext_cap_offset(const uint8_t *config, uint16_t cap_id);
int igt_pci_device_unbind(const char *pci_slot);
int igt_pci_driver_bind(const char *driver, const char *pci_slot);
int igt_pci_driver_unbind(const char *driver, const char *pci_slot);
--
2.34.1
next prev parent reply other threads:[~2026-09-16 11:53 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-16 11:51 [PATCH v1 0/4] Add PCI configuration tests for SR-IOV VFs Piórkowski, Piotr
2026-09-16 11:51 ` Piórkowski, Piotr [this message]
2026-09-17 15:33 ` [v1,1/4] lib/igt_pci: Add raw configuration space helpers Laguna, Lukasz
2026-09-16 11:51 ` [PATCH v1 2/4] lib/igt_pci: Add PCI extended capability lookup Piórkowski, Piotr
2026-09-17 15:36 ` [v1,2/4] " Laguna, Lukasz
2026-09-16 11:52 ` [PATCH v1 3/4] tests/sriov_pci_config: Add VF core config checks Piórkowski, Piotr
2026-09-17 15:38 ` [v1,3/4] " Laguna, Lukasz
2026-09-16 11:52 ` [PATCH v1 4/4] tests/sriov_pci_config: Add optional capability checks Piórkowski, Piotr
2026-09-17 15:47 ` [v1,4/4] " Laguna, Lukasz
2026-09-16 19:24 ` ✓ Xe.CI.BAT: success for Add PCI configuration tests for SR-IOV VFs Patchwork
2026-09-16 20:10 ` ✓ i915.CI.BAT: " Patchwork
2026-09-16 22:49 ` ✗ Xe.CI.FULL: failure " Patchwork
2026-09-17 4:13 ` ✓ i915.CI.Full: success " Patchwork
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