From: Sobin Thomas <sobin.thomas@intel.com>
To: igt-dev@lists.freedesktop.org, nishit.sharma@intel.com
Cc: priyanka.dandamudi@intel.com, matthew.brost@intel.com,
kamil.konieczny@intel.com, Sobin Thomas <sobin.thomas@intel.com>
Subject: [PATCH i-g-t v7 2/5] tests/intel: Add random-size BO leak tests
Date: Wed, 21 Oct 2026 17:40:28 +0000 [thread overview]
Message-ID: <20261021174032.18337-3-sobin.thomas@intel.com> (raw)
In-Reply-To: <20261021174032.18337-1-sobin.thomas@intel.com>
Add new RANDOM_SIZE subtests exercising randomly sized BO allocation
This test excercises allocation, execution, validation and cleanup
paths across a wider mix of BO size, helping to detect issues that
may only appear with specific size combinations.
Add the following subtests:
- rand-sizes-10
- rand-sizes-100
- rand-sizes-100-unaligned
- rand-sizes-evict
- rand-sizes-leak-100
v6:
- Set LEAK_BO for rand-sizes-* so leak path is verified.(Priyanka)
- Add rand-sizes-evict subtest which uses EVICT path ( Priyanka)
- Drop unused pthread barrier parameter (Priyanka)
v7:
- Keep an explicit assertion for unhandled test types.
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Signed-off-by: Sobin Thomas <sobin.thomas@intel.com>
---
tests/intel/xe_bo_alloc.c | 120 ++++++++++++++++++++++++++++++++++++++
1 file changed, 120 insertions(+)
diff --git a/tests/intel/xe_bo_alloc.c b/tests/intel/xe_bo_alloc.c
index 38d581d18..80b1ae887 100644
--- a/tests/intel/xe_bo_alloc.c
+++ b/tests/intel/xe_bo_alloc.c
@@ -27,11 +27,32 @@
#include "xe_drm.h"
#define BO_BIND_BASE_ADDR 0x1a0000ull
#define SZ_4K_SHIFT 12
+#define MAX_ALLOCATIONS 50000
/**
* SUBTEST: all-sizes-once
* Description: Test all BO allocations sizes in test table
* Test category: functionality test
+ *
+ * SUBTEST: rand-sizes-10
+ * Description: Test 10 random BO allocation sizes in test table
+ * Test category: functionality test
+ *
+ * SUBTEST: rand-sizes-100
+ * Description: Test 100 random BO allocation sizes in test table
+ * Test category: functionality test
+ *
+ * SUBTEST: rand-sizes-100-unaligned
+ * Description: Test 100 random BO allocation sizes, with bind address not aligned to BO size
+ * Test category: functionality test
+ *
+ * SUBTEST: rand-sizes-leak-100
+ * Description: Allocate and retain 100 randomly sized BOs, then validate their contents
+ * Test category: functionality test
+ *
+ * SUBTEST: rand-sizes-evict
+ * Description: Allocate and retain random-sized BOs until VRAM is overcommitted, then validate them
+ * Test category: functionality test
*/
#define N_ALLOC_SIZES 256
@@ -44,6 +65,7 @@ static uint64_t *alloc_sizes;
*/
enum test_type {
TYPE_ALL_SIZES,
+ TYPE_RANDOM_SIZE,
};
struct test_case {
@@ -54,8 +76,14 @@ struct test_case {
bool requires_evict_ram;
};
+struct bo_group {
+ struct bo_alloc *bos;
+ int n_bos;
+};
+
#define LEAK_BINDING (0x1 << 0)
#define LEAK_BO (0x1 << 1)
+#define EVICT (0x1 << 2)
#define UNALIGNED (0x1 << 3)
/*
@@ -466,6 +494,85 @@ static struct bo_alloc *test_alloc_size(int fd, uint32_t vm, uint32_t q,
return NULL;
}
+static void validate_bo_leak(int fd, uint32_t vm, struct bo_alloc *bos,
+ int n_bos, uint32_t flags)
+{
+ int i;
+
+ for (i = 0; i < n_bos; ++i)
+ check_exec_data(bos[i].map, bos[i].bo_size >> SZ_4K_SHIFT);
+
+ /* Rebind to force migration back to VRAM, rechec */
+ if (flags & EVICT) {
+ igt_assert_eq(test_bind(fd, vm, bos, n_bos, flags), 0);
+
+ for (i = 0; i < n_bos; ++i)
+ check_exec_data(bos[i].map, bos[i].bo_size >> SZ_4K_SHIFT);
+
+ test_unbind(fd, vm, bos, n_bos);
+ }
+
+ for (i = 0; i < n_bos; ++i)
+ bo_release(fd, &bos[i]);
+}
+
+static void check_leak_multi_group(int fd, uint32_t vm, struct bo_group **groups,
+ int count, uint32_t flags)
+{
+ int i;
+
+ for (i = 0; i < count; ++i) {
+ if (!groups[i])
+ continue;
+
+ validate_bo_leak(fd, vm, groups[i]->bos, groups[i]->n_bos, flags);
+ free(groups[i]->bos);
+ free(groups[i]);
+ }
+}
+
+static void alloc_rand_size_bos(int fd, struct drm_xe_engine_class_instance *hwe,
+ int count, uint64_t vram_target, uint32_t flags)
+{
+ struct bo_group **leaks = NULL;
+ uint32_t vm, q;
+ uint64_t vram_used = 0, bo_size;
+ int i, max_batches = (count == -1) ? MAX_ALLOCATIONS : count;
+
+ igt_assert(count > 0 || (flags & EVICT && flags & LEAK_BO));
+ leaks = malloc(sizeof(*leaks) * max_batches);
+ igt_assert(leaks);
+
+ vm = xe_vm_create(fd, 0, 0);
+ q = xe_exec_queue_create(fd, vm, hwe, 0);
+
+ for (i = 0; i < count || vram_used < vram_target; ++i) {
+ struct bo_alloc *bo;
+
+ bo_size = alloc_sizes[rand() % N_ALLOC_SIZES];
+
+ igt_assert(i < max_batches);
+ bo = test_alloc_sizes(fd, vm, q, hwe->gt_id, &bo_size, 1, flags, BO_BIND_BASE_ADDR);
+ if (bo) {
+ leaks[i] = malloc(sizeof(*leaks[i]));
+ igt_assert(leaks[i]);
+
+ leaks[i]->bos = bo;
+ leaks[i]->n_bos = 1;
+
+ vram_used += bo->bo_size;
+ } else {
+ leaks[i] = NULL;
+ }
+ }
+
+ check_leak_multi_group(fd, vm, leaks, i, flags);
+
+ xe_exec_queue_destroy(fd, q);
+ xe_vm_destroy(fd, vm);
+ free(leaks);
+}
+
static void all_sizes_once(int fd, struct drm_xe_engine_class_instance *hwe)
{
uint32_t vm, q;
@@ -487,6 +594,7 @@ static void run_gt_dynamic_subtests(int fd, const struct test_case *t)
uint16_t seen_gt[64];
int n_seen = 0, j;
bool dup;
+ uint64_t vram_target;
if (t->requires_evict_ram) {
igt_require(xe_has_vram(fd));
@@ -517,11 +625,18 @@ static void run_gt_dynamic_subtests(int fd, const struct test_case *t)
igt_assert(n_seen < ARRAY_SIZE(seen_gt));
seen_gt[n_seen++] = hwe->gt_id;
+ /* 1.5x visible VRAM of this GT so EVICT exceeds capacity by half */
+ vram_target = (t->flags & EVICT) ?
+ xe_visible_vram_size(fd, hwe->gt_id) * 3 / 2 : 0;
+
igt_dynamic_f("gt%u", hwe->gt_id) {
switch (t->type) {
case TYPE_ALL_SIZES:
all_sizes_once(fd, hwe);
break;
+ case TYPE_RANDOM_SIZE:
+ alloc_rand_size_bos(fd, hwe, t->count, vram_target, t->flags);
+ break;
default:
igt_assert_f(0, "Unhandled test type %d\n", t->type);
@@ -538,6 +653,11 @@ static void run_gt_dynamic_subtests(int fd, const struct test_case *t)
static const struct test_case test_matrix[] = {
{ "all-sizes-once", 0, 0, TYPE_ALL_SIZES, false },
+ { "rand-sizes-10", 10, 0, TYPE_RANDOM_SIZE, false },
+ { "rand-sizes-100", 100, 0, TYPE_RANDOM_SIZE, false },
+ { "rand-sizes-100-unaligned", 100, UNALIGNED, TYPE_RANDOM_SIZE, false },
+ { "rand-sizes-leak-100", 100, LEAK_BO, TYPE_RANDOM_SIZE, false },
+ { "rand-sizes-evict", -1, LEAK_BO | EVICT, TYPE_RANDOM_SIZE, true },
};
int igt_main()
--
2.55.0
next prev parent reply other threads:[~2026-10-21 17:42 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-21 17:40 [PATCH i-g-t v7 0/5] Add BO Allocation and VM Bind stress infra Sobin Thomas
2026-10-21 17:40 ` [PATCH i-g-t v7 1/5] tests/intel: Add BO allocation stress coverage Sobin Thomas
2026-10-21 17:40 ` Sobin Thomas [this message]
2026-10-21 17:40 ` [PATCH i-g-t v7 3/5] tests/intel: Add array-of-binds random-size allocation tests Sobin Thomas
2026-10-21 17:40 ` [PATCH i-g-t v7 4/5] tests/intel: Add threaded random-size allocation stress tests Sobin Thomas
2026-10-21 17:40 ` [PATCH i-g-t v7 5/5] tests/intel: Add oversubscribe concurrent bind stress subtest Sobin Thomas
2026-10-21 23:59 ` ✓ Xe.CI.BAT: success for Add BO Allocation and VM Bind stress infra (rev6) Patchwork
2026-10-22 0:20 ` ✓ i915.CI.BAT: " Patchwork
2026-10-22 5:28 ` ✗ Xe.CI.FULL: failure " Patchwork
2026-10-22 8:49 ` ✓ i915.CI.Full: success " Patchwork
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