From: Antonio Argenziano <antonio.argenziano@intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Cc: igt-dev@lists.freedesktop.org
Subject: Re: [igt-dev] [PATCH igt 5/5] igt/gem_exec_fence: Exercise merging fences
Date: Wed, 28 Feb 2018 14:44:31 -0800 [thread overview]
Message-ID: <30eedf37-2fa2-e96d-a146-cfd822780cb3@intel.com> (raw)
In-Reply-To: <20180228155138.16168-5-chris@chris-wilson.co.uk>
On 28/02/18 07:51, Chris Wilson wrote:
> Execute the same batch on each engine and check that the composite fence
> across all engines completes only after the batch is completed on every
> engine.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
LGTM.
Reviewed-by: Antonio Argenziano <antonio.argenziano@intel.com>
> ---
> tests/gem_exec_fence.c | 127 +++++++++++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 127 insertions(+)
>
> diff --git a/tests/gem_exec_fence.c b/tests/gem_exec_fence.c
> index 93ed3b9b..36459e56 100644
> --- a/tests/gem_exec_fence.c
> +++ b/tests/gem_exec_fence.c
> @@ -208,6 +208,113 @@ static void test_fence_busy(int fd, unsigned ring, unsigned flags)
> gem_quiescent_gpu(fd);
> }
>
> +static void test_fence_busy_all(int fd, unsigned flags)
> +{
> + const int gen = intel_gen(intel_get_drm_devid(fd));
> + struct drm_i915_gem_exec_object2 obj;
> + struct drm_i915_gem_relocation_entry reloc;
> + struct drm_i915_gem_execbuffer2 execbuf;
> + struct timespec tv;
> + uint32_t *batch;
> + unsigned int engine;
> + int all, i, timeout;
> +
> + gem_quiescent_gpu(fd);
> +
> + memset(&execbuf, 0, sizeof(execbuf));
> + execbuf.buffers_ptr = to_user_pointer(&obj);
> + execbuf.buffer_count = 1;
> +
> + memset(&obj, 0, sizeof(obj));
> + obj.handle = gem_create(fd, 4096);
> +
> + obj.relocs_ptr = to_user_pointer(&reloc);
> + obj.relocation_count = 1;
> + memset(&reloc, 0, sizeof(reloc));
> +
> + batch = gem_mmap__wc(fd, obj.handle, 0, 4096, PROT_WRITE);
> + gem_set_domain(fd, obj.handle,
> + I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT);
> +
> + reloc.target_handle = obj.handle; /* recurse */
> + reloc.presumed_offset = 0;
> + reloc.offset = sizeof(uint32_t);
> + reloc.delta = 0;
> + reloc.read_domains = I915_GEM_DOMAIN_COMMAND;
> + reloc.write_domain = 0;
> +
> + i = 0;
> + batch[i] = MI_BATCH_BUFFER_START;
> + if (gen >= 8) {
> + batch[i] |= 1 << 8 | 1;
> + batch[++i] = 0;
> + batch[++i] = 0;
> + } else if (gen >= 6) {
> + batch[i] |= 1 << 8;
> + batch[++i] = 0;
> + } else {
> + batch[i] |= 2 << 6;
> + batch[++i] = 0;
> + if (gen < 4) {
> + batch[i] |= 1;
> + reloc.delta = 1;
> + }
> + }
> + i++;
> +
> + all = -1;
> + for_each_engine(fd, engine) {
> + int fence, new;
> +
> + execbuf.flags = engine | LOCAL_EXEC_FENCE_OUT;
> + execbuf.rsvd2 = -1;
> + gem_execbuf_wr(fd, &execbuf);
> + fence = execbuf.rsvd2 >> 32;
> + igt_assert(fence != -1);
> +
> + if (all < 0) {
> + all = fence;
> + break;
> + }
> +
> + new = sync_fence_merge(all, fence);
> + igt_assert_lte(0, new);
> + close(all);
> + close(fence);
> +
> + all = new;
> + }
> +
> + igt_assert(gem_bo_busy(fd, obj.handle));
> + igt_assert(fence_busy(all));
> +
> + timeout = 120;
> + if ((flags & HANG) == 0) {
> + *batch = MI_BATCH_BUFFER_END;
> + __sync_synchronize();
> + timeout = 1;
> + }
> + munmap(batch, 4096);
> +
> + if (flags & WAIT) {
> + struct pollfd pfd = { .fd = all, .events = POLLIN };
> + igt_assert(poll(&pfd, 1, timeout*1000) == 1);
> + } else {
> + memset(&tv, 0, sizeof(tv));
> + while (fence_busy(all))
> + igt_assert(igt_seconds_elapsed(&tv) < timeout);
> + }
> +
> + igt_assert(!gem_bo_busy(fd, obj.handle));
> + igt_assert_eq(sync_fence_status(all),
> + flags & HANG ? -EIO : SYNC_FENCE_OK);
Do you get -EIO also if only one engine hangs?
Thanks,
Antonio
> +
> + close(all);
> + gem_close(fd, obj.handle);
> +
> + gem_quiescent_gpu(fd);
> +}
> +
> static void test_fence_await(int fd, unsigned ring, unsigned flags)
> {
> const int gen = intel_gen(intel_get_drm_devid(fd));
> @@ -1465,6 +1572,26 @@ igt_main
> gem_submission_print_method(i915);
> }
>
> + igt_subtest_group {
> + igt_fixture {
> + igt_fork_hang_detector(i915);
> + }
> +
> + igt_subtest("basic-busy-all")
> + test_fence_busy_all(i915, 0);
> + igt_subtest("basic-wait-all")
> + test_fence_busy_all(i915, WAIT);
> +
> + igt_fixture {
> + igt_stop_hang_detector();
> + }
> +
> + igt_subtest("busy-hang-all")
> + test_fence_busy_all(i915, HANG);
> + igt_subtest("wait-hang-all")
> + test_fence_busy_all(i915, WAIT | HANG);
> + }
> +
> for (e = intel_execution_engines; e->name; e++) {
> igt_subtest_group {
> igt_fixture {
>
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next prev parent reply other threads:[~2018-02-28 22:44 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-02-28 15:51 [igt-dev] [PATCH igt 1/5] lib/dummyload: Avoid assertions in lowlevel spin constructor Chris Wilson
2018-02-28 15:51 ` [igt-dev] [PATCH igt 2/5] igt/gem_spin_batch: Avoid waiting when running concurrently Chris Wilson
2018-03-03 10:15 ` [Intel-gfx] " Chris Wilson
2018-03-05 9:52 ` [Intel-gfx] [igt-dev] " Michał Winiarski
2018-02-28 15:51 ` [Intel-gfx] [PATCH igt 3/5] igt/gem_ctx_switch: Exercise all engines at once Chris Wilson
2018-02-28 19:10 ` [igt-dev] " Antonio Argenziano
2018-03-01 7:51 ` [Intel-gfx] [PATCH igt v2] " Chris Wilson
2018-03-01 16:09 ` [igt-dev] " Antonio Argenziano
2018-02-28 15:51 ` [Intel-gfx] [PATCH igt 4/5] igt/gem_exec_capture: Exercise readback of userptr Chris Wilson
2018-03-01 11:21 ` [igt-dev] " Michał Winiarski
2018-02-28 15:51 ` [igt-dev] [PATCH igt 5/5] igt/gem_exec_fence: Exercise merging fences Chris Wilson
2018-02-28 22:44 ` Antonio Argenziano [this message]
2018-03-01 7:12 ` Chris Wilson
2018-02-28 17:14 ` [igt-dev] ✓ Fi.CI.BAT: success for series starting with [1/5] lib/dummyload: Avoid assertions in lowlevel spin constructor Patchwork
2018-02-28 21:33 ` [igt-dev] ✗ Fi.CI.IGT: warning " Patchwork
2018-03-01 7:28 ` [igt-dev] [PATCH igt 1/5] " Abdiel Janulgue
2018-03-01 8:54 ` [igt-dev] ✓ Fi.CI.BAT: success for series starting with [1/5] lib/dummyload: Avoid assertions in lowlevel spin constructor (rev2) Patchwork
2018-03-01 10:52 ` [igt-dev] ✗ Fi.CI.IGT: warning " Patchwork
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