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From: Riana Tauro <riana.tauro@intel.com>
To: Sujaritha Sundaresan <sujaritha.sundaresan@intel.com>,
	<igt-dev@lists.freedesktop.org>
Subject: Re: [igt-dev] [PATCH i-g-t] tests/i915_pm_rc6_residency: Add mutli-gt functionality to rc6_idle and rc6_fence test
Date: Tue, 22 Aug 2023 11:06:55 +0530	[thread overview]
Message-ID: <4b6472cb-6f62-91a5-9c9c-9c2cb4b10bb5@intel.com> (raw)
In-Reply-To: <20230821125759.3872898-1-sujaritha.sundaresan@intel.com>

Hi Suja

typo in the patch header

On 8/21/2023 6:27 PM, Sujaritha Sundaresan wrote:
> Adding multi-gt capabilty to rc6_idle and rc6_fence tests
> 
> Signed-off-by: Sujaritha Sundaresan <sujaritha.sundaresan@intel.com>
> ---
>   tests/i915/i915_pm_rc6_residency.c | 28 +++++++++++++++++++---------
>   1 file changed, 19 insertions(+), 9 deletions(-)
> 
> diff --git a/tests/i915/i915_pm_rc6_residency.c b/tests/i915/i915_pm_rc6_residency.c
> index b266680ac..d727dab12 100644
> --- a/tests/i915/i915_pm_rc6_residency.c
> +++ b/tests/i915/i915_pm_rc6_residency.c
> @@ -376,7 +376,7 @@ static void kill_children(int sig)
>   	signal(sig, old);
>   }
>   
> -static void rc6_idle(int i915, uint32_t ctx_id, uint64_t flags)
> +static void rc6_idle(int i915, uint32_t ctx_id, uint64_t flags, unsigned int gt)
>   {
>   	const int64_t duration_ns = SLEEP_DURATION * (int64_t)NSEC_PER_SEC;
>   	const int tolerance = 20; /* Some RC6 is better than none! */
> @@ -397,7 +397,7 @@ static void rc6_idle(int i915, uint32_t ctx_id, uint64_t flags)
>   	struct igt_power gpu;
>   	int fd;
>   
> -	fd = open_pmu(i915, I915_PMU_RC6_RESIDENCY);
> +	fd = open_pmu(i915, __I915_PMU_RC6_RESIDENCY(gt));
>   	igt_drop_caches_set(i915, DROP_IDLE);
>   	igt_require(__pmu_wait_for_rc6(fd));
>   	igt_power_open(i915, &gpu, "gpu");
> @@ -471,12 +471,13 @@ static void rc6_idle(int i915, uint32_t ctx_id, uint64_t flags)
>   	}
>   }
>   
> -static void rc6_fence(int i915, const intel_ctx_t *ctx)
> +static void rc6_fence(int i915, unsigned int gt)
>   {
>   	const int64_t duration_ns = SLEEP_DURATION * (int64_t)NSEC_PER_SEC;
>   	const int tolerance = 20; /* Some RC6 is better than none! */
>   	const unsigned int gen = intel_gen(intel_get_drm_devid(i915));
>   	const struct intel_execution_engine2 *e;
> +	const intel_ctx_t *ctx;
>   	struct power_sample sample[2];
>   	unsigned long slept;
>   	uint64_t rc6, ts[2], ahnd;
> @@ -485,7 +486,7 @@ static void rc6_fence(int i915, const intel_ctx_t *ctx)
>   
>   	igt_require_sw_sync();
>   
> -	fd = open_pmu(i915, I915_PMU_RC6_RESIDENCY);
> +	fd = open_pmu(i915, __I915_PMU_RC6_RESIDENCY(gt));
>   	igt_drop_caches_set(i915, DROP_IDLE);
>   	igt_require(__pmu_wait_for_rc6(fd));
>   	igt_power_open(i915, &gpu, "gpu");
> @@ -509,6 +510,7 @@ static void rc6_fence(int i915, const intel_ctx_t *ctx)
>   	assert_within_epsilon(rc6, ts[1] - ts[0], 5);
>   
>   	/* Submit but delay execution, we should be idle and conserving power */
> +	ctx = intel_ctx_create_for_gt(i915, gt);
>   	ahnd = get_reloc_ahnd(i915, ctx->id);
>   	for_each_ctx_engine(i915, ctx, e) {
>   		igt_spin_t *spin;
> @@ -550,6 +552,7 @@ static void rc6_fence(int i915, const intel_ctx_t *ctx)
>   		gem_quiescent_gpu(i915);
>   	}
>   	put_ahnd(ahnd);
> +	intel_ctx_destroy(i915, ctx);
>   
>   	igt_power_close(&gpu);
>   	close(fd);
> @@ -558,6 +561,7 @@ static void rc6_fence(int i915, const intel_ctx_t *ctx)
>   igt_main
>   {
>   	int i915 = -1;
> +	int dir, gt;
>   	const intel_ctx_t *ctx;
> 
Remove intel_ctx_create_all_physical from igt_fixture since we are not
using it anywhere
>   	/* Use drm_open_driver to verify device existence */
> @@ -572,10 +576,14 @@ igt_main
>   		igt_require_gem(i915);
>   		gem_quiescent_gpu(i915);
>   
> -		for_each_ctx_engine(i915, ctx, e) {
> -			if (e->instance == 0) {
> -				igt_dynamic_f("%s", e->name)
> -					rc6_idle(i915, ctx->id, e->flags);
> +		i915_for_each_gt(i915, dir, gt) {
> +			ctx = intel_ctx_create_for_gt(i915, gt);
> +			for_each_ctx_engine(i915, ctx, e) {
> +				if (e->instance == 0) {
> +					igt_dynamic_f("%s", gt, e->name)
format specifier missing for gt.
> +						rc6_idle(i915, ctx->id, e->flags, gt);
> +				}
> +			intel_ctx_destroy(i915, ctx);
>   			}
>   		}
>   	}
> @@ -584,7 +592,9 @@ igt_main
>   		igt_require_gem(i915);
>   		gem_quiescent_gpu(i915);
This should be changed from igt_subtest to igt_subtest_with_dynamic.

Thanks
Riana
>   
> -		rc6_fence(i915, ctx);
> +		i915_for_each_gt(i915, dir, gt)
> +			igt_dynamic_f("gt%u", gt)
> +				rc6_fence(i915, gt);
>   	}
>   
>   	igt_subtest_group {

  parent reply	other threads:[~2023-08-22  5:37 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-08-21 12:57 [igt-dev] [PATCH i-g-t] tests/i915_pm_rc6_residency: Add mutli-gt functionality to rc6_idle and rc6_fence test Sujaritha Sundaresan
2023-08-21 13:22 ` [igt-dev] ✗ GitLab.Pipeline: warning for " Patchwork
2023-08-21 13:51 ` [igt-dev] ○ CI.xeBAT: info " Patchwork
2023-08-21 13:58 ` [igt-dev] ✗ Fi.CI.BAT: failure " Patchwork
2023-08-22  5:36 ` Riana Tauro [this message]
2023-08-22  5:39   ` [igt-dev] [PATCH i-g-t] " Sundaresan, Sujaritha

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