From: Jani Nikula <jani.nikula@intel.com>
To: vitaly.prosyak@amd.com, igt-dev@lists.freedesktop.org
Cc: Vitaly Prosyak <vitaly.prosyak@amd.com>,
Jesse Zhang <jesse.zhang@amd.com>
Subject: Re: [PATCH] lib/amdgpu: Add ASIC filtering system with family ranges
Date: Wed, 22 Apr 2026 10:57:12 +0300 [thread overview]
Message-ID: <4d020ccc16ddc6cc0d222a7366e4802af3bfcefa@intel.com> (raw)
In-Reply-To: <20260422041725.172582-1-vitaly.prosyak@amd.com>
On Wed, 22 Apr 2026, <vitaly.prosyak@amd.com> wrote:
> From: Vitaly Prosyak <vitaly.prosyak@amd.com>
>
> Add comprehensive ASIC-based test filtering system following IGT
> coding standards with three-tier priority configuration.
I would have expected an attempt to make an IGT shared filtering system
generic enough to plug into any vendor's platforms, instead of going
all-in on AMD only.
That should be the mindset anyway, try to make it generic first. At the
very least the commit message should explain why this is AMD specific,
what it would take to make it generic, and "we didn't even think about
it" is just not good enough.
BR,
Jani.
>
> Structure and Design:
> - Uses family range arrays similar to amd_queue_reset.c
> - Supports up to 4 ASIC ranges per skip rule
> - Intensive use of amdgpu_asic_addr.h definitions (FAMILY_*, AMDGPU_*_RANGE)
> - No global variables - all state in struct asic_filter_context
> - Read-only static const tables (asic_table, builtin_skip_table)
>
> Three-Tier Priority System:
> 1. Built-in production array (checked first, requires rebuild)
> 2. Config file /etc/igt/asic_skip.conf (development, no rebuild)
> 3. Environment variable IGT_ASIC_SKIP_CONFIG (runtime, no rebuild)
>
> Features:
> - Family range structure: {family_id, chip_id_min, chip_id_max}
> - Glob pattern matching for subtests (fnmatch)
> - Comprehensive deployment guide in source code
> - 10 commented examples in builtin_skip_table[]
> - Complete family & range documentation
> - Dump functionality showing all three sources
>
> Documentation in Source:
> - 5-step deployment guide
> - Family & range reference (9 families, 18 ranges)
> - Glob patterns guide
> - 10 ready-to-use examples
>
> Files Added:
> - lib/amdgpu/amd_asic_filter.h - API and structures
> - lib/amdgpu/amd_asic_filter.c - Full implementation with guide
>
> Cc: Jesse Zhang <jesse.zhang@amd.com>
> Signed-off Vitaly Prosyak <vitaly.prosyak@amd.com>
--
Jani Nikula, Intel
next prev parent reply other threads:[~2026-04-22 7:57 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-22 4:17 [PATCH] lib/amdgpu: Add ASIC filtering system with family ranges vitaly.prosyak
2026-04-22 4:28 ` Zhang, Jesse(Jie)
2026-04-22 6:15 ` ✓ i915.CI.BAT: success for " Patchwork
2026-04-22 6:23 ` ✓ Xe.CI.BAT: " Patchwork
2026-04-22 7:57 ` Jani Nikula [this message]
2026-04-22 14:40 ` [PATCH] " vitaly prosyak
2026-04-24 14:04 ` Jani Nikula
2026-04-24 17:09 ` vitaly prosyak
2026-04-22 10:19 ` ✗ Xe.CI.FULL: failure for " Patchwork
2026-04-23 9:41 ` ✓ i915.CI.Full: success " Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=4d020ccc16ddc6cc0d222a7366e4802af3bfcefa@intel.com \
--to=jani.nikula@intel.com \
--cc=igt-dev@lists.freedesktop.org \
--cc=jesse.zhang@amd.com \
--cc=vitaly.prosyak@amd.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox