From: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
To: "Hajda, Andrzej" <andrzej.hajda@intel.com>,
<igt-dev@lists.freedesktop.org>
Cc: <christoph.manszewski@intel.com>, <jonathan.cavitt@intel.com>,
<mika.kuoppala@intel.com>, <dominik.grzegorzek@intel.com>
Subject: Re: [PATCH i-g-t v2 1/4] lib/gppgu_shader: Add write D32 to ppgtt virtual address
Date: Fri, 22 Nov 2024 16:28:21 +0200 [thread overview]
Message-ID: <546ceac0-ecc6-4d9f-a09a-ebd5205fe384@intel.com> (raw)
In-Reply-To: <741fbc09-652b-4ab3-a6ba-699f9ab5b900@intel.com>
On 11/22/24 12:47 PM, Hajda, Andrzej wrote:
>
>>>> +{
>>>> + uint64_t addr = CANONICAL(ppgtt_addr);
>>>> + igt_assert_f((addr & 0x3) == 0, "address must be aligned to
>>>> DWord!\n");
>>>> +
>>>> + emit_iga64_code(shdr, write_a64_dword, " \n\
>>>> +#if GEN_VER >= 2000 \n\
>>>> +// Unyped 2D Block Store \n\
>>>> +// Instruction_Store2DBlock \n\
>>>> +// bspec: 63981 \n\
>>>> +// src0 address payload (Untyped2DBLOCKAddressPayload) specifies
>>>> both \n\
>>>> +// the block parameters and the 2D Surface
>>>> parameters. \n\
>>>> +// src1 data payload format is selected by Data
>>>> Size. \n\
>>>> +// Untyped2DBLOCKAddressPayload \n\
>>>> +// bspec: 63986 \n\
>>>> +// [243:240] Array Length: 0 (length is 1) \n\
>>>> +// [239:232] Block Height: 0 (height is 1) \n\
>>>> +// [231:224] Block Width: 0xf (width is 16) \n\
>>>> +// [223:192] Block Start Y: 0 \n\
>>>> +// [191:160] Block Start X: 0 \n\
>>>> +// [159:128] Untyped 2D Surface Pitch: 0x3f (pitch is 64
>>>> bytes) \n\
>>>> +// [127:96] Untyped 2D Surface Height: 0 (height is
>>>> 1) \n\
>>>> +// [95:64] Untyped 2D Surface Width: 0x3f (width is 64
>>>> bytes) \n\
>>>> +// [63:0] Untyped 2D Surface Base Address \n\
>>>> +// initialize register \n\
>>>> +(W) mov (8) r30.0<1>:uq 0x0:uq \n\
>>>> +// [0:31] Untyped 2D Surface Base Address low \n\
>>>> +(W) mov (1) r30.0<1>:ud ARG(0):ud \n\
>>>> +// [32:63] Untyped 2D Surface Base Address high \n\
>>>> +(W) mov (1) r30.1<1>:ud ARG(1):ud \n\
>>>> +// [95:64] Untyped 2D Surface Width: 0x3f \n\
>>>> +// (Width minus 1 (in bytes) of the 2D surface, it represents
>>>> 64) \n\
>>>> +(W) mov (1) r30.2<1>:ud 0x3f:ud \n\
>>>> +// [127:96] Untyped 2D Surface Height: 0x0 \n\
>>>> +// (Height minus 1 (in number of data elements)
>>>> of \n\
>>>> +// the Untyped 2D surface, it represents 1) \n\
>>>> +(W) mov (1) r30.3<1>:ud 0x0:ud \n\
>>>> +// [159:128] Untyped 2D Surface Pitch: 0x3f \n\
>>>> +// (Pitch minus 1 (in bytes) of the 2D surface, it
>>>> represents 64) \n\
>>>> +(W) mov (1) r30.4<1>:ud 0x3f:ud \n\
>>>> +// [231:224] Block Width: 0xf (15) \n\
>>>> +// (Specifies the width minus 1 (in number of data
>>>> elements) for this \n\
>>>> +// rectangular region, it represents 16) \n\
>>>> +// Block width (encoded_value + 1) must be a multiple of DW (4
>>>> bytes). \n\
>>>> +// [239:232] Block Height: 0 \n\
>>>> +// (Specifies the height minus 1 (in number of data
>>>> elements) for \n\
>>>> +// this rectangular region, it represents 1) \n\
>>>> +// [243:240] Array Length: 0 \n\
>>>> +// (Specifies Array Length minus 1 for Load2DBlockArray
>>>> messages, \n\
>>>> +// must be zero for 2D Block Store messages, it represents
>>>> 1) \n\
>>>> +(W) mov (1) r30.7<1>:ud 0xf:ud \n\
>>>
>>>
>>> Shouldn't this be 0x3:ud now, for dword ?
>>>
>> No, r30.7 needs to set 0xf:ud.
>
>
> 0xf mean block width is 16 bytes, it means 4 dwords, in the description
> you says one d32,
>
> to source register r31 you enter also d32, and zeroes the rest.
>
> So what is going here? Writing one dword, or 4dwords (one provided, and
> the rest 0) ?
>
Good catch.
Yes it should be changed to use 1 dword from 4dwords as you commented.
I'll update both read and write functions.
Thanks!
G.G.
next prev parent reply other threads:[~2024-11-22 14:29 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-11-21 12:22 [PATCH i-g-t v2 0/4] tests/intel/xe_eudebug_online: Introduce read/write pagefault tests Gwan-gyeong Mun
2024-11-21 12:22 ` [PATCH i-g-t v2 1/4] lib/gppgu_shader: Add write D32 to ppgtt virtual address Gwan-gyeong Mun
2024-11-21 16:08 ` Hajda, Andrzej
2024-11-22 7:51 ` Gwan-gyeong Mun
2024-11-22 10:47 ` Hajda, Andrzej
2024-11-22 14:28 ` Gwan-gyeong Mun [this message]
2024-11-21 12:22 ` [PATCH i-g-t v2 2/4] lib/gppgu_shader: Add read D32 from " Gwan-gyeong Mun
2024-11-21 16:14 ` Hajda, Andrzej
2024-11-22 7:54 ` Gwan-gyeong Mun
2024-11-21 12:22 ` [PATCH i-g-t v2 3/4] eudebug: Add eudebug pagefault event declarations Gwan-gyeong Mun
2024-11-21 12:22 ` [PATCH i-g-t v2 4/4] tests/intel/xe_eudebug_online: Add read/write pagefault online tests Gwan-gyeong Mun
2024-11-21 16:17 ` Hajda, Andrzej
2024-11-21 17:12 ` Manszewski, Christoph
2024-11-22 8:21 ` Gwan-gyeong Mun
2024-11-22 9:55 ` Manszewski, Christoph
2024-11-22 14:33 ` Gwan-gyeong Mun
2024-11-21 14:36 ` ✓ Xe.CI.BAT: success for tests/intel/xe_eudebug_online: Introduce read/write pagefault tests (rev2) Patchwork
2024-11-21 14:51 ` ✗ i915.CI.BAT: failure " Patchwork
2024-11-21 21:16 ` ✗ Xe.CI.Full: " Patchwork
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