From: Riana Tauro <riana.tauro@intel.com>
To: Sujaritha Sundaresan <sujaritha.sundaresan@intel.com>,
<igt-dev@lists.freedesktop.org>
Subject: Re: [igt-dev] [v2 2/5] tests/intel: Add multi-gt support for rc6-fence test
Date: Fri, 10 Nov 2023 19:22:41 +0530 [thread overview]
Message-ID: <5c07e5b9-28cf-40c5-9d02-81bea7e9cc64@intel.com> (raw)
In-Reply-To: <20231109110050.388343-3-sujaritha.sundaresan@intel.com>
On 11/9/2023 4:30 PM, Sujaritha Sundaresan wrote:
> Add multi-gt support for the rc6-fence subtest.
>
> Signed-off-by: Sujaritha Sundaresan <sujaritha.sundaresan@intel.com>
LGTM.
Reviewed-by: Riana Tauro <riana.tauro@intel.com>
> ---
> tests/intel/i915_pm_rc6_residency.c | 13 +++++++++----
> 1 file changed, 9 insertions(+), 4 deletions(-)
>
> diff --git a/tests/intel/i915_pm_rc6_residency.c b/tests/intel/i915_pm_rc6_residency.c
> index 57ac5c721..5dc785792 100644
> --- a/tests/intel/i915_pm_rc6_residency.c
> +++ b/tests/intel/i915_pm_rc6_residency.c
> @@ -471,12 +471,13 @@ static void rc6_idle(int i915, uint32_t ctx_id, uint64_t flags, unsigned int gt)
> }
> }
>
> -static void rc6_fence(int i915, const intel_ctx_t *ctx)
> +static void rc6_fence(int i915, unsigned int gt)
> {
> const int64_t duration_ns = SLEEP_DURATION * (int64_t)NSEC_PER_SEC;
> const int tolerance = 20; /* Some RC6 is better than none! */
> const unsigned int gen = intel_gen(intel_get_drm_devid(i915));
> const struct intel_execution_engine2 *e;
> + const intel_ctx_t *ctx;
> struct power_sample sample[2];
> unsigned long slept;
> uint64_t rc6, ts[2], ahnd;
> @@ -485,7 +486,7 @@ static void rc6_fence(int i915, const intel_ctx_t *ctx)
>
> igt_require_sw_sync();
>
> - fd = open_pmu(i915, I915_PMU_RC6_RESIDENCY);
> + fd = open_pmu(i915, __I915_PMU_RC6_RESIDENCY(gt));
> igt_drop_caches_set(i915, DROP_IDLE);
> igt_require(__pmu_wait_for_rc6(fd));
> igt_power_open(i915, &gpu, "gpu");
> @@ -509,6 +510,7 @@ static void rc6_fence(int i915, const intel_ctx_t *ctx)
> assert_within_epsilon(rc6, ts[1] - ts[0], 5);
>
> /* Submit but delay execution, we should be idle and conserving power */
> + ctx = intel_ctx_create_for_gt(i915, gt);
> ahnd = get_reloc_ahnd(i915, ctx->id);
> for_each_ctx_engine(i915, ctx, e) {
> igt_spin_t *spin;
> @@ -550,6 +552,7 @@ static void rc6_fence(int i915, const intel_ctx_t *ctx)
> gem_quiescent_gpu(i915);
> }
> put_ahnd(ahnd);
> + intel_ctx_destroy(i915, ctx);
>
> igt_power_close(&gpu);
> close(fd);
> @@ -585,11 +588,13 @@ igt_main
> }
> }
>
> - igt_subtest("rc6-fence") {
> + igt_subtest_with_dynamic("rc6-fence") {
> igt_require_gem(i915);
> gem_quiescent_gpu(i915);
>
> - rc6_fence(i915, ctx);
> + i915_for_each_gt(i915, dirfd, gt)
> + igt_dynamic_f("gt%u", gt)
> + rc6_fence(i915, gt);
> }
>
> igt_subtest_group {
next prev parent reply other threads:[~2023-11-10 13:52 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-09 11:00 [igt-dev] [v2 0/5] Add multi-gt support for RC6 residency test Sujaritha Sundaresan
2023-11-09 11:00 ` [igt-dev] [v2 1/5] tests/intel: Add multi-gt support for rc6-idle test Sujaritha Sundaresan
2023-11-10 13:46 ` Riana Tauro
2023-11-10 13:50 ` Riana Tauro
2023-11-13 3:41 ` Sundaresan, Sujaritha
2023-11-09 11:00 ` [igt-dev] [v2 2/5] tests/intel: Add multi-gt support for rc6-fence test Sujaritha Sundaresan
2023-11-10 13:52 ` Riana Tauro [this message]
2023-11-09 11:00 ` [igt-dev] [v2 3/5] tests/intel: Add multi-gt support for rc6-accuracy test Sujaritha Sundaresan
2023-11-09 11:00 ` [igt-dev] [v2 4/5] tests/intel: Print drpc info for rc6_residency test Sujaritha Sundaresan
2023-11-10 14:01 ` Riana Tauro
2023-11-13 3:41 ` Sundaresan, Sujaritha
2023-11-13 4:54 ` Riana Tauro
2023-11-09 11:00 ` [igt-dev] [v2 5/5] HAX: Add rc6 residency to fast-feedback.testlist Sujaritha Sundaresan
2023-11-09 14:02 ` [igt-dev] ✓ CI.xeBAT: success for Add multi-gt support for RC6 residency test (rev5) Patchwork
2023-11-09 14:14 ` [igt-dev] ✗ Fi.CI.BAT: failure " Patchwork
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