[PATCH i-g-t v3 0/8] tests/xe: Add purgeable memory madvise tests for system allocator

[PATCH i-g-t v3 0/8] tests/xe: Add purgeable memory madvise tests for system allocator

[Arvind Yadav]

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This series adds IGT tests for the purgeable memory madvise functionality
in the XE driver's system allocator path.

Purgeable memory allows userspace to mark buffer objects as DONTNEED,
making them eligible for kernel reclamation under memory pressure. This
is critical for mobile and memory-constrained platforms to prevent OOM
conditions while managing temporary or regeneratable GPU data.

The test suite validates:
- Basic purgeable lifecycle (WILLNEED -> DONTNEED -> PURGED)
- "Once purged, always purged" semantics (i915 compatibility)
- Per-VMA purgeable state tracking for shared buffers
- CPU fault handling on purged BOs (SIGBUS/SIGSEGV)
- GPU execution with purged memory and scratch page protection
- Proper state transitions across multiple VMs

Purgeable Memory States:-
 - **WILLNEED (0)**: Memory is actively needed, kernel should not
		     reclaim it.
 - **DONTNEED (1)**: Application doesn't need this memory right now,
                     kernel can reclaim it if needed

Retained Value
 When querying purgeable state, the kernel returns:
 - retained = 1: Memory is still present (not purged)
 - retained = 0: Memory was purged/reclaimed

Kernel dependency: https://patchwork.freedesktop.org/series/156651/

Test Cases :
  1. madvise-purgeable-dontneed-before-mmap
  	Purpose: Validate that mmap fails on already-purged BO

  2. madvise-purgeable-dontneed-after-mmap
	Purpose: Validate that accessing an existing mapping of purged memory
	         triggers SIGBUS/SIGSEGV.

  3. madvise-purgeable-dontneed-before-exec
	Purpose: Validate GPU execution on purgeable BO (before it's used).

  4. madvise-purgeable-dontneed-after-exec
	Purpose: Validate that previously-used BO can be purged and becomes
                 inaccessible.

  5. madvise-purgeable-per-vma-tracking
	Purpose: Validate per-VMA purgeable state tracking

  6. madvise-purgeable-per-vma-protection
	Purpose: Validate that WILLNEED VMA protects BO from purging during
                 GPU operations.

v2:
   - Move tests from xe_exec_system_allocator.c to dedicated
     xe_madvise.c (Thomas Hellström).
   - Fix trigger_memory_pressure to use scalable overpressure
    (25% of VRAM, minimum 64MB instead of fixed 64MB). (Pravalika)
   - Add MAP_FAILED check in trigger_memory_pressure.
   - Touch all pages in allocated chunks, not just first 4KB. (Pravalika)
   - Add 100ms sleep before freeing BOs to allow shrinker time
     to process memory pressure.  (Pravalika)
   - Rename 'bo2' to 'handle' for clarity in trigger_memory_pressure.(Pravalika)
   - Add NEEDS_VISIBLE_VRAM flag to purgeable_setup_simple_bo
     for consistent CPU mapping support on discrete GPUs.  (Pravalika)
   - Add proper NULL mmap handling in test_dontneed_before_mmap
      with cleanup and early return.  (Pravalika)

v3:
   - Added separate commits for each individual test case. (Pravalika)

Arvind Yadav (7):
  lib/xe: Add purgeable memory ioctl support
  tests/intel/xe_madvise: Add dontneed-before-mmap subtest
  tests/intel/xe_madvise: Add dontneed-after-mmap subtest
  tests/intel/xe_madvise: Add dontneed-before-exec subtest
  tests/intel/xe_madvise: Add dontneed-after-exec subtest
  tests/intel/xe_madvise: Add per-vma-tracking subtest
  tests/intel/xe_madvise: Add per-vma-protection subtest

Himal Prasad Ghimiray (1):
  drm-uapi/xe_drm: Add UAPI support for purgeable buffer objects

 include/drm-uapi/xe_drm.h |  44 +++
 lib/xe/xe_ioctl.c         |  33 ++
 lib/xe/xe_ioctl.h         |   2 +
 tests/intel/xe_madvise.c  | 731 ++++++++++++++++++++++++++++++++++++++
 tests/meson.build         |   1 +
 5 files changed, 811 insertions(+)
 create mode 100644 tests/intel/xe_madvise.c

-- 
2.43.0

[PATCH i-g-t v3 1/8] drm-uapi/xe_drm: Add UAPI support for purgeable buffer objects

[Arvind Yadav]

From: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>

Extend the DRM_XE_MADVISE ioctl to support purgeable buffer object
management by adding DRM_XE_VMA_ATTR_PURGEABLE_STATE attribute type.

This allows userspace applications to provide memory usage hints to
the kernel for better memory management under pressure:

This allows userspace applications to provide memory usage hints to
the kernel for better memory management under pressure:

- WILLNEED: Buffer is needed and should not be purged. If the BO was
  previously purged, retained field returns 0 indicating backing store
  was lost (once purged, always purged semantics matching i915).

- DONTNEED: Buffer is not currently needed and may be purged by the
  kernel under memory pressure to free resources. Only applies to
  non-shared BOs.

The implementation includes a 'retained' output field (matching i915's
drm_i915_gem_madvise.retained) that indicates whether the BO's backing
store still exists (1) or has been purged (0).

v2:
  - Update UAPI documentation to clarify retained must be initialized
    to 0(Thomas)

Cc: Nishit Sharma <nishit.sharma@intel.com>
Cc: Pravalika Gurram <pravalika.gurram@intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Signed-off-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
Signed-off-by: Arvind Yadav <arvind.yadav@intel.com>
---
 include/drm-uapi/xe_drm.h | 44 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 44 insertions(+)

diff --git a/include/drm-uapi/xe_drm.h b/include/drm-uapi/xe_drm.h
index 077e66a68..3dd1ba875 100644
--- a/include/drm-uapi/xe_drm.h
+++ b/include/drm-uapi/xe_drm.h
@@ -2099,6 +2099,7 @@ struct drm_xe_madvise {
 #define DRM_XE_MEM_RANGE_ATTR_PREFERRED_LOC	0
 #define DRM_XE_MEM_RANGE_ATTR_ATOMIC		1
 #define DRM_XE_MEM_RANGE_ATTR_PAT		2
+#define DRM_XE_VMA_ATTR_PURGEABLE_STATE		3
 	/** @type: type of attribute */
 	__u32 type;
 
@@ -2189,6 +2190,49 @@ struct drm_xe_madvise {
 			/** @pat_index.reserved: Reserved */
 			__u64 reserved;
 		} pat_index;
+
+		/**
+		 * @purge_state_val: Purgeable state configuration
+		 *
+		 * Used when @type == DRM_XE_VMA_ATTR_PURGEABLE_STATE.
+		 *
+		 * Configures the purgeable state of buffer objects in the specified
+		 * virtual address range. This allows applications to hint to the kernel
+		 * about bo's usage patterns for better memory management.
+		 *
+		 * Supported values for @purge_state_val.val:
+		 *  - DRM_XE_VMA_PURGEABLE_STATE_WILLNEED (0): Marks BO as needed.
+		 *    If BO was purged, returns retained=0 (backing store lost).
+		 *
+		 *  - DRM_XE_VMA_PURGEABLE_STATE_DONTNEED (1): Hints that BO is not
+		 *    currently needed. Kernel may purge it under memory pressure.
+		 *    Only applies to non-shared BOs. Returns retained=1 if not purged.
+		 */
+		struct {
+#define DRM_XE_VMA_PURGEABLE_STATE_WILLNEED	0
+#define DRM_XE_VMA_PURGEABLE_STATE_DONTNEED	1
+			/** @purge_state_val.val: value for DRM_XE_VMA_ATTR_PURGEABLE_STATE */
+			__u32 val;
+
+			/* @purge_state_val.pad */
+			__u32 pad;
+			/**
+			 * @purge_state_val.retained: Pointer to output field for backing
+			 * store status.
+			 *
+			 * Userspace must initialize this u32 field to 0 before the
+			 * ioctl. Kernel writes to it after the operation:
+			 * - 1 if backing store exists (not purged)
+			 * - 0 if backing store was purged
+			 *
+			 * If userspace fails to initialize to 0, ioctl returns -EINVAL.
+			 * This ensures a safe default (0 = assume purged) if kernel
+			 * cannot write the result.
+			 *
+			 * Similar to i915's drm_i915_gem_madvise.retained field.
+			 */
+			__u64 retained;
+		} purge_state_val;
 	};
 
 	/** @reserved: Reserved */
-- 
2.43.0

[PATCH i-g-t v3 2/8] lib/xe: Add purgeable memory ioctl support

[Arvind Yadav]

Add xe_vm_madvise_purgeable() helper function to support purgeable
memory management through the XE madvise ioctl. This allows applications
to hint to the kernel about buffer object usage patterns for better
memory management under pressure.

The function provides a clean interface to:
- Mark buffer objects as DONTNEED (purgeable)
- Mark buffer objects as WILLNEED (not purgeable)

Returns the retained value directly (1 if backing store exists, 0 if
purged).

Also update __xe_vm_madvise() to reject purgeable state operations
and direct users to the dedicated helper.

v2:
  - retained must be initialized to 0(Thomas)

Cc: Nishit Sharma <nishit.sharma@intel.com>
Cc: Pravalika Gurram <pravalika.gurram@intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
Signed-off-by: Arvind Yadav <arvind.yadav@intel.com>
---
 lib/xe/xe_ioctl.c | 33 +++++++++++++++++++++++++++++++++
 lib/xe/xe_ioctl.h |  2 ++
 2 files changed, 35 insertions(+)

diff --git a/lib/xe/xe_ioctl.c b/lib/xe/xe_ioctl.c
index 16aae05c9..b61f85b7b 100644
--- a/lib/xe/xe_ioctl.c
+++ b/lib/xe/xe_ioctl.c
@@ -739,6 +739,9 @@ int __xe_vm_madvise(int fd, uint32_t vm, uint64_t addr, uint64_t range,
 	case DRM_XE_MEM_RANGE_ATTR_PAT:
 		madvise.pat_index.val = op_val;
 		break;
+	case DRM_XE_VMA_ATTR_PURGEABLE_STATE:
+		/* Purgeable state handled by xe_vm_madvise_purgeable */
+		return -EINVAL;
 	default:
 		igt_warn("Unknown attribute\n");
 		return -EINVAL;
@@ -775,6 +778,36 @@ void xe_vm_madvise(int fd, uint32_t vm, uint64_t addr, uint64_t range,
 				      instance), 0);
 }
 
+/**
+ * xe_vm_madvise_purgeable:
+ * @fd: xe device fd
+ * @vm_id: vm_id of the virtual range
+ * @start: start of the virtual address range
+ * @range: size of the virtual address range
+ * @state: purgeable state (DRM_XE_VMA_PURGEABLE_STATE_WILLNEED or DONTNEED)
+ *
+ * Sets the purgeable state for a virtual memory range. This allows applications
+ * to hint to the kernel about buffer object usage patterns for better memory management.
+ *
+ * Returns: retained value (1 if backing store exists, 0 if purged)
+ */
+uint32_t xe_vm_madvise_purgeable(int fd, uint32_t vm_id, uint64_t start,
+				 uint64_t range, uint32_t state)
+{
+	uint32_t retained_val = 0;
+	struct drm_xe_madvise madvise = {
+		.vm_id = vm_id,
+		.start = start,
+		.range = range,
+		.type = DRM_XE_VMA_ATTR_PURGEABLE_STATE,
+		.purge_state_val.val = state,
+		.purge_state_val.retained = (uint64_t)(uintptr_t)&retained_val,
+	};
+
+	igt_assert_eq(igt_ioctl(fd, DRM_IOCTL_XE_MADVISE, &madvise), 0);
+	return retained_val;
+}
+
 #define	BIND_SYNC_VAL	0x686868
 void xe_vm_bind_lr_sync(int fd, uint32_t vm, uint32_t bo, uint64_t offset,
 			uint64_t addr, uint64_t size, uint32_t flags)
diff --git a/lib/xe/xe_ioctl.h b/lib/xe/xe_ioctl.h
index 3ea651063..8eb506915 100644
--- a/lib/xe/xe_ioctl.h
+++ b/lib/xe/xe_ioctl.h
@@ -107,6 +107,8 @@ int __xe_vm_madvise(int fd, uint32_t vm, uint64_t addr, uint64_t range, uint64_t
 		    uint32_t type, uint32_t op_val, uint16_t policy, uint16_t instance);
 void xe_vm_madvise(int fd, uint32_t vm, uint64_t addr, uint64_t range, uint64_t ext,
 		   uint32_t type, uint32_t op_val, uint16_t policy, uint16_t instance);
+uint32_t xe_vm_madvise_purgeable(int fd, uint32_t vm_id, uint64_t start,
+				 uint64_t range, uint32_t state);
 int xe_vm_number_vmas_in_range(int fd, struct drm_xe_vm_query_mem_range_attr *vmas_attr);
 int xe_vm_vma_attrs(int fd, struct drm_xe_vm_query_mem_range_attr *vmas_attr,
 		    struct drm_xe_mem_range_attr *mem_attr);
-- 
2.43.0

[PATCH i-g-t v3 3/8] tests/intel/xe_madvise: Add dontneed-before-mmap subtest

[Arvind Yadav]

This test validates kernel behavior when mapping a BO that was already
marked as purgeable and purged before mmap. After purging the BO under
memory pressure, the test attempts to mmap and access it. The kernel
should trigger SIGBUS or SIGSEGV when accessing the purged mapping,
confirming that purged memory is properly invalidated.

Cc: Nishit Sharma <nishit.sharma@intel.com>
Cc: Pravalika Gurram <pravalika.gurram@intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
Signed-off-by: Arvind Yadav <arvind.yadav@intel.com>
---
 tests/intel/xe_madvise.c | 219 +++++++++++++++++++++++++++++++++++++++
 tests/meson.build        |   1 +
 2 files changed, 220 insertions(+)
 create mode 100644 tests/intel/xe_madvise.c

diff --git a/tests/intel/xe_madvise.c b/tests/intel/xe_madvise.c
new file mode 100644
index 000000000..7dbe70f42
--- /dev/null
+++ b/tests/intel/xe_madvise.c
@@ -0,0 +1,219 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2025 Intel Corporation
+ */
+
+/**
+ * TEST: Validate purgeable BO madvise functionality
+ * Category: Core
+ * Mega feature: General Core features
+ * Sub-category: Memory management tests
+ * Functionality: madvise, purgeable
+ */
+
+#include "igt.h"
+#include "xe_drm.h"
+
+#include "xe/xe_ioctl.h"
+#include "xe/xe_query.h"
+
+/* Purgeable test constants */
+#define PURGEABLE_ADDR		0x1a0000
+#define PURGEABLE_BO_SIZE	4096
+
+/**
+ * trigger_memory_pressure - Fill VRAM + 25% to force purgeable reclaim
+ * @fd: DRM file descriptor
+ * @vm: VM handle (unused, kept for API compatibility)
+ *
+ * Allocates BOs in a temporary VM until VRAM is overcommitted,
+ * forcing the kernel to purge DONTNEED-marked BOs.
+ */
+static void trigger_memory_pressure(int fd, uint32_t vm)
+{
+	uint64_t vram_size, overpressure;
+	const uint64_t chunk = 8ull << 20; /* 8 MiB */
+	int max_objs, n = 0;
+	uint32_t *handles;
+	uint64_t total;
+	void *p;
+	uint32_t handle, temp_vm;
+
+	/* Use a separate VM so pressure BOs don't affect the test VM */
+	temp_vm = xe_vm_create(fd, 0, 0);
+
+	vram_size = xe_visible_vram_size(fd, 0);
+	/* Scale overpressure to 25% of VRAM, minimum 64MB */
+	overpressure = vram_size / 4;
+	if (overpressure < (64 << 20))
+		overpressure = 64 << 20;
+
+	max_objs = (vram_size + overpressure) / chunk + 1;
+	handles = malloc(max_objs * sizeof(*handles));
+	igt_assert(handles);
+
+	total = 0;
+	while (total < vram_size + overpressure && n < max_objs) {
+		handle = xe_bo_create(fd, temp_vm, chunk,
+				      vram_if_possible(fd, 0),
+				      DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);
+		handles[n++] = handle;
+		total += chunk;
+
+		p = xe_bo_map(fd, handle, chunk);
+		igt_assert(p != MAP_FAILED);
+
+		/* Fault in all pages so they actually consume VRAM */
+		memset(p, 0xCD, chunk);
+		munmap(p, chunk);
+	}
+
+	/* Allow shrinker time to process pressure */
+	usleep(100000);
+
+	for (int i = 0; i < n; i++)
+		gem_close(fd, handles[i]);
+
+	free(handles);
+
+	xe_vm_destroy(fd, temp_vm);
+}
+
+static jmp_buf jmp;
+
+__noreturn static void sigtrap(int sig)
+{
+	siglongjmp(jmp, sig);
+}
+
+/**
+ * purgeable_mark_and_verify_purged - Mark DONTNEED, pressure, check purged
+ * @fd: DRM file descriptor
+ * @vm: VM handle
+ * @addr: Virtual address of the BO
+ * @size: Size of the BO
+ *
+ * Returns true if the BO was purged under memory pressure.
+ */
+static bool purgeable_mark_and_verify_purged(int fd, uint32_t vm, uint64_t addr, size_t size)
+{
+	uint32_t retained;
+
+	/* Mark as DONTNEED */
+	retained = xe_vm_madvise_purgeable(fd, vm, addr, size,
+					   DRM_XE_VMA_PURGEABLE_STATE_DONTNEED);
+	if (retained != 1)
+		return false;
+
+	/* Trigger memory pressure */
+	trigger_memory_pressure(fd, vm);
+
+	/* Verify purged */
+	retained = xe_vm_madvise_purgeable(fd, vm, addr, size,
+					   DRM_XE_VMA_PURGEABLE_STATE_WILLNEED);
+	return retained == 0;
+}
+
+/**
+ * purgeable_setup_simple_bo - Setup VM and bind a single BO
+ * @fd: DRM file descriptor
+ * @vm: Output VM handle
+ * @bo: Output BO handle
+ * @addr: Virtual address to bind at
+ * @size: Size of the BO
+ * @use_scratch: Whether to use scratch page flag
+ *
+ * Helper to create VM, BO, and bind it at the specified address.
+ */
+static void purgeable_setup_simple_bo(int fd, uint32_t *vm, uint32_t *bo,
+				      uint64_t addr, size_t size, bool use_scratch)
+{
+	struct drm_xe_sync sync = {
+		.type = DRM_XE_SYNC_TYPE_USER_FENCE,
+		.flags = DRM_XE_SYNC_FLAG_SIGNAL,
+		.timeline_value = 1,
+	};
+	uint64_t sync_val = 0;
+
+	*vm = xe_vm_create(fd, use_scratch ? DRM_XE_VM_CREATE_FLAG_SCRATCH_PAGE : 0, 0);
+	*bo = xe_bo_create(fd, *vm, size, vram_if_possible(fd, 0),
+			   DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);
+
+	sync.addr = to_user_pointer(&sync_val);
+	xe_vm_bind_async(fd, *vm, 0, *bo, 0, addr, size, &sync, 1);
+	xe_wait_ufence(fd, &sync_val, 1, 0, NSEC_PER_SEC);
+}
+
+/**
+ * SUBTEST: dontneed-before-mmap
+ * Description: Mark BO as DONTNEED before mmap, verify mmap fails or SIGBUS on access
+ * Test category: functionality test
+ */
+static void test_dontneed_before_mmap(int fd, struct drm_xe_engine_class_instance *hwe)
+{
+	uint32_t bo, vm;
+	uint64_t addr = PURGEABLE_ADDR;
+	size_t bo_size = PURGEABLE_BO_SIZE;
+	void *map;
+
+	purgeable_setup_simple_bo(fd, &vm, &bo, addr, bo_size, false);
+	if (!purgeable_mark_and_verify_purged(fd, vm, addr, bo_size))
+		igt_skip("Unable to induce purge on this platform/config");
+
+	/* mmap the purged BO - access should trigger SIGBUS */
+	map = xe_bo_map(fd, bo, bo_size);
+
+	{
+		sighandler_t old_sigsegv, old_sigbus;
+		char *ptr = (char *)map;
+		int sig;
+
+		old_sigsegv = signal(SIGSEGV, (__sighandler_t)sigtrap);
+		old_sigbus = signal(SIGBUS, (__sighandler_t)sigtrap);
+
+		sig = sigsetjmp(jmp, SIGBUS | SIGSEGV);
+		switch (sig) {
+		case SIGBUS:
+		case SIGSEGV:
+			/* Expected - purged BO access failed */
+			break;
+		case 0:
+			*ptr = 0;
+			__attribute__ ((fallthrough));
+		default:
+			igt_assert_f(false,
+				     "Access to purged mmap should trigger SIGBUS, got sig=%d\n",
+				     sig);
+			break;
+		}
+
+		signal(SIGBUS, old_sigbus);
+		signal(SIGSEGV, old_sigsegv);
+		munmap(map, bo_size);
+	}
+
+	gem_close(fd, bo);
+	xe_vm_destroy(fd, vm);
+}
+
+int igt_main()
+{
+	struct drm_xe_engine_class_instance *hwe;
+	int fd;
+
+	igt_fixture() {
+		fd = drm_open_driver(DRIVER_XE);
+		xe_device_get(fd);
+	}
+
+	igt_subtest("dontneed-before-mmap")
+		xe_for_each_engine(fd, hwe) {
+			test_dontneed_before_mmap(fd, hwe);
+			break;
+		}
+
+	igt_fixture() {
+		xe_device_put(fd);
+		drm_close_driver(fd);
+	}
+}
diff --git a/tests/meson.build b/tests/meson.build
index 0ad728b87..9d41d7de6 100644
--- a/tests/meson.build
+++ b/tests/meson.build
@@ -313,6 +313,7 @@ intel_xe_progs = [
 	'xe_huc_copy',
 	'xe_intel_bb',
 	'xe_live_ktest',
+	'xe_madvise',
 	'xe_media_fill',
 	'xe_mmap',
         'xe_module_load',
-- 
2.43.0

[PATCH i-g-t v3 4/8] tests/intel/xe_madvise: Add dontneed-after-mmap subtest

[Arvind Yadav]

This test verifies that an existing mmap becomes invalid after the BO
is marked as purgeable and purged. The test creates a BO, maps it,
writes data, then marks it DONTNEED and triggers memory pressure.
Accessing the previously valid mapping should now trigger SIGBUS or
SIGSEGV, confirming that existing mappings are correctly invalidated
when the backing store is purged.

Cc: Nishit Sharma <nishit.sharma@intel.com>
Cc: Pravalika Gurram <pravalika.gurram@intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
Signed-off-by: Arvind Yadav <arvind.yadav@intel.com>
---
 tests/intel/xe_madvise.c | 54 ++++++++++++++++++++++++++++++++++++++++
 1 file changed, 54 insertions(+)

diff --git a/tests/intel/xe_madvise.c b/tests/intel/xe_madvise.c
index 7dbe70f42..5c6a24553 100644
--- a/tests/intel/xe_madvise.c
+++ b/tests/intel/xe_madvise.c
@@ -196,6 +196,54 @@ static void test_dontneed_before_mmap(int fd, struct drm_xe_engine_class_instanc
 	xe_vm_destroy(fd, vm);
 }
 
+/**
+ * SUBTEST: dontneed-after-mmap
+ * Description: Mark BO as DONTNEED after mmap, verify SIGBUS on accessing purged mapping
+ * Test category: functionality test
+ */
+static void test_dontneed_after_mmap(int fd, struct drm_xe_engine_class_instance *hwe)
+{
+	uint32_t bo, vm;
+	uint64_t addr = PURGEABLE_ADDR;
+	size_t bo_size = PURGEABLE_BO_SIZE;
+	void *map;
+
+	purgeable_setup_simple_bo(fd, &vm, &bo, addr, bo_size, true);
+
+	map = xe_bo_map(fd, bo, bo_size);
+	memset(map, 0xAB, bo_size);
+
+	if (!purgeable_mark_and_verify_purged(fd, vm, addr, bo_size))
+		igt_skip("Unable to induce purge on this platform/config");
+
+	/* Access purged mapping - should trigger SIGBUS/SIGSEGV */
+	{
+		sighandler_t old_sigsegv, old_sigbus;
+		char *ptr = (char *)map;
+		int sig;
+
+		old_sigsegv = signal(SIGSEGV, (__sighandler_t)sigtrap);
+		old_sigbus = signal(SIGBUS, (__sighandler_t)sigtrap);
+
+		sig = sigsetjmp(jmp, SIGBUS | SIGSEGV);
+		if (sig == SIGBUS || sig == SIGSEGV) {
+			/* Expected - purged mapping access failed */
+		} else if (sig == 0) {
+			*ptr = 0;
+			igt_assert_f(false, "Access to purged mapping should trigger signal\n");
+		} else {
+			igt_assert_f(false, "unexpected signal %d\n", sig);
+		}
+
+		signal(SIGBUS, old_sigbus);
+		signal(SIGSEGV, old_sigsegv);
+	}
+
+	munmap(map, bo_size);
+	gem_close(fd, bo);
+	xe_vm_destroy(fd, vm);
+}
+
 int igt_main()
 {
 	struct drm_xe_engine_class_instance *hwe;
@@ -212,6 +260,12 @@ int igt_main()
 			break;
 		}
 
+	igt_subtest("dontneed-after-mmap")
+		xe_for_each_engine(fd, hwe) {
+			test_dontneed_after_mmap(fd, hwe);
+			break;
+		}
+
 	igt_fixture() {
 		xe_device_put(fd);
 		drm_close_driver(fd);
-- 
2.43.0

[PATCH i-g-t v3 5/8] tests/intel/xe_madvise: Add dontneed-before-exec subtest

[Arvind Yadav]

This test validates GPU execution behavior when a data BO is purged
before submission. The test creates a batch that writes to a data BO,
purges the data BO (while keeping the batch BO valid to avoid GPU
reset), then submits for execution. With VM_CREATE_FLAG_SCRATCH_PAGE,
the GPU write may succeed by landing on scratch memory instead of the
purged BO, demonstrating graceful handling of purged memory during
GPU operations.

Cc: Nishit Sharma <nishit.sharma@intel.com>
Cc: Pravalika Gurram <pravalika.gurram@intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
Signed-off-by: Arvind Yadav <arvind.yadav@intel.com>
---
 tests/intel/xe_madvise.c | 140 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 140 insertions(+)

diff --git a/tests/intel/xe_madvise.c b/tests/intel/xe_madvise.c
index 5c6a24553..42cf1b3e5 100644
--- a/tests/intel/xe_madvise.c
+++ b/tests/intel/xe_madvise.c
@@ -19,7 +19,11 @@
 
 /* Purgeable test constants */
 #define PURGEABLE_ADDR		0x1a0000
+#define PURGEABLE_BATCH_ADDR	0x3c0000
 #define PURGEABLE_BO_SIZE	4096
+#define PURGEABLE_FENCE_VAL	0xbeef
+#define PURGEABLE_TEST_PATTERN	0xc0ffee
+#define PURGEABLE_DEAD_PATTERN	0xdead
 
 /**
  * trigger_memory_pressure - Fill VRAM + 25% to force purgeable reclaim
@@ -144,6 +148,62 @@ static void purgeable_setup_simple_bo(int fd, uint32_t *vm, uint32_t *bo,
 	xe_wait_ufence(fd, &sync_val, 1, 0, NSEC_PER_SEC);
 }
 
+/**
+ * purgeable_setup_batch_and_data - Setup VM with batch and data BOs for GPU exec
+ * @fd: DRM file descriptor
+ * @vm: Output VM handle
+ * @bind_engine: Output bind engine handle
+ * @batch_bo: Output batch BO handle
+ * @data_bo: Output data BO handle
+ * @batch: Output batch buffer pointer
+ * @data: Output data buffer pointer
+ * @batch_addr: Batch virtual address
+ * @data_addr: Data virtual address
+ * @batch_size: Batch buffer size
+ * @data_size: Data buffer size
+ *
+ * Helper to create VM, bind engine, batch and data BOs, and bind them.
+ */
+static void purgeable_setup_batch_and_data(int fd, uint32_t *vm,
+					   uint32_t *bind_engine,
+					   uint32_t *batch_bo,
+					   uint32_t *data_bo,
+					   uint32_t **batch,
+					   uint32_t **data,
+					   uint64_t batch_addr,
+					   uint64_t data_addr,
+					   size_t batch_size,
+					   size_t data_size)
+{
+	struct drm_xe_sync sync = {
+		.type = DRM_XE_SYNC_TYPE_USER_FENCE,
+		.flags = DRM_XE_SYNC_FLAG_SIGNAL,
+		.timeline_value = PURGEABLE_FENCE_VAL,
+	};
+	uint64_t vm_sync = 0;
+
+	*vm = xe_vm_create(fd, DRM_XE_VM_CREATE_FLAG_SCRATCH_PAGE, 0);
+	*bind_engine = xe_bind_exec_queue_create(fd, *vm, 0);
+
+	/* Create and bind batch BO */
+	*batch_bo = xe_bo_create(fd, *vm, batch_size, vram_if_possible(fd, 0),
+				 DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);
+	*batch = xe_bo_map(fd, *batch_bo, batch_size);
+
+	sync.addr = to_user_pointer(&vm_sync);
+	xe_vm_bind_async(fd, *vm, *bind_engine, *batch_bo, 0, batch_addr, batch_size, &sync, 1);
+	xe_wait_ufence(fd, &vm_sync, PURGEABLE_FENCE_VAL, 0, NSEC_PER_SEC);
+
+	/* Create and bind data BO */
+	*data_bo = xe_bo_create(fd, *vm, data_size, vram_if_possible(fd, 0),
+				DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);
+	*data = xe_bo_map(fd, *data_bo, data_size);
+
+	vm_sync = 0;
+	xe_vm_bind_async(fd, *vm, *bind_engine, *data_bo, 0, data_addr, data_size, &sync, 1);
+	xe_wait_ufence(fd, &vm_sync, PURGEABLE_FENCE_VAL, 0, NSEC_PER_SEC);
+}
+
 /**
  * SUBTEST: dontneed-before-mmap
  * Description: Mark BO as DONTNEED before mmap, verify mmap fails or SIGBUS on access
@@ -244,6 +304,80 @@ static void test_dontneed_after_mmap(int fd, struct drm_xe_engine_class_instance
 	xe_vm_destroy(fd, vm);
 }
 
+/**
+ * SUBTEST: dontneed-before-exec
+ * Description: Mark BO as DONTNEED before GPU exec, verify GPU behavior with SCRATCH_PAGE
+ * Test category: functionality test
+ */
+static void test_dontneed_before_exec(int fd, struct drm_xe_engine_class_instance *hwe)
+{
+	uint32_t vm, exec_queue, bo, batch_bo, bind_engine;
+	uint64_t data_addr = PURGEABLE_ADDR;
+	uint64_t batch_addr = PURGEABLE_BATCH_ADDR;
+	size_t data_size = PURGEABLE_BO_SIZE;
+	size_t batch_size = PURGEABLE_BO_SIZE;
+	struct drm_xe_sync sync[1] = {
+		{ .type = DRM_XE_SYNC_TYPE_USER_FENCE,
+		  .flags = DRM_XE_SYNC_FLAG_SIGNAL,
+		  .timeline_value = PURGEABLE_FENCE_VAL },
+	};
+	struct drm_xe_exec exec = {
+		.num_batch_buffer = 1,
+		.num_syncs = 1,
+		.syncs = to_user_pointer(sync),
+	};
+	uint32_t *data, *batch;
+	uint64_t vm_sync = 0;
+	int b, ret;
+
+	purgeable_setup_batch_and_data(fd, &vm, &bind_engine, &batch_bo,
+				       &bo, &batch, &data, batch_addr,
+				       data_addr, batch_size, data_size);
+
+	/* Prepare batch */
+	b = 0;
+	batch[b++] = MI_STORE_DWORD_IMM_GEN4;
+	batch[b++] = data_addr;
+	batch[b++] = data_addr >> 32;
+	batch[b++] = PURGEABLE_DEAD_PATTERN;
+	batch[b++] = MI_BATCH_BUFFER_END;
+
+	/* Phase 1: Purge data BO, batch BO still valid */
+	igt_assert(purgeable_mark_and_verify_purged(fd, vm, data_addr, data_size));
+
+	exec_queue = xe_exec_queue_create(fd, vm, hwe, 0);
+	exec.exec_queue_id = exec_queue;
+	exec.address = batch_addr;
+
+	vm_sync = 0;
+	sync[0].addr = to_user_pointer(&vm_sync);
+
+	/*
+	 * VM has SCRATCH_PAGE — exec may succeed with the GPU write
+	 * landing on scratch instead of the purged data BO.
+	 */
+	ret = __xe_exec(fd, &exec);
+	if (ret == 0) {
+		int64_t timeout = NSEC_PER_SEC;
+
+		__xe_wait_ufence(fd, &vm_sync, PURGEABLE_FENCE_VAL,
+				 exec_queue, &timeout);
+	}
+
+	/*
+	 * Don't purge the batch BO — GPU would fetch zeroed scratch
+	 * instructions and trigger an engine reset.
+	 */
+
+	munmap(data, data_size);
+	munmap(batch, batch_size);
+	gem_close(fd, bo);
+	gem_close(fd, batch_bo);
+	xe_exec_queue_destroy(fd, bind_engine);
+	xe_exec_queue_destroy(fd, exec_queue);
+	xe_vm_destroy(fd, vm);
+}
+
 int igt_main()
 {
 	struct drm_xe_engine_class_instance *hwe;
@@ -266,6 +400,12 @@ int igt_main()
 			break;
 		}
 
+	igt_subtest("dontneed-before-exec")
+		xe_for_each_engine(fd, hwe) {
+			test_dontneed_before_exec(fd, hwe);
+			break;
+		}
+
 	igt_fixture() {
 		xe_device_put(fd);
 		drm_close_driver(fd);
-- 
2.43.0

[PATCH i-g-t v3 6/8] tests/intel/xe_madvise: Add dontneed-after-exec subtest

[Arvind Yadav]

This test verifies that memory can be marked purgeable and reclaimed
after successful GPU execution. The test first executes a batch that
writes to a data BO and verifies the result. It then marks the BO as
DONTNEED, triggers memory pressure to purge it, and attempts a second
execution. The second execution may fail or succeed with scratch
rebind, validating that the kernel correctly handles purged BOs in
GPU submissions.

Cc: Nishit Sharma <nishit.sharma@intel.com>
Cc: Pravalika Gurram <pravalika.gurram@intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
Signed-off-by: Arvind Yadav <arvind.yadav@intel.com>
---
 tests/intel/xe_madvise.c | 93 ++++++++++++++++++++++++++++++++++++++++
 1 file changed, 93 insertions(+)

diff --git a/tests/intel/xe_madvise.c b/tests/intel/xe_madvise.c
index 42cf1b3e5..51ef4fad3 100644
--- a/tests/intel/xe_madvise.c
+++ b/tests/intel/xe_madvise.c
@@ -16,6 +16,7 @@
 
 #include "xe/xe_ioctl.h"
 #include "xe/xe_query.h"
+#include "lib/igt_syncobj.h"
 
 /* Purgeable test constants */
 #define PURGEABLE_ADDR		0x1a0000
@@ -378,6 +379,92 @@ static void test_dontneed_before_exec(int fd, struct drm_xe_engine_class_instanc
 	xe_vm_destroy(fd, vm);
 }
 
+/**
+ * SUBTEST: dontneed-after-exec
+ * Description: Mark BO as DONTNEED after GPU exec, verify memory becomes inaccessible
+ * Test category: functionality test
+ */
+static void test_dontneed_after_exec(int fd, struct drm_xe_engine_class_instance *hwe)
+{
+	uint32_t vm, exec_queue, bo, batch_bo, bind_engine;
+	uint64_t data_addr = PURGEABLE_ADDR;
+	uint64_t batch_addr = PURGEABLE_BATCH_ADDR;
+	size_t data_size = PURGEABLE_BO_SIZE;
+	size_t batch_size = PURGEABLE_BO_SIZE;
+	struct drm_xe_sync sync[2] = {
+		{ .type = DRM_XE_SYNC_TYPE_USER_FENCE,
+		  .flags = DRM_XE_SYNC_FLAG_SIGNAL,
+		  .timeline_value = PURGEABLE_FENCE_VAL },
+		{ .type = DRM_XE_SYNC_TYPE_SYNCOBJ,
+		  .flags = DRM_XE_SYNC_FLAG_SIGNAL },
+	};
+	struct drm_xe_exec exec = {
+		.num_batch_buffer = 1,
+		.num_syncs = 2,
+		.syncs = to_user_pointer(sync),
+	};
+	uint32_t *data, *batch;
+	uint32_t syncobj;
+	int b, ret;
+
+	purgeable_setup_batch_and_data(fd, &vm, &bind_engine, &batch_bo,
+				       &bo, &batch, &data, batch_addr,
+				       data_addr, batch_size, data_size);
+	memset(data, 0, data_size);
+
+	syncobj = syncobj_create(fd, 0);
+
+	/* Prepare batch to write to data BO */
+	b = 0;
+	batch[b++] = MI_STORE_DWORD_IMM_GEN4;
+	batch[b++] = data_addr;
+	batch[b++] = data_addr >> 32;
+	batch[b++] = 0xfeed0001;
+	batch[b++] = MI_BATCH_BUFFER_END;
+
+	exec_queue = xe_exec_queue_create(fd, vm, hwe, 0);
+	exec.exec_queue_id = exec_queue;
+	exec.address = batch_addr;
+
+	/* Use only syncobj for exec (not USER_FENCE) */
+	sync[1].handle = syncobj;
+	exec.num_syncs = 1;
+	exec.syncs = to_user_pointer(&sync[1]);
+
+	ret = __xe_exec(fd, &exec);
+	igt_assert_eq(ret, 0);
+
+	igt_assert(syncobj_wait(fd, &syncobj, 1, INT64_MAX, 0, NULL));
+	munmap(data, data_size);
+	data = xe_bo_map(fd, bo, data_size);
+	igt_assert_eq(data[0], 0xfeed0001);
+
+	igt_assert(purgeable_mark_and_verify_purged(fd, vm, data_addr, data_size));
+
+	/* Prepare second batch (different value) */
+	b = 0;
+	batch[b++] = MI_STORE_DWORD_IMM_GEN4;
+	batch[b++] = data_addr;
+	batch[b++] = data_addr >> 32;
+	batch[b++] = 0xfeed0002;
+	batch[b++] = MI_BATCH_BUFFER_END;
+
+	ret = __xe_exec(fd, &exec);
+	if (ret == 0) {
+		/* Exec succeeded, but wait may fail on purged BO (both behaviors valid) */
+		syncobj_wait(fd, &syncobj, 1, INT64_MAX, 0, NULL);
+	}
+
+	munmap(data, data_size);
+	munmap(batch, batch_size);
+	gem_close(fd, bo);
+	gem_close(fd, batch_bo);
+	syncobj_destroy(fd, syncobj);
+	xe_exec_queue_destroy(fd, bind_engine);
+	xe_exec_queue_destroy(fd, exec_queue);
+	xe_vm_destroy(fd, vm);
+}
+
 int igt_main()
 {
 	struct drm_xe_engine_class_instance *hwe;
@@ -406,6 +493,12 @@ int igt_main()
 			break;
 		}
 
+	igt_subtest("dontneed-after-exec")
+		xe_for_each_engine(fd, hwe) {
+			test_dontneed_after_exec(fd, hwe);
+			break;
+		}
+
 	igt_fixture() {
 		xe_device_put(fd);
 		drm_close_driver(fd);
-- 
2.43.0

[PATCH i-g-t v3 7/8] tests/intel/xe_madvise: Add per-vma-tracking subtest

[Arvind Yadav]

This test validates that purgeable state is tracked per-VMA when a
single BO is bound in multiple VMs. The test creates one BO shared
across two VMs at different virtual addresses. It verifies that marking
only one VMA as DONTNEED does not make the BO purgeable, but marking
both VMAs as DONTNEED allows the kernel to purge the shared BO. This
ensures proper per-VMA tracking for shared memory.

Cc: Nishit Sharma <nishit.sharma@intel.com>
Cc: Pravalika Gurram <pravalika.gurram@intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
Signed-off-by: Arvind Yadav <arvind.yadav@intel.com>
---
 tests/intel/xe_madvise.c | 109 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 109 insertions(+)

diff --git a/tests/intel/xe_madvise.c b/tests/intel/xe_madvise.c
index 51ef4fad3..4e7df54a7 100644
--- a/tests/intel/xe_madvise.c
+++ b/tests/intel/xe_madvise.c
@@ -20,6 +20,7 @@
 
 /* Purgeable test constants */
 #define PURGEABLE_ADDR		0x1a0000
+#define PURGEABLE_ADDR2		0x2b0000
 #define PURGEABLE_BATCH_ADDR	0x3c0000
 #define PURGEABLE_BO_SIZE	4096
 #define PURGEABLE_FENCE_VAL	0xbeef
@@ -205,6 +206,58 @@ static void purgeable_setup_batch_and_data(int fd, uint32_t *vm,
 	xe_wait_ufence(fd, &vm_sync, PURGEABLE_FENCE_VAL, 0, NSEC_PER_SEC);
 }
 
+/**
+ * purgeable_setup_two_vms_shared_bo - Setup two VMs with one shared BO
+ * @fd: DRM file descriptor
+ * @vm1: Output first VM handle
+ * @vm2: Output second VM handle
+ * @bo: Output shared BO handle
+ * @addr1: Virtual address in VM1
+ * @addr2: Virtual address in VM2
+ * @size: Size of the BO
+ * @use_scratch: Whether to use scratch page flag for VMs
+ *
+ * Helper to create two VMs and bind one shared BO in both VMs.
+ * Returns mapped pointer to the BO.
+ */
+static void *purgeable_setup_two_vms_shared_bo(int fd, uint32_t *vm1, uint32_t *vm2,
+					       uint32_t *bo, uint64_t addr1,
+					       uint64_t addr2, size_t size,
+					       bool use_scratch)
+{
+	struct drm_xe_sync sync = {
+		.type = DRM_XE_SYNC_TYPE_USER_FENCE,
+		.flags = DRM_XE_SYNC_FLAG_SIGNAL,
+		.timeline_value = 1,
+	};
+	uint64_t sync_val = 0;
+	void *map;
+
+	/* Create two VMs */
+	*vm1 = xe_vm_create(fd, use_scratch ? DRM_XE_VM_CREATE_FLAG_SCRATCH_PAGE : 0, 0);
+	*vm2 = xe_vm_create(fd, use_scratch ? DRM_XE_VM_CREATE_FLAG_SCRATCH_PAGE : 0, 0);
+
+	/* Create shared BO */
+	*bo = xe_bo_create(fd, 0, size, vram_if_possible(fd, 0),
+			   DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);
+
+	map = xe_bo_map(fd, *bo, size);
+	memset(map, 0xAB, size);
+
+	/* Bind BO in VM1 */
+	sync.addr = to_user_pointer(&sync_val);
+	sync_val = 0;
+	xe_vm_bind_async(fd, *vm1, 0, *bo, 0, addr1, size, &sync, 1);
+	xe_wait_ufence(fd, &sync_val, 1, 0, NSEC_PER_SEC);
+
+	/* Bind BO in VM2 */
+	sync_val = 0;
+	xe_vm_bind_async(fd, *vm2, 0, *bo, 0, addr2, size, &sync, 1);
+	xe_wait_ufence(fd, &sync_val, 1, 0, NSEC_PER_SEC);
+
+	return map;
+}
+
 /**
  * SUBTEST: dontneed-before-mmap
  * Description: Mark BO as DONTNEED before mmap, verify mmap fails or SIGBUS on access
@@ -465,6 +518,56 @@ static void test_dontneed_after_exec(int fd, struct drm_xe_engine_class_instance
 	xe_vm_destroy(fd, vm);
 }
 
+/**
+ * SUBTEST: per-vma-tracking
+ * Description: One BO in two VMs becomes purgeable only when both VMAs are DONTNEED
+ * Test category: functionality test
+ */
+static void test_per_vma_tracking(int fd, struct drm_xe_engine_class_instance *hwe)
+{
+	uint32_t bo, vm1, vm2;
+	uint64_t addr1 = PURGEABLE_ADDR;
+	uint64_t addr2 = PURGEABLE_ADDR2;
+	size_t bo_size = PURGEABLE_BO_SIZE;
+	uint32_t retained;
+	void *map;
+
+	map = purgeable_setup_two_vms_shared_bo(fd, &vm1, &vm2, &bo,
+						addr1, addr2,
+						bo_size, false);
+
+	/* Mark VMA1 as DONTNEED */
+	retained = xe_vm_madvise_purgeable(fd, vm1, addr1, bo_size,
+					   DRM_XE_VMA_PURGEABLE_STATE_DONTNEED);
+	igt_assert_eq(retained, 1);
+
+	/* Verify BO NOT purgeable (VMA2 still WILLNEED) */
+	retained = xe_vm_madvise_purgeable(fd, vm1, addr1, bo_size,
+					   DRM_XE_VMA_PURGEABLE_STATE_WILLNEED);
+	igt_assert_eq(retained, 1);
+
+	/* Mark both VMAs as DONTNEED */
+	retained = xe_vm_madvise_purgeable(fd, vm1, addr1, bo_size,
+					   DRM_XE_VMA_PURGEABLE_STATE_DONTNEED);
+	igt_assert_eq(retained, 1);
+
+	retained = xe_vm_madvise_purgeable(fd, vm2, addr2, bo_size,
+					   DRM_XE_VMA_PURGEABLE_STATE_DONTNEED);
+	igt_assert_eq(retained, 1);
+
+	/* Trigger pressure and verify BO was purged */
+	trigger_memory_pressure(fd, vm1);
+
+	retained = xe_vm_madvise_purgeable(fd, vm1, addr1, bo_size,
+					   DRM_XE_VMA_PURGEABLE_STATE_WILLNEED);
+	igt_assert_eq(retained, 0);
+
+	munmap(map, bo_size);
+	gem_close(fd, bo);
+	xe_vm_destroy(fd, vm1);
+	xe_vm_destroy(fd, vm2);
+}
+
 int igt_main()
 {
 	struct drm_xe_engine_class_instance *hwe;
@@ -499,6 +602,12 @@ int igt_main()
 			break;
 		}
 
+	igt_subtest("per-vma-tracking")
+		xe_for_each_engine(fd, hwe) {
+			test_per_vma_tracking(fd, hwe);
+			break;
+		}
+
 	igt_fixture() {
 		xe_device_put(fd);
 		drm_close_driver(fd);
-- 
2.43.0

[PATCH i-g-t v3 8/8] tests/intel/xe_madvise: Add per-vma-protection subtest

[Arvind Yadav]

This test validates that a WILLNEED VMA protects a shared BO from being
purged even when other VMAs are marked DONTNEED. The test creates a BO
shared across two VMs, marks VMA1 as DONTNEED while keeping VMA2 as
WILLNEED, then triggers memory pressure. The BO should survive and GPU
execution should succeed. After marking both VMAs as DONTNEED and
triggering pressure again, the BO should be purged, demonstrating that
all VMAs must be DONTNEED for the BO to be purgeable.

Cc: Nishit Sharma <nishit.sharma@intel.com>
Cc: Pravalika Gurram <pravalika.gurram@intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
Signed-off-by: Arvind Yadav <arvind.yadav@intel.com>
---
 tests/intel/xe_madvise.c | 116 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 116 insertions(+)

diff --git a/tests/intel/xe_madvise.c b/tests/intel/xe_madvise.c
index 4e7df54a7..2e512edc4 100644
--- a/tests/intel/xe_madvise.c
+++ b/tests/intel/xe_madvise.c
@@ -568,6 +568,116 @@ static void test_per_vma_tracking(int fd, struct drm_xe_engine_class_instance *h
 	xe_vm_destroy(fd, vm2);
 }
 
+/**
+ * SUBTEST: per-vma-protection
+ * Description: WILLNEED VMA protects BO from purging; both DONTNEED makes BO purgeable
+ * Test category: functionality test
+ */
+static void test_per_vma_protection(int fd, struct drm_xe_engine_class_instance *hwe)
+{
+	uint32_t vm1, vm2, exec_queue, bo, batch_bo, bind_engine;
+	uint64_t data_addr1 = PURGEABLE_ADDR;
+	uint64_t data_addr2 = PURGEABLE_ADDR2;
+	uint64_t batch_addr = PURGEABLE_BATCH_ADDR;
+	size_t data_size = PURGEABLE_BO_SIZE;
+	size_t batch_size = PURGEABLE_BO_SIZE;
+	struct drm_xe_sync sync[2] = {
+		{ .type = DRM_XE_SYNC_TYPE_USER_FENCE,
+		  .flags = DRM_XE_SYNC_FLAG_SIGNAL,
+		  .timeline_value = PURGEABLE_FENCE_VAL },
+		{ .type = DRM_XE_SYNC_TYPE_SYNCOBJ,
+		  .flags = DRM_XE_SYNC_FLAG_SIGNAL },
+	};
+	struct drm_xe_exec exec = {
+		.num_batch_buffer = 1,
+		.num_syncs = 1,
+		.syncs = to_user_pointer(&sync[1]),
+	};
+	uint32_t *data, *batch;
+	uint64_t vm_sync = 0;
+	uint32_t retained, syncobj;
+	int b, ret;
+
+	/* Create two VMs and bind shared data BO */
+	data = purgeable_setup_two_vms_shared_bo(fd, &vm1, &vm2, &bo,
+						 data_addr1, data_addr2,
+						 data_size, true);
+	memset(data, 0, data_size);
+	bind_engine = xe_bind_exec_queue_create(fd, vm2, 0);
+
+	/* Create and bind batch BO in VM2 */
+	batch_bo = xe_bo_create(fd, vm2, batch_size, vram_if_possible(fd, 0),
+				DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);
+	batch = xe_bo_map(fd, batch_bo, batch_size);
+
+	sync[0].addr = to_user_pointer(&vm_sync);
+	vm_sync = 0;
+	xe_vm_bind_async(fd, vm2, bind_engine, batch_bo, 0, batch_addr, batch_size, sync, 1);
+	xe_wait_ufence(fd, &vm_sync, PURGEABLE_FENCE_VAL, 0, NSEC_PER_SEC);
+
+	/* Mark VMA1 as DONTNEED, VMA2 stays WILLNEED */
+	retained = xe_vm_madvise_purgeable(fd, vm1, data_addr1, data_size,
+					   DRM_XE_VMA_PURGEABLE_STATE_DONTNEED);
+	igt_assert_eq(retained, 1);
+
+	/* Trigger pressure - BO should survive (VMA2 protects) */
+	trigger_memory_pressure(fd, vm1);
+
+	retained = xe_vm_madvise_purgeable(fd, vm2, data_addr2, data_size,
+					   DRM_XE_VMA_PURGEABLE_STATE_WILLNEED);
+	igt_assert_eq(retained, 1);
+
+	/* GPU workload - should succeed */
+	b = 0;
+	batch[b++] = MI_STORE_DWORD_IMM_GEN4;
+	batch[b++] = data_addr2;
+	batch[b++] = data_addr2 >> 32;
+	batch[b++] = PURGEABLE_TEST_PATTERN;
+	batch[b++] = MI_BATCH_BUFFER_END;
+
+	syncobj = syncobj_create(fd, 0);
+	sync[1].handle = syncobj;
+	exec_queue = xe_exec_queue_create(fd, vm2, hwe, 0);
+	exec.exec_queue_id = exec_queue;
+	exec.address = batch_addr;
+
+	ret = __xe_exec(fd, &exec);
+	igt_assert_eq(ret, 0);
+	igt_assert(syncobj_wait(fd, &syncobj, 1, INT64_MAX, 0, NULL));
+
+	munmap(data, data_size);
+	data = xe_bo_map(fd, bo, data_size);
+	igt_assert_eq(data[0], PURGEABLE_TEST_PATTERN);
+
+	/* Mark both VMAs DONTNEED */
+	retained = xe_vm_madvise_purgeable(fd, vm2, data_addr2, data_size,
+					   DRM_XE_VMA_PURGEABLE_STATE_DONTNEED);
+	igt_assert_eq(retained, 1);
+
+	/* Trigger pressure - BO should be purged */
+	trigger_memory_pressure(fd, vm1);
+
+	retained = xe_vm_madvise_purgeable(fd, vm2, data_addr2, data_size,
+					   DRM_XE_VMA_PURGEABLE_STATE_WILLNEED);
+	igt_assert_eq(retained, 0);
+
+	/* GPU workload - should fail or succeed with NULL rebind */
+	batch[3] = PURGEABLE_DEAD_PATTERN;
+
+	ret = __xe_exec(fd, &exec);
+	/* Exec on purged BO — may succeed (scratch rebind) or fail, both OK */
+
+	munmap(data, data_size);
+	munmap(batch, batch_size);
+	gem_close(fd, bo);
+	gem_close(fd, batch_bo);
+	syncobj_destroy(fd, syncobj);
+	xe_exec_queue_destroy(fd, bind_engine);
+	xe_exec_queue_destroy(fd, exec_queue);
+	xe_vm_destroy(fd, vm1);
+	xe_vm_destroy(fd, vm2);
+}
+
 int igt_main()
 {
 	struct drm_xe_engine_class_instance *hwe;
@@ -608,6 +718,12 @@ int igt_main()
 			break;
 		}
 
+	igt_subtest("per-vma-protection")
+		xe_for_each_engine(fd, hwe) {
+			test_per_vma_protection(fd, hwe);
+			break;
+		}
+
 	igt_fixture() {
 		xe_device_put(fd);
 		drm_close_driver(fd);
-- 
2.43.0

✓ Xe.CI.BAT: success for tests/xe: Add purgeable memory madvise tests for system allocator (rev3)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 2263 bytes --]

== Series Details ==

Series: tests/xe: Add purgeable memory madvise tests for system allocator (rev3)
URL   : https://patchwork.freedesktop.org/series/160333/
State : success

== Summary ==

CI Bug Log - changes from XEIGT_8754_BAT -> XEIGTPW_14560_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (12 -> 13)
------------------------------

  Additional (1): bat-bmg-3 

Known issues
------------

  Here are the changes found in XEIGTPW_14560_BAT that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@xe_peer2peer@read@read-gpua-vram01-gpub-system-p2p:
    - bat-bmg-3:          NOTRUN -> [SKIP][1] ([Intel XE#6566]) +3 other tests skip
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/bat-bmg-3/igt@xe_peer2peer@read@read-gpua-vram01-gpub-system-p2p.html

  
#### Possible fixes ####

  * igt@xe_waitfence@abstime:
    - bat-dg2-oem2:       [TIMEOUT][2] ([Intel XE#6506]) -> [PASS][3]
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8754/bat-dg2-oem2/igt@xe_waitfence@abstime.html
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/bat-dg2-oem2/igt@xe_waitfence@abstime.html

  * igt@xe_waitfence@reltime:
    - bat-dg2-oem2:       [FAIL][4] ([Intel XE#6520]) -> [PASS][5]
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8754/bat-dg2-oem2/igt@xe_waitfence@reltime.html
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/bat-dg2-oem2/igt@xe_waitfence@reltime.html

  
  [Intel XE#6506]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6506
  [Intel XE#6520]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6520
  [Intel XE#6566]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6566


Build changes
-------------

  * IGT: IGT_8754 -> IGTPW_14560
  * Linux: xe-4563-483cf2d774a08fdf83f0e4c7a6ab671a53656d3c -> xe-4564-d8a2676d71fe28909d78ed9707ca9c6871ff1e14

  IGTPW_14560: 14560
  IGT_8754: 8754
  xe-4563-483cf2d774a08fdf83f0e4c7a6ab671a53656d3c: 483cf2d774a08fdf83f0e4c7a6ab671a53656d3c
  xe-4564-d8a2676d71fe28909d78ed9707ca9c6871ff1e14: d8a2676d71fe28909d78ed9707ca9c6871ff1e14

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/index.html

[-- Attachment #2: Type: text/html, Size: 2894 bytes --]

✓ Xe.CI.FULL: success for tests/xe: Add purgeable memory madvise tests for system allocator (rev3)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 43298 bytes --]

== Series Details ==

Series: tests/xe: Add purgeable memory madvise tests for system allocator (rev3)
URL   : https://patchwork.freedesktop.org/series/160333/
State : success

== Summary ==

CI Bug Log - changes from XEIGT_8754_FULL -> XEIGTPW_14560_FULL
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (2 -> 2)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in XEIGTPW_14560_FULL:

### IGT changes ###

#### Possible regressions ####

  * {igt@xe_madvise@dontneed-after-exec} (NEW):
    - shard-bmg:          NOTRUN -> [FAIL][1] +5 other tests fail
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-1/igt@xe_madvise@dontneed-after-exec.html

  * {igt@xe_madvise@per-vma-protection} (NEW):
    - shard-lnl:          NOTRUN -> [FAIL][2] +5 other tests fail
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-lnl-3/igt@xe_madvise@per-vma-protection.html

  
New tests
---------

  New tests have been introduced between XEIGT_8754_FULL and XEIGTPW_14560_FULL:

### New IGT tests (6) ###

  * igt@xe_madvise@dontneed-after-exec:
    - Statuses : 2 fail(s)
    - Exec time: [0.01, 0.02] s

  * igt@xe_madvise@dontneed-after-mmap:
    - Statuses : 2 fail(s)
    - Exec time: [0.01, 0.02] s

  * igt@xe_madvise@dontneed-before-exec:
    - Statuses : 2 fail(s)
    - Exec time: [0.01, 0.02] s

  * igt@xe_madvise@dontneed-before-mmap:
    - Statuses : 2 fail(s)
    - Exec time: [0.01] s

  * igt@xe_madvise@per-vma-protection:
    - Statuses : 2 fail(s)
    - Exec time: [0.01, 0.02] s

  * igt@xe_madvise@per-vma-tracking:
    - Statuses : 2 fail(s)
    - Exec time: [0.01] s

  

Known issues
------------

  Here are the changes found in XEIGTPW_14560_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
    - shard-bmg:          NOTRUN -> [SKIP][3] ([Intel XE#2233])
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-7/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html

  * igt@kms_async_flips@async-flip-with-page-flip-events-linear:
    - shard-lnl:          [PASS][4] -> [FAIL][5] ([Intel XE#5993]) +3 other tests fail
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8754/shard-lnl-2/igt@kms_async_flips@async-flip-with-page-flip-events-linear.html
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-lnl-1/igt@kms_async_flips@async-flip-with-page-flip-events-linear.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip:
    - shard-lnl:          NOTRUN -> [SKIP][6] ([Intel XE#1407])
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-lnl-1/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip.html

  * igt@kms_big_fb@linear-8bpp-rotate-90:
    - shard-bmg:          NOTRUN -> [SKIP][7] ([Intel XE#2327]) +1 other test skip
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-5/igt@kms_big_fb@linear-8bpp-rotate-90.html

  * igt@kms_big_fb@y-tiled-16bpp-rotate-0:
    - shard-bmg:          NOTRUN -> [SKIP][8] ([Intel XE#1124]) +8 other tests skip
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-8/igt@kms_big_fb@y-tiled-16bpp-rotate-0.html

  * igt@kms_big_fb@yf-tiled-16bpp-rotate-270:
    - shard-lnl:          NOTRUN -> [SKIP][9] ([Intel XE#1124]) +2 other tests skip
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-lnl-3/igt@kms_big_fb@yf-tiled-16bpp-rotate-270.html

  * igt@kms_big_fb@yf-tiled-addfb:
    - shard-bmg:          NOTRUN -> [SKIP][10] ([Intel XE#2328])
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-6/igt@kms_big_fb@yf-tiled-addfb.html

  * igt@kms_bw@connected-linear-tiling-4-displays-2160x1440p:
    - shard-lnl:          NOTRUN -> [SKIP][11] ([Intel XE#1512])
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-lnl-1/igt@kms_bw@connected-linear-tiling-4-displays-2160x1440p.html
    - shard-bmg:          NOTRUN -> [SKIP][12] ([Intel XE#2314] / [Intel XE#2894])
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-5/igt@kms_bw@connected-linear-tiling-4-displays-2160x1440p.html

  * igt@kms_bw@linear-tiling-1-displays-2560x1440p:
    - shard-bmg:          NOTRUN -> [SKIP][13] ([Intel XE#367]) +3 other tests skip
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-7/igt@kms_bw@linear-tiling-1-displays-2560x1440p.html

  * igt@kms_bw@linear-tiling-3-displays-1920x1080p:
    - shard-lnl:          NOTRUN -> [SKIP][14] ([Intel XE#367])
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-lnl-4/igt@kms_bw@linear-tiling-3-displays-1920x1080p.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs:
    - shard-bmg:          NOTRUN -> [SKIP][15] ([Intel XE#3432]) +1 other test skip
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-4/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs.html

  * igt@kms_ccs@crc-sprite-planes-basic-yf-tiled-ccs:
    - shard-lnl:          NOTRUN -> [SKIP][16] ([Intel XE#2887]) +1 other test skip
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-lnl-8/igt@kms_ccs@crc-sprite-planes-basic-yf-tiled-ccs.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs:
    - shard-bmg:          NOTRUN -> [SKIP][17] ([Intel XE#2887]) +6 other tests skip
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-5/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html

  * igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs@pipe-c-dp-2:
    - shard-bmg:          NOTRUN -> [SKIP][18] ([Intel XE#2652] / [Intel XE#787]) +8 other tests skip
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-6/igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs@pipe-c-dp-2.html

  * igt@kms_chamelium_edid@dp-edid-change-during-suspend:
    - shard-lnl:          NOTRUN -> [SKIP][19] ([Intel XE#373]) +2 other tests skip
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-lnl-1/igt@kms_chamelium_edid@dp-edid-change-during-suspend.html

  * igt@kms_chamelium_frames@hdmi-aspect-ratio:
    - shard-bmg:          NOTRUN -> [SKIP][20] ([Intel XE#2252]) +8 other tests skip
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-3/igt@kms_chamelium_frames@hdmi-aspect-ratio.html

  * igt@kms_color_pipeline@plane-lut1d-lut1d@pipe-c-edp-1:
    - shard-lnl:          NOTRUN -> [FAIL][21] ([Intel XE#6968]) +3 other tests fail
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-lnl-1/igt@kms_color_pipeline@plane-lut1d-lut1d@pipe-c-edp-1.html

  * igt@kms_content_protection@dp-mst-type-0-suspend-resume:
    - shard-lnl:          NOTRUN -> [SKIP][22] ([Intel XE#6974])
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-lnl-6/igt@kms_content_protection@dp-mst-type-0-suspend-resume.html
    - shard-bmg:          NOTRUN -> [SKIP][23] ([Intel XE#6974])
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-6/igt@kms_content_protection@dp-mst-type-0-suspend-resume.html

  * igt@kms_cursor_crc@cursor-offscreen-32x10:
    - shard-bmg:          NOTRUN -> [SKIP][24] ([Intel XE#2320]) +3 other tests skip
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-8/igt@kms_cursor_crc@cursor-offscreen-32x10.html

  * igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic:
    - shard-lnl:          NOTRUN -> [SKIP][25] ([Intel XE#309]) +2 other tests skip
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-lnl-6/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic.html

  * igt@kms_flip@2x-flip-vs-rmfb-interruptible:
    - shard-lnl:          NOTRUN -> [SKIP][26] ([Intel XE#1421]) +3 other tests skip
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-lnl-8/igt@kms_flip@2x-flip-vs-rmfb-interruptible.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1:
    - shard-lnl:          [PASS][27] -> [FAIL][28] ([Intel XE#301])
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8754/shard-lnl-1/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-lnl-3/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html

  * igt@kms_flip@flip-vs-expired-vblank@b-edp1:
    - shard-lnl:          NOTRUN -> [FAIL][29] ([Intel XE#301]) +1 other test fail
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-lnl-2/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html

  * igt@kms_flip@plain-flip-ts-check-interruptible:
    - shard-lnl:          NOTRUN -> [FAIL][30] ([Intel XE#5408] / [Intel XE#6266]) +1 other test fail
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-lnl-1/igt@kms_flip@plain-flip-ts-check-interruptible.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-downscaling:
    - shard-lnl:          NOTRUN -> [SKIP][31] ([Intel XE#7178])
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-lnl-7/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-downscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-upscaling:
    - shard-bmg:          NOTRUN -> [SKIP][32] ([Intel XE#7178]) +3 other tests skip
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-7/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-upscaling.html

  * igt@kms_flip_scaled_crc@flip-p016-linear-to-p016-linear-reflect-x:
    - shard-bmg:          NOTRUN -> [SKIP][33] ([Intel XE#7179])
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-9/igt@kms_flip_scaled_crc@flip-p016-linear-to-p016-linear-reflect-x.html
    - shard-lnl:          NOTRUN -> [SKIP][34] ([Intel XE#7179])
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-lnl-7/igt@kms_flip_scaled_crc@flip-p016-linear-to-p016-linear-reflect-x.html

  * igt@kms_frontbuffer_tracking@drrs-1p-offscreen-pri-shrfb-draw-blt:
    - shard-lnl:          NOTRUN -> [SKIP][35] ([Intel XE#6312])
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-lnl-7/igt@kms_frontbuffer_tracking@drrs-1p-offscreen-pri-shrfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@drrs-2p-primscrn-indfb-pgflip-blt:
    - shard-bmg:          NOTRUN -> [SKIP][36] ([Intel XE#2311]) +24 other tests skip
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-9/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-indfb-pgflip-blt.html

  * igt@kms_frontbuffer_tracking@drrs-slowdraw:
    - shard-lnl:          NOTRUN -> [SKIP][37] ([Intel XE#651]) +1 other test skip
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-lnl-1/igt@kms_frontbuffer_tracking@drrs-slowdraw.html

  * igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-indfb-draw-blt:
    - shard-bmg:          NOTRUN -> [SKIP][38] ([Intel XE#4141]) +10 other tests skip
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-8/igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbc-tiling-y:
    - shard-bmg:          NOTRUN -> [SKIP][39] ([Intel XE#2352])
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-8/igt@kms_frontbuffer_tracking@fbc-tiling-y.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-pri-indfb-draw-render:
    - shard-lnl:          NOTRUN -> [SKIP][40] ([Intel XE#656]) +8 other tests skip
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-lnl-3/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-pri-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-argb161616f-draw-mmap-wc:
    - shard-bmg:          NOTRUN -> [SKIP][41] ([Intel XE#7061]) +1 other test skip
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-2/igt@kms_frontbuffer_tracking@fbcdrrs-argb161616f-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt:
    - shard-bmg:          NOTRUN -> [SKIP][42] ([Intel XE#2313]) +21 other tests skip
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-6/igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt.html

  * igt@kms_joiner@basic-force-ultra-joiner:
    - shard-bmg:          NOTRUN -> [SKIP][43] ([Intel XE#6911])
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-5/igt@kms_joiner@basic-force-ultra-joiner.html

  * igt@kms_plane@pixel-format-4-tiled-modifier@pipe-b-plane-5:
    - shard-bmg:          NOTRUN -> [SKIP][44] ([Intel XE#7130]) +1 other test skip
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-5/igt@kms_plane@pixel-format-4-tiled-modifier@pipe-b-plane-5.html

  * igt@kms_plane@pixel-format-y-tiled-gen12-rc-ccs-cc-modifier:
    - shard-bmg:          NOTRUN -> [SKIP][45] ([Intel XE#7111]) +4 other tests skip
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-3/igt@kms_plane@pixel-format-y-tiled-gen12-rc-ccs-cc-modifier.html

  * igt@kms_plane@pixel-format-yf-tiled-ccs-modifier:
    - shard-lnl:          NOTRUN -> [SKIP][46] ([Intel XE#7250])
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-lnl-8/igt@kms_plane@pixel-format-yf-tiled-ccs-modifier.html

  * igt@kms_plane_lowres@tiling-y:
    - shard-bmg:          NOTRUN -> [SKIP][47] ([Intel XE#2393])
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-7/igt@kms_plane_lowres@tiling-y.html

  * igt@kms_plane_multiple@2x-tiling-y:
    - shard-bmg:          NOTRUN -> [SKIP][48] ([Intel XE#5021])
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-6/igt@kms_plane_multiple@2x-tiling-y.html

  * igt@kms_plane_scaling@planes-downscale-factor-0-5-upscale-factor-0-25:
    - shard-lnl:          NOTRUN -> [SKIP][49] ([Intel XE#6886]) +7 other tests skip
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-lnl-6/igt@kms_plane_scaling@planes-downscale-factor-0-5-upscale-factor-0-25.html

  * igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-5:
    - shard-bmg:          NOTRUN -> [SKIP][50] ([Intel XE#6886]) +4 other tests skip
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-3/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-5.html

  * igt@kms_pm_rpm@modeset-lpsp-stress-no-wait:
    - shard-bmg:          NOTRUN -> [SKIP][51] ([Intel XE#1439] / [Intel XE#3141] / [Intel XE#836])
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-3/igt@kms_pm_rpm@modeset-lpsp-stress-no-wait.html

  * igt@kms_psr2_sf@pr-cursor-plane-move-continuous-sf:
    - shard-lnl:          NOTRUN -> [SKIP][52] ([Intel XE#1406] / [Intel XE#2893]) +2 other tests skip
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-lnl-3/igt@kms_psr2_sf@pr-cursor-plane-move-continuous-sf.html

  * igt@kms_psr2_sf@pr-primary-plane-update-sf-dmg-area:
    - shard-bmg:          NOTRUN -> [SKIP][53] ([Intel XE#1406] / [Intel XE#1489]) +5 other tests skip
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-2/igt@kms_psr2_sf@pr-primary-plane-update-sf-dmg-area.html

  * igt@kms_psr2_su@frontbuffer-xrgb8888:
    - shard-bmg:          NOTRUN -> [SKIP][54] ([Intel XE#1406] / [Intel XE#2387])
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-1/igt@kms_psr2_su@frontbuffer-xrgb8888.html

  * igt@kms_psr@fbc-psr2-basic:
    - shard-bmg:          NOTRUN -> [SKIP][55] ([Intel XE#1406] / [Intel XE#2234] / [Intel XE#2850]) +5 other tests skip
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-6/igt@kms_psr@fbc-psr2-basic.html
    - shard-lnl:          NOTRUN -> [SKIP][56] ([Intel XE#1406])
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-lnl-6/igt@kms_psr@fbc-psr2-basic.html

  * igt@kms_psr@fbc-psr2-basic@edp-1:
    - shard-lnl:          NOTRUN -> [SKIP][57] ([Intel XE#1406] / [Intel XE#4609])
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-lnl-6/igt@kms_psr@fbc-psr2-basic@edp-1.html

  * igt@kms_psr@psr2-primary-render:
    - shard-bmg:          NOTRUN -> [SKIP][58] ([Intel XE#1406] / [Intel XE#2234])
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-5/igt@kms_psr@psr2-primary-render.html

  * igt@kms_rotation_crc@sprite-rotation-90:
    - shard-bmg:          NOTRUN -> [SKIP][59] ([Intel XE#3414] / [Intel XE#3904])
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-9/igt@kms_rotation_crc@sprite-rotation-90.html

  * igt@kms_sharpness_filter@filter-basic:
    - shard-bmg:          NOTRUN -> [SKIP][60] ([Intel XE#6503]) +1 other test skip
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-6/igt@kms_sharpness_filter@filter-basic.html

  * igt@kms_vrr@cmrr:
    - shard-bmg:          NOTRUN -> [SKIP][61] ([Intel XE#2168])
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-10/igt@kms_vrr@cmrr.html

  * igt@kms_vrr@cmrr@pipe-a-edp-1:
    - shard-lnl:          [PASS][62] -> [FAIL][63] ([Intel XE#4459]) +1 other test fail
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8754/shard-lnl-4/igt@kms_vrr@cmrr@pipe-a-edp-1.html
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-lnl-7/igt@kms_vrr@cmrr@pipe-a-edp-1.html

  * igt@kms_vrr@flip-suspend:
    - shard-bmg:          NOTRUN -> [SKIP][64] ([Intel XE#1499])
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-10/igt@kms_vrr@flip-suspend.html

  * igt@xe_ccs@block-copy-uncompressed:
    - shard-bmg:          [PASS][65] -> [ABORT][66] ([Intel XE#7169]) +1 other test abort
   [65]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8754/shard-bmg-3/igt@xe_ccs@block-copy-uncompressed.html
   [66]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-1/igt@xe_ccs@block-copy-uncompressed.html

  * igt@xe_eudebug@basic-vm-bind-ufence-reconnect:
    - shard-lnl:          NOTRUN -> [SKIP][67] ([Intel XE#4837])
   [67]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-lnl-8/igt@xe_eudebug@basic-vm-bind-ufence-reconnect.html

  * igt@xe_eudebug@basic-vm-bind-vm-destroy:
    - shard-bmg:          NOTRUN -> [SKIP][68] ([Intel XE#4837]) +4 other tests skip
   [68]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-10/igt@xe_eudebug@basic-vm-bind-vm-destroy.html

  * igt@xe_eudebug_online@pagefault-write:
    - shard-bmg:          NOTRUN -> [SKIP][69] ([Intel XE#4837] / [Intel XE#6665])
   [69]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-9/igt@xe_eudebug_online@pagefault-write.html

  * igt@xe_evict@evict-beng-mixed-many-threads-small:
    - shard-bmg:          [PASS][70] -> [INCOMPLETE][71] ([Intel XE#6321])
   [70]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8754/shard-bmg-3/igt@xe_evict@evict-beng-mixed-many-threads-small.html
   [71]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-10/igt@xe_evict@evict-beng-mixed-many-threads-small.html

  * igt@xe_evict@evict-small-multi-queue-cm:
    - shard-bmg:          NOTRUN -> [SKIP][72] ([Intel XE#7140]) +1 other test skip
   [72]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-4/igt@xe_evict@evict-small-multi-queue-cm.html
    - shard-lnl:          NOTRUN -> [SKIP][73] ([Intel XE#688])
   [73]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-lnl-4/igt@xe_evict@evict-small-multi-queue-cm.html

  * igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr:
    - shard-bmg:          NOTRUN -> [SKIP][74] ([Intel XE#2322]) +9 other tests skip
   [74]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-3/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr.html

  * igt@xe_exec_basic@multigpu-many-execqueues-many-vm-null-rebind:
    - shard-lnl:          NOTRUN -> [SKIP][75] ([Intel XE#1392]) +2 other tests skip
   [75]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-lnl-6/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-null-rebind.html

  * igt@xe_exec_fault_mode@many-multi-queue-userptr-invalidate-imm:
    - shard-bmg:          NOTRUN -> [SKIP][76] ([Intel XE#7136]) +8 other tests skip
   [76]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-8/igt@xe_exec_fault_mode@many-multi-queue-userptr-invalidate-imm.html

  * igt@xe_exec_multi_queue@many-execs-preempt-mode-fault-userptr-invalidate:
    - shard-bmg:          NOTRUN -> [SKIP][77] ([Intel XE#6874]) +23 other tests skip
   [77]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-1/igt@xe_exec_multi_queue@many-execs-preempt-mode-fault-userptr-invalidate.html

  * igt@xe_exec_multi_queue@one-queue-preempt-mode-dyn-priority-smem:
    - shard-lnl:          NOTRUN -> [SKIP][78] ([Intel XE#6874]) +4 other tests skip
   [78]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-lnl-2/igt@xe_exec_multi_queue@one-queue-preempt-mode-dyn-priority-smem.html

  * igt@xe_exec_threads@threads-multi-queue-cm-shared-vm-userptr:
    - shard-bmg:          NOTRUN -> [SKIP][79] ([Intel XE#7138]) +8 other tests skip
   [79]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-7/igt@xe_exec_threads@threads-multi-queue-cm-shared-vm-userptr.html

  * igt@xe_exec_threads@threads-multi-queue-mixed-shared-vm-rebind:
    - shard-lnl:          NOTRUN -> [SKIP][80] ([Intel XE#7138]) +2 other tests skip
   [80]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-lnl-8/igt@xe_exec_threads@threads-multi-queue-mixed-shared-vm-rebind.html

  * igt@xe_mmap@pci-membarrier-bad-object:
    - shard-lnl:          NOTRUN -> [SKIP][81] ([Intel XE#5100])
   [81]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-lnl-1/igt@xe_mmap@pci-membarrier-bad-object.html

  * igt@xe_mmap@small-bar:
    - shard-bmg:          NOTRUN -> [SKIP][82] ([Intel XE#586])
   [82]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-4/igt@xe_mmap@small-bar.html

  * igt@xe_module_load@load:
    - shard-bmg:          ([PASS][83], [PASS][84], [PASS][85], [PASS][86], [PASS][87], [PASS][88], [PASS][89], [PASS][90], [PASS][91], [PASS][92], [PASS][93], [PASS][94], [PASS][95], [PASS][96], [PASS][97], [PASS][98], [PASS][99], [PASS][100], [PASS][101], [PASS][102], [PASS][103], [PASS][104], [PASS][105], [PASS][106], [PASS][107]) -> ([PASS][108], [PASS][109], [PASS][110], [PASS][111], [PASS][112], [PASS][113], [PASS][114], [PASS][115], [PASS][116], [PASS][117], [PASS][118], [PASS][119], [PASS][120], [PASS][121], [PASS][122], [PASS][123], [PASS][124], [PASS][125], [PASS][126], [PASS][127], [PASS][128], [SKIP][129], [PASS][130], [PASS][131], [PASS][132], [PASS][133]) ([Intel XE#2457])
   [83]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8754/shard-bmg-2/igt@xe_module_load@load.html
   [84]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8754/shard-bmg-2/igt@xe_module_load@load.html
   [85]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8754/shard-bmg-10/igt@xe_module_load@load.html
   [86]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8754/shard-bmg-3/igt@xe_module_load@load.html
   [87]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8754/shard-bmg-3/igt@xe_module_load@load.html
   [88]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8754/shard-bmg-3/igt@xe_module_load@load.html
   [89]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8754/shard-bmg-6/igt@xe_module_load@load.html
   [90]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8754/shard-bmg-6/igt@xe_module_load@load.html
   [91]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8754/shard-bmg-8/igt@xe_module_load@load.html
   [92]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8754/shard-bmg-1/igt@xe_module_load@load.html
   [93]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8754/shard-bmg-8/igt@xe_module_load@load.html
   [94]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8754/shard-bmg-10/igt@xe_module_load@load.html
   [95]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8754/shard-bmg-10/igt@xe_module_load@load.html
   [96]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8754/shard-bmg-1/igt@xe_module_load@load.html
   [97]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8754/shard-bmg-1/igt@xe_module_load@load.html
   [98]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8754/shard-bmg-8/igt@xe_module_load@load.html
   [99]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8754/shard-bmg-5/igt@xe_module_load@load.html
   [100]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8754/shard-bmg-5/igt@xe_module_load@load.html
   [101]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8754/shard-bmg-9/igt@xe_module_load@load.html
   [102]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8754/shard-bmg-9/igt@xe_module_load@load.html
   [103]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8754/shard-bmg-7/igt@xe_module_load@load.html
   [104]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8754/shard-bmg-7/igt@xe_module_load@load.html
   [105]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8754/shard-bmg-4/igt@xe_module_load@load.html
   [106]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8754/shard-bmg-6/igt@xe_module_load@load.html
   [107]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8754/shard-bmg-4/igt@xe_module_load@load.html
   [108]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-10/igt@xe_module_load@load.html
   [109]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-10/igt@xe_module_load@load.html
   [110]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-3/igt@xe_module_load@load.html
   [111]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-10/igt@xe_module_load@load.html
   [112]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-8/igt@xe_module_load@load.html
   [113]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-6/igt@xe_module_load@load.html
   [114]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-8/igt@xe_module_load@load.html
   [115]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-3/igt@xe_module_load@load.html
   [116]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-8/igt@xe_module_load@load.html
   [117]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-1/igt@xe_module_load@load.html
   [118]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-9/igt@xe_module_load@load.html
   [119]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-9/igt@xe_module_load@load.html
   [120]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-4/igt@xe_module_load@load.html
   [121]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-4/igt@xe_module_load@load.html
   [122]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-3/igt@xe_module_load@load.html
   [123]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-6/igt@xe_module_load@load.html
   [124]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-5/igt@xe_module_load@load.html
   [125]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-5/igt@xe_module_load@load.html
   [126]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-5/igt@xe_module_load@load.html
   [127]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-2/igt@xe_module_load@load.html
   [128]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-2/igt@xe_module_load@load.html
   [129]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-3/igt@xe_module_load@load.html
   [130]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-7/igt@xe_module_load@load.html
   [131]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-7/igt@xe_module_load@load.html
   [132]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-1/igt@xe_module_load@load.html
   [133]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-1/igt@xe_module_load@load.html

  * igt@xe_multigpu_svm@mgpu-atomic-op-prefetch:
    - shard-bmg:          NOTRUN -> [SKIP][134] ([Intel XE#6964]) +1 other test skip
   [134]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-8/igt@xe_multigpu_svm@mgpu-atomic-op-prefetch.html

  * igt@xe_pm@d3cold-multiple-execs:
    - shard-bmg:          NOTRUN -> [SKIP][135] ([Intel XE#2284]) +1 other test skip
   [135]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-5/igt@xe_pm@d3cold-multiple-execs.html

  * igt@xe_pm@s3-basic-exec:
    - shard-lnl:          NOTRUN -> [SKIP][136] ([Intel XE#584]) +1 other test skip
   [136]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-lnl-6/igt@xe_pm@s3-basic-exec.html

  * igt@xe_pm@s4-vm-bind-unbind-all:
    - shard-lnl:          [PASS][137] -> [DMESG-WARN][138] ([Intel XE#7161])
   [137]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8754/shard-lnl-8/igt@xe_pm@s4-vm-bind-unbind-all.html
   [138]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-lnl-4/igt@xe_pm@s4-vm-bind-unbind-all.html

  * igt@xe_pxp@pxp-src-to-pxp-dest-rendercopy:
    - shard-bmg:          NOTRUN -> [SKIP][139] ([Intel XE#4733]) +1 other test skip
   [139]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-5/igt@xe_pxp@pxp-src-to-pxp-dest-rendercopy.html

  * igt@xe_query@multigpu-query-engines:
    - shard-lnl:          NOTRUN -> [SKIP][140] ([Intel XE#944])
   [140]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-lnl-6/igt@xe_query@multigpu-query-engines.html

  * igt@xe_query@multigpu-query-hwconfig:
    - shard-bmg:          NOTRUN -> [SKIP][141] ([Intel XE#944]) +2 other tests skip
   [141]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-10/igt@xe_query@multigpu-query-hwconfig.html

  * igt@xe_sriov_flr@flr-vf1-clear:
    - shard-bmg:          [PASS][142] -> [FAIL][143] ([Intel XE#6569])
   [142]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8754/shard-bmg-6/igt@xe_sriov_flr@flr-vf1-clear.html
   [143]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-5/igt@xe_sriov_flr@flr-vf1-clear.html

  * igt@xe_sriov_vram@vf-access-beyond:
    - shard-lnl:          NOTRUN -> [SKIP][144] ([Intel XE#6376])
   [144]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-lnl-8/igt@xe_sriov_vram@vf-access-beyond.html

  
#### Possible fixes ####

  * igt@intel_hwmon@hwmon-write:
    - shard-bmg:          [FAIL][145] ([Intel XE#4665]) -> [PASS][146]
   [145]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8754/shard-bmg-4/igt@intel_hwmon@hwmon-write.html
   [146]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-10/igt@intel_hwmon@hwmon-write.html

  * igt@kms_async_flips@alternate-sync-async-flip:
    - shard-bmg:          [FAIL][147] ([Intel XE#3718] / [Intel XE#6078]) -> [PASS][148]
   [147]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8754/shard-bmg-5/igt@kms_async_flips@alternate-sync-async-flip.html
   [148]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-4/igt@kms_async_flips@alternate-sync-async-flip.html

  * igt@kms_async_flips@async-flip-with-page-flip-events-linear:
    - shard-bmg:          [ABORT][149] -> [PASS][150] +1 other test pass
   [149]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8754/shard-bmg-5/igt@kms_async_flips@async-flip-with-page-flip-events-linear.html
   [150]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-5/igt@kms_async_flips@async-flip-with-page-flip-events-linear.html

  * igt@kms_async_flips@async-flip-with-page-flip-events-linear@pipe-d-dp-1:
    - shard-bmg:          [DMESG-WARN][151] -> [PASS][152] +3 other tests pass
   [151]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8754/shard-bmg-5/igt@kms_async_flips@async-flip-with-page-flip-events-linear@pipe-d-dp-1.html
   [152]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-5/igt@kms_async_flips@async-flip-with-page-flip-events-linear@pipe-d-dp-1.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible@a-edp1:
    - shard-lnl:          [FAIL][153] ([Intel XE#301]) -> [PASS][154]
   [153]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8754/shard-lnl-1/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-edp1.html
   [154]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-lnl-3/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-edp1.html

  * igt@kms_vrr@seamless-rr-switch-virtual@pipe-a-edp-1:
    - shard-lnl:          [FAIL][155] ([Intel XE#2142]) -> [PASS][156] +1 other test pass
   [155]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8754/shard-lnl-3/igt@kms_vrr@seamless-rr-switch-virtual@pipe-a-edp-1.html
   [156]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-lnl-7/igt@kms_vrr@seamless-rr-switch-virtual@pipe-a-edp-1.html

  * igt@xe_evict@evict-mixed-many-threads-small:
    - shard-bmg:          [INCOMPLETE][157] ([Intel XE#6321]) -> [PASS][158]
   [157]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8754/shard-bmg-1/igt@xe_evict@evict-mixed-many-threads-small.html
   [158]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-9/igt@xe_evict@evict-mixed-many-threads-small.html

  * igt@xe_exec_system_allocator@process-many-stride-mmap-huge-nomemset:
    - shard-lnl:          [FAIL][159] -> [PASS][160]
   [159]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8754/shard-lnl-3/igt@xe_exec_system_allocator@process-many-stride-mmap-huge-nomemset.html
   [160]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-lnl-7/igt@xe_exec_system_allocator@process-many-stride-mmap-huge-nomemset.html

  * igt@xe_exec_system_allocator@threads-shared-vm-many-large-mmap-shared:
    - shard-bmg:          [ABORT][161] ([Intel XE#7169]) -> [PASS][162]
   [161]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8754/shard-bmg-10/igt@xe_exec_system_allocator@threads-shared-vm-many-large-mmap-shared.html
   [162]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-4/igt@xe_exec_system_allocator@threads-shared-vm-many-large-mmap-shared.html

  * igt@xe_pm@s2idle-multiple-execs:
    - shard-lnl:          [ABORT][163] ([Intel XE#7169]) -> [PASS][164]
   [163]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8754/shard-lnl-7/igt@xe_pm@s2idle-multiple-execs.html
   [164]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-lnl-1/igt@xe_pm@s2idle-multiple-execs.html

  * igt@xe_pm@s4-multiple-execs:
    - shard-lnl:          [DMESG-WARN][165] -> [PASS][166]
   [165]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8754/shard-lnl-2/igt@xe_pm@s4-multiple-execs.html
   [166]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-lnl-1/igt@xe_pm@s4-multiple-execs.html

  
#### Warnings ####

  * igt@kms_hdr@brightness-with-hdr:
    - shard-bmg:          [SKIP][167] ([Intel XE#3374] / [Intel XE#3544]) -> [SKIP][168] ([Intel XE#3544])
   [167]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8754/shard-bmg-8/igt@kms_hdr@brightness-with-hdr.html
   [168]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-2/igt@kms_hdr@brightness-with-hdr.html

  * igt@kms_pm_rpm@dpms-mode-unset-non-lpsp:
    - shard-lnl:          [SKIP][169] ([Intel XE#1439] / [Intel XE#836]) -> [SKIP][170] ([Intel XE#7197])
   [169]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8754/shard-lnl-6/igt@kms_pm_rpm@dpms-mode-unset-non-lpsp.html
   [170]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-lnl-2/igt@kms_pm_rpm@dpms-mode-unset-non-lpsp.html

  * igt@kms_tiled_display@basic-test-pattern-with-chamelium:
    - shard-bmg:          [SKIP][171] ([Intel XE#2426]) -> [SKIP][172] ([Intel XE#2509])
   [171]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8754/shard-bmg-3/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
   [172]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/shard-bmg-10/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
  [Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
  [Intel XE#1407]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1407
  [Intel XE#1421]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1421
  [Intel XE#1439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1439
  [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
  [Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
  [Intel XE#1512]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1512
  [Intel XE#2142]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2142
  [Intel XE#2168]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2168
  [Intel XE#2233]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2233
  [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
  [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
  [Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
  [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
  [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
  [Intel XE#2314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2314
  [Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
  [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
  [Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
  [Intel XE#2328]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2328
  [Intel XE#2352]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2352
  [Intel XE#2387]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2387
  [Intel XE#2393]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2393
  [Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
  [Intel XE#2457]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2457
  [Intel XE#2509]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2509
  [Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
  [Intel XE#2893]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2893
  [Intel XE#2894]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2894
  [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
  [Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
  [Intel XE#3141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3141
  [Intel XE#3374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3374
  [Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414
  [Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
  [Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544
  [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
  [Intel XE#3718]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3718
  [Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
  [Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
  [Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
  [Intel XE#4459]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4459
  [Intel XE#4609]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4609
  [Intel XE#4665]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4665
  [Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
  [Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837
  [Intel XE#5021]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5021
  [Intel XE#5100]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5100
  [Intel XE#5408]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5408
  [Intel XE#584]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/584
  [Intel XE#586]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/586
  [Intel XE#5993]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5993
  [Intel XE#6078]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6078
  [Intel XE#6266]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6266
  [Intel XE#6312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6312
  [Intel XE#6321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6321
  [Intel XE#6376]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6376
  [Intel XE#6503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6503
  [Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
  [Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
  [Intel XE#6569]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6569
  [Intel XE#6665]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6665
  [Intel XE#6874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6874
  [Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688
  [Intel XE#6886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6886
  [Intel XE#6911]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6911
  [Intel XE#6964]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6964
  [Intel XE#6968]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6968
  [Intel XE#6974]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6974
  [Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061
  [Intel XE#7111]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7111
  [Intel XE#7130]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7130
  [Intel XE#7136]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7136
  [Intel XE#7138]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7138
  [Intel XE#7140]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7140
  [Intel XE#7161]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7161
  [Intel XE#7169]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7169
  [Intel XE#7178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7178
  [Intel XE#7179]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7179
  [Intel XE#7197]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7197
  [Intel XE#7250]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7250
  [Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787
  [Intel XE#836]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/836
  [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944


Build changes
-------------

  * IGT: IGT_8754 -> IGTPW_14560
  * Linux: xe-4563-483cf2d774a08fdf83f0e4c7a6ab671a53656d3c -> xe-4564-d8a2676d71fe28909d78ed9707ca9c6871ff1e14

  IGTPW_14560: 14560
  IGT_8754: 8754
  xe-4563-483cf2d774a08fdf83f0e4c7a6ab671a53656d3c: 483cf2d774a08fdf83f0e4c7a6ab671a53656d3c
  xe-4564-d8a2676d71fe28909d78ed9707ca9c6871ff1e14: d8a2676d71fe28909d78ed9707ca9c6871ff1e14

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14560/index.html

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✓ i915.CI.BAT: success for tests/xe: Add purgeable memory madvise tests for system allocator (rev3)

[Patchwork]

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== Series Details ==

Series: tests/xe: Add purgeable memory madvise tests for system allocator (rev3)
URL   : https://patchwork.freedesktop.org/series/160333/
State : success

== Summary ==

CI Bug Log - changes from IGT_8754 -> IGTPW_14560
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/index.html

Participating hosts (42 -> 41)
------------------------------

  Additional (1): bat-adls-6 
  Missing    (2): bat-dg2-13 fi-snb-2520m 

Known issues
------------

  Here are the changes found in IGTPW_14560 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_lmem_swapping@parallel-random-engines:
    - bat-adls-6:         NOTRUN -> [SKIP][1] ([i915#4613]) +3 other tests skip
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/bat-adls-6/igt@gem_lmem_swapping@parallel-random-engines.html

  * igt@gem_tiled_pread_basic@basic:
    - bat-adls-6:         NOTRUN -> [SKIP][2] ([i915#15656])
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/bat-adls-6/igt@gem_tiled_pread_basic@basic.html

  * igt@i915_selftest@live@client:
    - fi-kbl-7567u:       [PASS][3] -> [DMESG-WARN][4] ([i915#13735]) +13 other tests dmesg-warn
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8754/fi-kbl-7567u/igt@i915_selftest@live@client.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/fi-kbl-7567u/igt@i915_selftest@live@client.html

  * igt@i915_selftest@live@workarounds:
    - bat-mtlp-9:         [PASS][5] -> [DMESG-FAIL][6] ([i915#12061]) +1 other test dmesg-fail
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8754/bat-mtlp-9/igt@i915_selftest@live@workarounds.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/bat-mtlp-9/igt@i915_selftest@live@workarounds.html

  * igt@intel_hwmon@hwmon-read:
    - bat-adls-6:         NOTRUN -> [SKIP][7] ([i915#7707]) +1 other test skip
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/bat-adls-6/igt@intel_hwmon@hwmon-read.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
    - bat-adls-6:         NOTRUN -> [SKIP][8] ([i915#4103]) +1 other test skip
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/bat-adls-6/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html

  * igt@kms_dsc@dsc-basic:
    - bat-adls-6:         NOTRUN -> [SKIP][9] ([i915#3555] / [i915#3840])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/bat-adls-6/igt@kms_dsc@dsc-basic.html

  * igt@kms_force_connector_basic@force-load-detect:
    - bat-adls-6:         NOTRUN -> [SKIP][10]
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/bat-adls-6/igt@kms_force_connector_basic@force-load-detect.html

  * igt@kms_pm_backlight@basic-brightness:
    - bat-adls-6:         NOTRUN -> [SKIP][11] ([i915#5354])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/bat-adls-6/igt@kms_pm_backlight@basic-brightness.html

  * igt@kms_psr@psr-primary-mmap-gtt:
    - bat-adls-6:         NOTRUN -> [SKIP][12] ([i915#1072] / [i915#9732]) +3 other tests skip
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/bat-adls-6/igt@kms_psr@psr-primary-mmap-gtt.html

  * igt@kms_setmode@basic-clone-single-crtc:
    - bat-adls-6:         NOTRUN -> [SKIP][13] ([i915#3555])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/bat-adls-6/igt@kms_setmode@basic-clone-single-crtc.html

  * igt@prime_vgem@basic-fence-read:
    - bat-adls-6:         NOTRUN -> [SKIP][14] ([i915#3291]) +2 other tests skip
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/bat-adls-6/igt@prime_vgem@basic-fence-read.html

  
#### Possible fixes ####

  * igt@fbdev@info:
    - fi-ivb-3770:        [SKIP][15] ([i915#1849]) -> [PASS][16]
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8754/fi-ivb-3770/igt@fbdev@info.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/fi-ivb-3770/igt@fbdev@info.html

  * igt@fbdev@read:
    - fi-ivb-3770:        [SKIP][17] -> [PASS][18] +3 other tests pass
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8754/fi-ivb-3770/igt@fbdev@read.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/fi-ivb-3770/igt@fbdev@read.html

  * igt@i915_pm_rpm@module-reload:
    - bat-adlp-6:         [DMESG-WARN][19] ([i915#15673]) -> [PASS][20] +78 other tests pass
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8754/bat-adlp-6/igt@i915_pm_rpm@module-reload.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/bat-adlp-6/igt@i915_pm_rpm@module-reload.html

  * igt@i915_selftest@live:
    - bat-mtlp-8:         [DMESG-FAIL][21] ([i915#12061]) -> [PASS][22] +1 other test pass
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8754/bat-mtlp-8/igt@i915_selftest@live.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/bat-mtlp-8/igt@i915_selftest@live.html

  * igt@i915_selftest@live@workarounds:
    - bat-arls-6:         [DMESG-FAIL][23] ([i915#12061]) -> [PASS][24] +1 other test pass
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8754/bat-arls-6/igt@i915_selftest@live@workarounds.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/bat-arls-6/igt@i915_selftest@live@workarounds.html

  
  [i915#1072]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1072
  [i915#12061]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061
  [i915#13735]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13735
  [i915#15656]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15656
  [i915#15673]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15673
  [i915#1849]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1849
  [i915#3291]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3291
  [i915#3555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3555
  [i915#3840]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3840
  [i915#4103]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4103
  [i915#4613]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4613
  [i915#5354]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5354
  [i915#7707]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7707
  [i915#9732]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9732


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_8754 -> IGTPW_14560
  * Linux: CI_DRM_17994 -> CI_DRM_17995

  CI-20190529: 20190529
  CI_DRM_17994: 483cf2d774a08fdf83f0e4c7a6ab671a53656d3c @ git://anongit.freedesktop.org/gfx-ci/linux
  CI_DRM_17995: d8a2676d71fe28909d78ed9707ca9c6871ff1e14 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_14560: 14560
  IGT_8754: 8754

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/index.html

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✗ i915.CI.Full: failure for tests/xe: Add purgeable memory madvise tests for system allocator (rev3)

[Patchwork]

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== Series Details ==

Series: tests/xe: Add purgeable memory madvise tests for system allocator (rev3)
URL   : https://patchwork.freedesktop.org/series/160333/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_17995_full -> IGTPW_14560_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with IGTPW_14560_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in IGTPW_14560_full, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/index.html

Participating hosts (9 -> 9)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in IGTPW_14560_full:

### IGT changes ###

#### Possible regressions ####

  * igt@gem_eio@in-flight-suspend:
    - shard-tglu:         NOTRUN -> [ABORT][1]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-2/igt@gem_eio@in-flight-suspend.html

  * igt@gem_exec_schedule@wide:
    - shard-glk10:        NOTRUN -> [FAIL][2] +1 other test fail
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-glk10/igt@gem_exec_schedule@wide.html

  * igt@gem_lmem_swapping@smem-oom:
    - shard-dg2:          NOTRUN -> [FAIL][3]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg2-8/igt@gem_lmem_swapping@smem-oom.html

  * igt@kms_3d@basic:
    - shard-mtlp:         [PASS][4] -> [SKIP][5]
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-mtlp-3/igt@kms_3d@basic.html
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-mtlp-1/igt@kms_3d@basic.html

  
New tests
---------

  New tests have been introduced between CI_DRM_17995_full and IGTPW_14560_full:

### New IGT tests (8) ###

  * igt@gem_ctx_shared@q-in-order@bcs0:
    - Statuses : 5 pass(s)
    - Exec time: [0.04, 0.18] s

  * igt@gem_ctx_shared@q-independent@bcs0:
    - Statuses : 4 pass(s)
    - Exec time: [0.02, 0.15] s

  * igt@gem_ctx_shared@q-out-order@bcs0:
    - Statuses : 5 pass(s)
    - Exec time: [0.05, 0.18] s

  * igt@gem_lmem_swapping@heavy-verify-multi-ccs@lmem0:
    - Statuses : 1 pass(s) 1 skip(s)
    - Exec time: [0.0, 7.57] s

  * igt@gem_lmem_swapping@verify-ccs@lmem0:
    - Statuses : 1 pass(s) 1 skip(s)
    - Exec time: [0.0, 39.11] s

  * igt@kms_cursor_edge_walk@256x256-left-edge@pipe-c-hdmi-a-2:
    - Statuses : 1 pass(s)
    - Exec time: [3.63] s

  * igt@kms_cursor_edge_walk@256x256-top-bottom@pipe-c-hdmi-a-1:
    - Statuses : 1 pass(s)
    - Exec time: [3.43] s

  * igt@kms_cursor_edge_walk@64x64-top-bottom@pipe-c-hdmi-a-1:
    - Statuses : 1 pass(s)
    - Exec time: [3.63] s

  

Known issues
------------

  Here are the changes found in IGTPW_14560_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@api_intel_bb@object-reloc-purge-cache:
    - shard-mtlp:         NOTRUN -> [SKIP][6] ([i915#8411])
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-mtlp-4/igt@api_intel_bb@object-reloc-purge-cache.html

  * igt@drm_buddy@drm_buddy:
    - shard-rkl:          NOTRUN -> [SKIP][7] ([i915#15678])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-8/igt@drm_buddy@drm_buddy.html
    - shard-dg1:          NOTRUN -> [SKIP][8] ([i915#15678])
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg1-17/igt@drm_buddy@drm_buddy.html
    - shard-tglu:         NOTRUN -> [SKIP][9] ([i915#15678])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-3/igt@drm_buddy@drm_buddy.html
    - shard-mtlp:         NOTRUN -> [SKIP][10] ([i915#15678])
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-mtlp-4/igt@drm_buddy@drm_buddy.html
    - shard-dg2:          NOTRUN -> [SKIP][11] ([i915#15678])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg2-8/igt@drm_buddy@drm_buddy.html

  * igt@gem_bad_reloc@negative-reloc-lut:
    - shard-rkl:          NOTRUN -> [SKIP][12] ([i915#3281]) +10 other tests skip
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-4/igt@gem_bad_reloc@negative-reloc-lut.html

  * igt@gem_ccs@block-multicopy-inplace:
    - shard-rkl:          NOTRUN -> [SKIP][13] ([i915#3555] / [i915#9323])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-3/igt@gem_ccs@block-multicopy-inplace.html
    - shard-dg1:          NOTRUN -> [SKIP][14] ([i915#3555] / [i915#9323])
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg1-16/igt@gem_ccs@block-multicopy-inplace.html
    - shard-mtlp:         NOTRUN -> [SKIP][15] ([i915#3555] / [i915#9323])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-mtlp-3/igt@gem_ccs@block-multicopy-inplace.html

  * igt@gem_ccs@ctrl-surf-copy:
    - shard-tglu:         NOTRUN -> [SKIP][16] ([i915#3555] / [i915#9323]) +1 other test skip
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-7/igt@gem_ccs@ctrl-surf-copy.html

  * igt@gem_ccs@suspend-resume:
    - shard-tglu:         NOTRUN -> [SKIP][17] ([i915#9323]) +1 other test skip
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-10/igt@gem_ccs@suspend-resume.html

  * igt@gem_close_race@multigpu-basic-threads:
    - shard-rkl:          NOTRUN -> [SKIP][18] ([i915#7697])
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-3/igt@gem_close_race@multigpu-basic-threads.html

  * igt@gem_create@create-ext-cpu-access-sanity-check:
    - shard-rkl:          NOTRUN -> [SKIP][19] ([i915#6335])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-4/igt@gem_create@create-ext-cpu-access-sanity-check.html

  * igt@gem_ctx_sseu@engines:
    - shard-tglu:         NOTRUN -> [SKIP][20] ([i915#280])
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-3/igt@gem_ctx_sseu@engines.html

  * igt@gem_ctx_sseu@invalid-args:
    - shard-tglu-1:       NOTRUN -> [SKIP][21] ([i915#280])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-1/igt@gem_ctx_sseu@invalid-args.html

  * igt@gem_ctx_sseu@mmap-args:
    - shard-rkl:          NOTRUN -> [SKIP][22] ([i915#280])
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-3/igt@gem_ctx_sseu@mmap-args.html

  * igt@gem_eio@in-flight-suspend:
    - shard-dg1:          [PASS][23] -> [DMESG-WARN][24] ([i915#4391] / [i915#4423]) +1 other test dmesg-warn
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-dg1-18/igt@gem_eio@in-flight-suspend.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg1-18/igt@gem_eio@in-flight-suspend.html

  * igt@gem_exec_balancer@bonded-sync:
    - shard-dg1:          NOTRUN -> [SKIP][25] ([i915#4771])
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg1-14/igt@gem_exec_balancer@bonded-sync.html

  * igt@gem_exec_balancer@parallel-balancer:
    - shard-tglu-1:       NOTRUN -> [SKIP][26] ([i915#4525])
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-1/igt@gem_exec_balancer@parallel-balancer.html

  * igt@gem_exec_balancer@parallel-keep-in-fence:
    - shard-rkl:          NOTRUN -> [SKIP][27] ([i915#4525])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-4/igt@gem_exec_balancer@parallel-keep-in-fence.html

  * igt@gem_exec_balancer@parallel-out-fence:
    - shard-tglu:         NOTRUN -> [SKIP][28] ([i915#4525])
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-5/igt@gem_exec_balancer@parallel-out-fence.html

  * igt@gem_exec_fence@submit67:
    - shard-dg2:          NOTRUN -> [SKIP][29] ([i915#4812]) +1 other test skip
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg2-1/igt@gem_exec_fence@submit67.html

  * igt@gem_exec_flush@basic-uc-ro-default:
    - shard-dg1:          NOTRUN -> [SKIP][30] ([i915#3539] / [i915#4852]) +1 other test skip
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg1-16/igt@gem_exec_flush@basic-uc-ro-default.html

  * igt@gem_exec_flush@basic-wb-rw-default:
    - shard-dg2:          NOTRUN -> [SKIP][31] ([i915#3539] / [i915#4852])
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg2-11/igt@gem_exec_flush@basic-wb-rw-default.html

  * igt@gem_exec_reloc@basic-cpu-gtt-noreloc:
    - shard-dg1:          NOTRUN -> [SKIP][32] ([i915#3281]) +3 other tests skip
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg1-14/igt@gem_exec_reloc@basic-cpu-gtt-noreloc.html

  * igt@gem_exec_reloc@basic-gtt-noreloc:
    - shard-mtlp:         NOTRUN -> [SKIP][33] ([i915#3281]) +6 other tests skip
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-mtlp-5/igt@gem_exec_reloc@basic-gtt-noreloc.html
    - shard-dg2:          NOTRUN -> [SKIP][34] ([i915#3281]) +3 other tests skip
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg2-8/igt@gem_exec_reloc@basic-gtt-noreloc.html

  * igt@gem_exec_schedule@semaphore-power:
    - shard-rkl:          NOTRUN -> [SKIP][35] ([i915#7276])
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-3/igt@gem_exec_schedule@semaphore-power.html

  * igt@gem_fence_thrash@bo-write-verify-y:
    - shard-dg2:          NOTRUN -> [SKIP][36] ([i915#4860]) +1 other test skip
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg2-5/igt@gem_fence_thrash@bo-write-verify-y.html

  * igt@gem_fenced_exec_thrash@no-spare-fences:
    - shard-mtlp:         NOTRUN -> [SKIP][37] ([i915#4860]) +1 other test skip
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-mtlp-8/igt@gem_fenced_exec_thrash@no-spare-fences.html

  * igt@gem_lmem_evict@dontneed-evict-race:
    - shard-rkl:          NOTRUN -> [SKIP][38] ([i915#14544] / [i915#4613] / [i915#7582])
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-6/igt@gem_lmem_evict@dontneed-evict-race.html
    - shard-tglu-1:       NOTRUN -> [SKIP][39] ([i915#4613] / [i915#7582])
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-1/igt@gem_lmem_evict@dontneed-evict-race.html

  * igt@gem_lmem_swapping@heavy-verify-random:
    - shard-rkl:          NOTRUN -> [SKIP][40] ([i915#4613]) +3 other tests skip
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-7/igt@gem_lmem_swapping@heavy-verify-random.html

  * igt@gem_lmem_swapping@parallel-random-verify-ccs:
    - shard-tglu-1:       NOTRUN -> [SKIP][41] ([i915#4613]) +1 other test skip
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-1/igt@gem_lmem_swapping@parallel-random-verify-ccs.html

  * igt@gem_lmem_swapping@smem-oom@lmem0:
    - shard-dg2:          NOTRUN -> [CRASH][42] ([i915#5493])
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg2-8/igt@gem_lmem_swapping@smem-oom@lmem0.html

  * igt@gem_lmem_swapping@verify-ccs:
    - shard-tglu:         NOTRUN -> [SKIP][43] ([i915#4613]) +4 other tests skip
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-8/igt@gem_lmem_swapping@verify-ccs.html
    - shard-glk:          NOTRUN -> [SKIP][44] ([i915#4613]) +7 other tests skip
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-glk8/igt@gem_lmem_swapping@verify-ccs.html

  * igt@gem_lmem_swapping@verify-random-ccs:
    - shard-dg1:          NOTRUN -> [SKIP][45] ([i915#12193])
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg1-16/igt@gem_lmem_swapping@verify-random-ccs.html
    - shard-mtlp:         NOTRUN -> [SKIP][46] ([i915#4613]) +1 other test skip
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-mtlp-2/igt@gem_lmem_swapping@verify-random-ccs.html

  * igt@gem_lmem_swapping@verify-random-ccs@lmem0:
    - shard-dg1:          NOTRUN -> [SKIP][47] ([i915#4565])
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg1-16/igt@gem_lmem_swapping@verify-random-ccs@lmem0.html

  * igt@gem_mmap@basic-small-bo:
    - shard-mtlp:         NOTRUN -> [SKIP][48] ([i915#4083]) +4 other tests skip
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-mtlp-2/igt@gem_mmap@basic-small-bo.html

  * igt@gem_mmap_gtt@basic-small-copy-xy:
    - shard-dg1:          NOTRUN -> [SKIP][49] ([i915#4077]) +2 other tests skip
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg1-17/igt@gem_mmap_gtt@basic-small-copy-xy.html

  * igt@gem_mmap_gtt@basic-write-read-distinct:
    - shard-dg2:          NOTRUN -> [SKIP][50] ([i915#4077]) +1 other test skip
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg2-8/igt@gem_mmap_gtt@basic-write-read-distinct.html

  * igt@gem_mmap_gtt@cpuset-medium-copy-odd:
    - shard-mtlp:         NOTRUN -> [SKIP][51] ([i915#4077]) +8 other tests skip
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-mtlp-4/igt@gem_mmap_gtt@cpuset-medium-copy-odd.html

  * igt@gem_mmap_wc@write-prefaulted:
    - shard-dg2:          NOTRUN -> [SKIP][52] ([i915#4083]) +3 other tests skip
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg2-6/igt@gem_mmap_wc@write-prefaulted.html
    - shard-dg1:          NOTRUN -> [SKIP][53] ([i915#4083]) +3 other tests skip
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg1-18/igt@gem_mmap_wc@write-prefaulted.html

  * igt@gem_partial_pwrite_pread@writes-after-reads-display:
    - shard-rkl:          NOTRUN -> [SKIP][54] ([i915#3282]) +3 other tests skip
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-4/igt@gem_partial_pwrite_pread@writes-after-reads-display.html

  * igt@gem_pwrite@basic-exhaustion:
    - shard-glk10:        NOTRUN -> [WARN][55] ([i915#14702] / [i915#2658])
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-glk10/igt@gem_pwrite@basic-exhaustion.html

  * igt@gem_pxp@create-valid-protected-context:
    - shard-dg2:          NOTRUN -> [SKIP][56] ([i915#4270])
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg2-1/igt@gem_pxp@create-valid-protected-context.html
    - shard-dg1:          NOTRUN -> [SKIP][57] ([i915#4270])
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg1-12/igt@gem_pxp@create-valid-protected-context.html

  * igt@gem_readwrite@new-obj:
    - shard-dg2:          NOTRUN -> [SKIP][58] ([i915#3282]) +1 other test skip
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg2-3/igt@gem_readwrite@new-obj.html

  * igt@gem_render_copy@y-tiled-to-vebox-linear:
    - shard-dg2:          NOTRUN -> [SKIP][59] ([i915#5190] / [i915#8428]) +3 other tests skip
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg2-6/igt@gem_render_copy@y-tiled-to-vebox-linear.html

  * igt@gem_render_copy@yf-tiled-ccs-to-yf-tiled:
    - shard-mtlp:         NOTRUN -> [SKIP][60] ([i915#8428]) +3 other tests skip
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-mtlp-4/igt@gem_render_copy@yf-tiled-ccs-to-yf-tiled.html

  * igt@gem_softpin@noreloc-s3:
    - shard-glk:          NOTRUN -> [INCOMPLETE][61] ([i915#13809])
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-glk6/igt@gem_softpin@noreloc-s3.html
    - shard-rkl:          [PASS][62] -> [INCOMPLETE][63] ([i915#13809])
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-rkl-2/igt@gem_softpin@noreloc-s3.html
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-6/igt@gem_softpin@noreloc-s3.html

  * igt@gem_userptr_blits@dmabuf-sync:
    - shard-tglu:         NOTRUN -> [SKIP][64] ([i915#3297] / [i915#3323])
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-8/igt@gem_userptr_blits@dmabuf-sync.html

  * igt@gem_userptr_blits@dmabuf-unsync:
    - shard-dg2:          NOTRUN -> [SKIP][65] ([i915#3297]) +2 other tests skip
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg2-3/igt@gem_userptr_blits@dmabuf-unsync.html
    - shard-rkl:          NOTRUN -> [SKIP][66] ([i915#3297]) +1 other test skip
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-3/igt@gem_userptr_blits@dmabuf-unsync.html
    - shard-dg1:          NOTRUN -> [SKIP][67] ([i915#3297]) +1 other test skip
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg1-16/igt@gem_userptr_blits@dmabuf-unsync.html
    - shard-mtlp:         NOTRUN -> [SKIP][68] ([i915#3297]) +1 other test skip
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-mtlp-7/igt@gem_userptr_blits@dmabuf-unsync.html

  * igt@gem_userptr_blits@forbidden-operations:
    - shard-rkl:          NOTRUN -> [SKIP][69] ([i915#14544] / [i915#3282] / [i915#3297])
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-6/igt@gem_userptr_blits@forbidden-operations.html

  * igt@gem_userptr_blits@invalid-mmap-offset-unsync:
    - shard-tglu-1:       NOTRUN -> [SKIP][70] ([i915#3297])
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-1/igt@gem_userptr_blits@invalid-mmap-offset-unsync.html

  * igt@gem_userptr_blits@map-fixed-invalidate:
    - shard-dg2:          NOTRUN -> [SKIP][71] ([i915#3297] / [i915#4880])
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg2-11/igt@gem_userptr_blits@map-fixed-invalidate.html

  * igt@gem_userptr_blits@readonly-pwrite-unsync:
    - shard-tglu:         NOTRUN -> [SKIP][72] ([i915#3297]) +4 other tests skip
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-8/igt@gem_userptr_blits@readonly-pwrite-unsync.html

  * igt@gen7_exec_parse@bitmasks:
    - shard-dg2:          NOTRUN -> [SKIP][73] +3 other tests skip
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg2-7/igt@gen7_exec_parse@bitmasks.html

  * igt@gen9_exec_parse@basic-rejected:
    - shard-tglu:         NOTRUN -> [SKIP][74] ([i915#2527] / [i915#2856]) +4 other tests skip
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-6/igt@gen9_exec_parse@basic-rejected.html

  * igt@gen9_exec_parse@secure-batches:
    - shard-rkl:          NOTRUN -> [SKIP][75] ([i915#2527])
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-7/igt@gen9_exec_parse@secure-batches.html
    - shard-mtlp:         NOTRUN -> [SKIP][76] ([i915#2856])
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-mtlp-2/igt@gen9_exec_parse@secure-batches.html

  * igt@i915_drm_fdinfo@all-busy-check-all:
    - shard-mtlp:         NOTRUN -> [SKIP][77] ([i915#14123])
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-mtlp-2/igt@i915_drm_fdinfo@all-busy-check-all.html
    - shard-dg2:          NOTRUN -> [SKIP][78] ([i915#14123])
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg2-11/igt@i915_drm_fdinfo@all-busy-check-all.html
    - shard-dg1:          NOTRUN -> [SKIP][79] ([i915#14123])
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg1-17/igt@i915_drm_fdinfo@all-busy-check-all.html

  * igt@i915_module_load@fault-injection@intel_connector_register:
    - shard-glk:          NOTRUN -> [ABORT][80] ([i915#15342]) +1 other test abort
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-glk9/igt@i915_module_load@fault-injection@intel_connector_register.html

  * igt@i915_pm_freq_api@freq-basic-api:
    - shard-tglu:         NOTRUN -> [SKIP][81] ([i915#8399]) +1 other test skip
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-9/igt@i915_pm_freq_api@freq-basic-api.html

  * igt@i915_pm_freq_api@freq-reset:
    - shard-rkl:          NOTRUN -> [SKIP][82] ([i915#8399])
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-2/igt@i915_pm_freq_api@freq-reset.html

  * igt@i915_pm_rc6_residency@rc6-fence:
    - shard-tglu:         NOTRUN -> [WARN][83] ([i915#13790] / [i915#2681]) +1 other test warn
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-10/igt@i915_pm_rc6_residency@rc6-fence.html

  * igt@i915_pm_rpm@gem-execbuf-stress-pc8:
    - shard-mtlp:         NOTRUN -> [SKIP][84] +6 other tests skip
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-mtlp-5/igt@i915_pm_rpm@gem-execbuf-stress-pc8.html

  * igt@i915_pm_rps@reset:
    - shard-snb:          [PASS][85] -> [INCOMPLETE][86] ([i915#13821])
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-snb4/igt@i915_pm_rps@reset.html
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-snb6/igt@i915_pm_rps@reset.html

  * igt@i915_pm_rps@thresholds:
    - shard-mtlp:         NOTRUN -> [SKIP][87] ([i915#11681])
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-mtlp-5/igt@i915_pm_rps@thresholds.html

  * igt@i915_query@query-topology-coherent-slice-mask:
    - shard-dg2:          NOTRUN -> [SKIP][88] ([i915#6188])
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg2-6/igt@i915_query@query-topology-coherent-slice-mask.html

  * igt@i915_selftest@live:
    - shard-mtlp:         [PASS][89] -> [DMESG-FAIL][90] ([i915#12061] / [i915#15560])
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-mtlp-5/igt@i915_selftest@live.html
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-mtlp-1/igt@i915_selftest@live.html

  * igt@i915_selftest@live@workarounds:
    - shard-mtlp:         [PASS][91] -> [DMESG-FAIL][92] ([i915#12061])
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-mtlp-5/igt@i915_selftest@live@workarounds.html
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-mtlp-1/igt@i915_selftest@live@workarounds.html

  * igt@i915_suspend@basic-s3-without-i915:
    - shard-tglu-1:       NOTRUN -> [INCOMPLETE][93] ([i915#4817] / [i915#7443])
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-1/igt@i915_suspend@basic-s3-without-i915.html

  * igt@i915_suspend@fence-restore-untiled:
    - shard-glk:          NOTRUN -> [INCOMPLETE][94] ([i915#4817])
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-glk5/igt@i915_suspend@fence-restore-untiled.html

  * igt@i915_suspend@forcewake:
    - shard-rkl:          NOTRUN -> [INCOMPLETE][95] ([i915#4817]) +1 other test incomplete
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-6/igt@i915_suspend@forcewake.html

  * igt@kms_addfb_basic@framebuffer-vs-set-tiling:
    - shard-mtlp:         NOTRUN -> [SKIP][96] ([i915#4212])
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-mtlp-7/igt@kms_addfb_basic@framebuffer-vs-set-tiling.html

  * igt@kms_async_flips@alternate-sync-async-flip:
    - shard-dg1:          [PASS][97] -> [FAIL][98] ([i915#14888])
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-dg1-14/igt@kms_async_flips@alternate-sync-async-flip.html
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg1-18/igt@kms_async_flips@alternate-sync-async-flip.html

  * igt@kms_async_flips@alternate-sync-async-flip@pipe-a-hdmi-a-4:
    - shard-dg1:          NOTRUN -> [FAIL][99] ([i915#14888])
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg1-18/igt@kms_async_flips@alternate-sync-async-flip@pipe-a-hdmi-a-4.html

  * igt@kms_atomic_transition@plane-all-modeset-transition-fencing:
    - shard-dg2:          [PASS][100] -> [FAIL][101] ([i915#5956]) +1 other test fail
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-dg2-8/igt@kms_atomic_transition@plane-all-modeset-transition-fencing.html
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg2-7/igt@kms_atomic_transition@plane-all-modeset-transition-fencing.html
    - shard-tglu:         [PASS][102] -> [FAIL][103] ([i915#15662]) +1 other test fail
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-tglu-10/igt@kms_atomic_transition@plane-all-modeset-transition-fencing.html
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-9/igt@kms_atomic_transition@plane-all-modeset-transition-fencing.html

  * igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels:
    - shard-glk:          NOTRUN -> [SKIP][104] ([i915#1769])
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-glk1/igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels.html
    - shard-tglu-1:       NOTRUN -> [SKIP][105] ([i915#1769] / [i915#3555])
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-1/igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels.html

  * igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels:
    - shard-tglu:         NOTRUN -> [SKIP][106] ([i915#1769] / [i915#3555])
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-10/igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels.html

  * igt@kms_big_fb@4-tiled-32bpp-rotate-270:
    - shard-tglu:         NOTRUN -> [SKIP][107] ([i915#5286]) +5 other tests skip
   [107]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-6/igt@kms_big_fb@4-tiled-32bpp-rotate-270.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip:
    - shard-rkl:          NOTRUN -> [SKIP][108] ([i915#5286]) +5 other tests skip
   [108]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-5/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip.html

  * igt@kms_big_fb@linear-8bpp-rotate-90:
    - shard-dg1:          NOTRUN -> [SKIP][109] ([i915#3638])
   [109]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg1-17/igt@kms_big_fb@linear-8bpp-rotate-90.html

  * igt@kms_big_fb@linear-max-hw-stride-32bpp-rotate-180-hflip:
    - shard-mtlp:         NOTRUN -> [SKIP][110] ([i915#3828])
   [110]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-mtlp-7/igt@kms_big_fb@linear-max-hw-stride-32bpp-rotate-180-hflip.html

  * igt@kms_big_fb@linear-max-hw-stride-64bpp-rotate-180-hflip:
    - shard-tglu-1:       NOTRUN -> [SKIP][111] ([i915#3828])
   [111]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-1/igt@kms_big_fb@linear-max-hw-stride-64bpp-rotate-180-hflip.html

  * igt@kms_big_fb@y-tiled-8bpp-rotate-180:
    - shard-dg2:          NOTRUN -> [SKIP][112] ([i915#4538] / [i915#5190]) +5 other tests skip
   [112]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg2-6/igt@kms_big_fb@y-tiled-8bpp-rotate-180.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0:
    - shard-dg1:          NOTRUN -> [SKIP][113] ([i915#4538]) +1 other test skip
   [113]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg1-17/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-async-flip:
    - shard-rkl:          NOTRUN -> [SKIP][114] +10 other tests skip
   [114]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-8/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html

  * igt@kms_ccs@bad-aux-stride-4-tiled-mtl-mc-ccs@pipe-a-hdmi-a-4:
    - shard-dg1:          NOTRUN -> [SKIP][115] ([i915#6095]) +179 other tests skip
   [115]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg1-18/igt@kms_ccs@bad-aux-stride-4-tiled-mtl-mc-ccs@pipe-a-hdmi-a-4.html

  * igt@kms_ccs@bad-pixel-format-y-tiled-ccs@pipe-d-hdmi-a-1:
    - shard-dg2:          NOTRUN -> [SKIP][116] ([i915#10307] / [i915#10434] / [i915#6095]) +1 other test skip
   [116]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg2-4/igt@kms_ccs@bad-pixel-format-y-tiled-ccs@pipe-d-hdmi-a-1.html

  * igt@kms_ccs@bad-rotation-90-4-tiled-bmg-ccs:
    - shard-mtlp:         NOTRUN -> [SKIP][117] ([i915#12313]) +1 other test skip
   [117]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-mtlp-3/igt@kms_ccs@bad-rotation-90-4-tiled-bmg-ccs.html

  * igt@kms_ccs@ccs-on-another-bo-y-tiled-ccs@pipe-b-hdmi-a-1:
    - shard-dg2:          NOTRUN -> [SKIP][118] ([i915#10307] / [i915#6095]) +124 other tests skip
   [118]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg2-4/igt@kms_ccs@ccs-on-another-bo-y-tiled-ccs@pipe-b-hdmi-a-1.html

  * igt@kms_ccs@crc-primary-basic-4-tiled-bmg-ccs:
    - shard-dg2:          NOTRUN -> [SKIP][119] ([i915#12313])
   [119]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg2-1/igt@kms_ccs@crc-primary-basic-4-tiled-bmg-ccs.html
    - shard-rkl:          NOTRUN -> [SKIP][120] ([i915#12313]) +2 other tests skip
   [120]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-7/igt@kms_ccs@crc-primary-basic-4-tiled-bmg-ccs.html
    - shard-dg1:          NOTRUN -> [SKIP][121] ([i915#12313])
   [121]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg1-17/igt@kms_ccs@crc-primary-basic-4-tiled-bmg-ccs.html
    - shard-tglu:         NOTRUN -> [SKIP][122] ([i915#12313])
   [122]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-8/igt@kms_ccs@crc-primary-basic-4-tiled-bmg-ccs.html

  * igt@kms_ccs@crc-primary-basic-y-tiled-gen12-rc-ccs-cc@pipe-d-edp-1:
    - shard-mtlp:         NOTRUN -> [SKIP][123] ([i915#6095]) +24 other tests skip
   [123]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-mtlp-2/igt@kms_ccs@crc-primary-basic-y-tiled-gen12-rc-ccs-cc@pipe-d-edp-1.html

  * igt@kms_ccs@crc-primary-rotation-180-4-tiled-dg2-rc-ccs@pipe-c-hdmi-a-1:
    - shard-dg2:          NOTRUN -> [SKIP][124] ([i915#6095]) +61 other tests skip
   [124]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg2-4/igt@kms_ccs@crc-primary-rotation-180-4-tiled-dg2-rc-ccs@pipe-c-hdmi-a-1.html

  * igt@kms_ccs@crc-primary-rotation-180-y-tiled-gen12-mc-ccs@pipe-b-hdmi-a-1:
    - shard-glk:          NOTRUN -> [SKIP][125] +410 other tests skip
   [125]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-glk9/igt@kms_ccs@crc-primary-rotation-180-y-tiled-gen12-mc-ccs@pipe-b-hdmi-a-1.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs@pipe-b-hdmi-a-2:
    - shard-rkl:          NOTRUN -> [SKIP][126] ([i915#6095]) +63 other tests skip
   [126]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-4/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs@pipe-b-hdmi-a-2.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs:
    - shard-rkl:          NOTRUN -> [SKIP][127] ([i915#12805])
   [127]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-2/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs.html

  * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-mc-ccs@pipe-a-hdmi-a-2:
    - shard-rkl:          NOTRUN -> [SKIP][128] ([i915#14544] / [i915#6095]) +1 other test skip
   [128]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-6/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-mc-ccs@pipe-a-hdmi-a-2.html

  * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-mc-ccs@pipe-b-hdmi-a-1:
    - shard-tglu-1:       NOTRUN -> [SKIP][129] ([i915#6095]) +34 other tests skip
   [129]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-1/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-mc-ccs@pipe-b-hdmi-a-1.html

  * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-mc-ccs@pipe-c-hdmi-a-2:
    - shard-rkl:          NOTRUN -> [SKIP][130] ([i915#14098] / [i915#14544] / [i915#6095])
   [130]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-6/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-mc-ccs@pipe-c-hdmi-a-2.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-c-hdmi-a-2:
    - shard-rkl:          NOTRUN -> [SKIP][131] ([i915#14098] / [i915#6095]) +41 other tests skip
   [131]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-3/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-c-hdmi-a-2.html

  * igt@kms_ccs@random-ccs-data-4-tiled-mtl-rc-ccs-cc:
    - shard-tglu:         NOTRUN -> [SKIP][132] ([i915#6095]) +94 other tests skip
   [132]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-6/igt@kms_ccs@random-ccs-data-4-tiled-mtl-rc-ccs-cc.html

  * igt@kms_cdclk@mode-transition-all-outputs:
    - shard-tglu:         NOTRUN -> [SKIP][133] ([i915#3742])
   [133]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-8/igt@kms_cdclk@mode-transition-all-outputs.html
    - shard-dg2:          NOTRUN -> [SKIP][134] ([i915#13784])
   [134]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg2-4/igt@kms_cdclk@mode-transition-all-outputs.html

  * igt@kms_cdclk@plane-scaling@pipe-b-hdmi-a-3:
    - shard-dg2:          NOTRUN -> [SKIP][135] ([i915#13783]) +3 other tests skip
   [135]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg2-1/igt@kms_cdclk@plane-scaling@pipe-b-hdmi-a-3.html

  * igt@kms_cdclk@plane-scaling@pipe-c-edp-1:
    - shard-mtlp:         NOTRUN -> [SKIP][136] ([i915#13783]) +4 other tests skip
   [136]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-mtlp-3/igt@kms_cdclk@plane-scaling@pipe-c-edp-1.html

  * igt@kms_chamelium_edid@dp-edid-stress-resolution-4k:
    - shard-tglu-1:       NOTRUN -> [SKIP][137] ([i915#11151] / [i915#7828]) +2 other tests skip
   [137]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-1/igt@kms_chamelium_edid@dp-edid-stress-resolution-4k.html

  * igt@kms_chamelium_edid@hdmi-mode-timings:
    - shard-tglu:         NOTRUN -> [SKIP][138] ([i915#11151] / [i915#7828]) +6 other tests skip
   [138]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-5/igt@kms_chamelium_edid@hdmi-mode-timings.html

  * igt@kms_chamelium_frames@hdmi-crc-multiple:
    - shard-rkl:          NOTRUN -> [SKIP][139] ([i915#11151] / [i915#7828]) +6 other tests skip
   [139]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-8/igt@kms_chamelium_frames@hdmi-crc-multiple.html

  * igt@kms_chamelium_hpd@hdmi-hpd:
    - shard-mtlp:         NOTRUN -> [SKIP][140] ([i915#11151] / [i915#7828]) +2 other tests skip
   [140]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-mtlp-7/igt@kms_chamelium_hpd@hdmi-hpd.html
    - shard-dg2:          NOTRUN -> [SKIP][141] ([i915#11151] / [i915#7828]) +2 other tests skip
   [141]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg2-3/igt@kms_chamelium_hpd@hdmi-hpd.html

  * igt@kms_chamelium_hpd@hdmi-hpd-with-enabled-mode:
    - shard-dg1:          NOTRUN -> [SKIP][142] ([i915#11151] / [i915#7828]) +1 other test skip
   [142]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg1-12/igt@kms_chamelium_hpd@hdmi-hpd-with-enabled-mode.html

  * igt@kms_color@ctm-green-to-red:
    - shard-dg1:          [PASS][143] -> [DMESG-WARN][144] ([i915#4423]) +2 other tests dmesg-warn
   [143]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-dg1-16/igt@kms_color@ctm-green-to-red.html
   [144]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg1-18/igt@kms_color@ctm-green-to-red.html

  * igt@kms_color_pipeline@plane-lut1d-ctm3x4-lut1d@pipe-a-edp-1:
    - shard-mtlp:         NOTRUN -> [FAIL][145] ([i915#15522]) +4 other tests fail
   [145]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-mtlp-4/igt@kms_color_pipeline@plane-lut1d-ctm3x4-lut1d@pipe-a-edp-1.html

  * igt@kms_content_protection@dp-mst-lic-type-1:
    - shard-tglu:         NOTRUN -> [SKIP][146] ([i915#15330] / [i915#3116] / [i915#3299])
   [146]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-6/igt@kms_content_protection@dp-mst-lic-type-1.html

  * igt@kms_content_protection@dp-mst-type-0-hdcp14:
    - shard-dg2:          NOTRUN -> [SKIP][147] ([i915#15330])
   [147]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg2-6/igt@kms_content_protection@dp-mst-type-0-hdcp14.html
    - shard-tglu:         NOTRUN -> [SKIP][148] ([i915#15330])
   [148]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-2/igt@kms_content_protection@dp-mst-type-0-hdcp14.html

  * igt@kms_content_protection@legacy-hdcp14:
    - shard-tglu:         NOTRUN -> [SKIP][149] ([i915#6944])
   [149]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-7/igt@kms_content_protection@legacy-hdcp14.html

  * igt@kms_content_protection@lic-type-0-hdcp14@pipe-a-dp-3:
    - shard-dg2:          NOTRUN -> [FAIL][150] ([i915#7173])
   [150]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg2-11/igt@kms_content_protection@lic-type-0-hdcp14@pipe-a-dp-3.html

  * igt@kms_content_protection@lic-type-1:
    - shard-mtlp:         NOTRUN -> [SKIP][151] ([i915#6944] / [i915#9424])
   [151]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-mtlp-6/igt@kms_content_protection@lic-type-1.html

  * igt@kms_content_protection@mei-interface:
    - shard-tglu:         NOTRUN -> [SKIP][152] ([i915#6944] / [i915#9424])
   [152]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-9/igt@kms_content_protection@mei-interface.html

  * igt@kms_content_protection@srm:
    - shard-rkl:          NOTRUN -> [SKIP][153] ([i915#14544] / [i915#6944] / [i915#7118])
   [153]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-6/igt@kms_content_protection@srm.html
    - shard-tglu-1:       NOTRUN -> [SKIP][154] ([i915#6944] / [i915#7116] / [i915#7118])
   [154]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-1/igt@kms_content_protection@srm.html

  * igt@kms_content_protection@type1:
    - shard-tglu:         NOTRUN -> [SKIP][155] ([i915#6944] / [i915#7116] / [i915#7118] / [i915#9424])
   [155]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-10/igt@kms_content_protection@type1.html

  * igt@kms_cursor_crc@cursor-random-256x85:
    - shard-tglu-1:       NOTRUN -> [FAIL][156] ([i915#13566]) +1 other test fail
   [156]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-1/igt@kms_cursor_crc@cursor-random-256x85.html

  * igt@kms_cursor_crc@cursor-random-512x512:
    - shard-tglu:         NOTRUN -> [SKIP][157] ([i915#13049])
   [157]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-6/igt@kms_cursor_crc@cursor-random-512x512.html

  * igt@kms_cursor_crc@cursor-rapid-movement-128x42:
    - shard-mtlp:         NOTRUN -> [SKIP][158] ([i915#8814]) +1 other test skip
   [158]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-mtlp-4/igt@kms_cursor_crc@cursor-rapid-movement-128x42.html

  * igt@kms_cursor_crc@cursor-sliding-128x42:
    - shard-tglu:         NOTRUN -> [FAIL][159] ([i915#13566]) +3 other tests fail
   [159]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-6/igt@kms_cursor_crc@cursor-sliding-128x42.html

  * igt@kms_cursor_crc@cursor-sliding-32x10:
    - shard-dg1:          NOTRUN -> [SKIP][160] ([i915#3555]) +3 other tests skip
   [160]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg1-16/igt@kms_cursor_crc@cursor-sliding-32x10.html

  * igt@kms_cursor_crc@cursor-sliding-max-size:
    - shard-mtlp:         NOTRUN -> [SKIP][161] ([i915#3555] / [i915#8814])
   [161]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-mtlp-6/igt@kms_cursor_crc@cursor-sliding-max-size.html
    - shard-dg2:          NOTRUN -> [SKIP][162] ([i915#3555]) +1 other test skip
   [162]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg2-6/igt@kms_cursor_crc@cursor-sliding-max-size.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
    - shard-tglu:         NOTRUN -> [SKIP][163] ([i915#4103])
   [163]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-4/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html

  * igt@kms_cursor_legacy@cursora-vs-flipb-legacy:
    - shard-rkl:          NOTRUN -> [SKIP][164] ([i915#14544])
   [164]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-6/igt@kms_cursor_legacy@cursora-vs-flipb-legacy.html
    - shard-mtlp:         NOTRUN -> [SKIP][165] ([i915#9809]) +1 other test skip
   [165]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-mtlp-7/igt@kms_cursor_legacy@cursora-vs-flipb-legacy.html

  * igt@kms_cursor_legacy@cursorb-vs-flipb-varying-size:
    - shard-dg2:          NOTRUN -> [SKIP][166] ([i915#13046] / [i915#5354]) +1 other test skip
   [166]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg2-3/igt@kms_cursor_legacy@cursorb-vs-flipb-varying-size.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size:
    - shard-glk:          NOTRUN -> [FAIL][167] ([i915#15588] / [i915#2346])
   [167]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-glk9/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html

  * igt@kms_cursor_legacy@modeset-atomic-cursor-hotspot:
    - shard-mtlp:         NOTRUN -> [SKIP][168] ([i915#9067])
   [168]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-mtlp-2/igt@kms_cursor_legacy@modeset-atomic-cursor-hotspot.html

  * igt@kms_dirtyfb@drrs-dirtyfb-ioctl:
    - shard-dg2:          NOTRUN -> [SKIP][169] ([i915#9833])
   [169]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg2-1/igt@kms_dirtyfb@drrs-dirtyfb-ioctl.html
    - shard-rkl:          NOTRUN -> [SKIP][170] ([i915#9723])
   [170]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-7/igt@kms_dirtyfb@drrs-dirtyfb-ioctl.html
    - shard-dg1:          NOTRUN -> [SKIP][171] ([i915#9723])
   [171]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg1-17/igt@kms_dirtyfb@drrs-dirtyfb-ioctl.html
    - shard-mtlp:         NOTRUN -> [SKIP][172] ([i915#9833])
   [172]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-mtlp-1/igt@kms_dirtyfb@drrs-dirtyfb-ioctl.html

  * igt@kms_dirtyfb@psr-dirtyfb-ioctl:
    - shard-tglu:         NOTRUN -> [SKIP][173] ([i915#9723]) +1 other test skip
   [173]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-7/igt@kms_dirtyfb@psr-dirtyfb-ioctl.html

  * igt@kms_display_modes@extended-mode-basic:
    - shard-dg2:          NOTRUN -> [SKIP][174] ([i915#13691])
   [174]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg2-3/igt@kms_display_modes@extended-mode-basic.html
    - shard-tglu:         NOTRUN -> [SKIP][175] ([i915#13691])
   [175]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-9/igt@kms_display_modes@extended-mode-basic.html

  * igt@kms_dp_link_training@non-uhbr-mst:
    - shard-tglu-1:       NOTRUN -> [SKIP][176] ([i915#13749])
   [176]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-1/igt@kms_dp_link_training@non-uhbr-mst.html

  * igt@kms_dp_link_training@non-uhbr-sst:
    - shard-tglu:         NOTRUN -> [SKIP][177] ([i915#13749])
   [177]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-8/igt@kms_dp_link_training@non-uhbr-sst.html

  * igt@kms_dp_link_training@uhbr-sst:
    - shard-rkl:          NOTRUN -> [SKIP][178] ([i915#13748])
   [178]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-7/igt@kms_dp_link_training@uhbr-sst.html

  * igt@kms_dp_linktrain_fallback@dp-fallback:
    - shard-dg2:          NOTRUN -> [SKIP][179] ([i915#13707])
   [179]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg2-1/igt@kms_dp_linktrain_fallback@dp-fallback.html
    - shard-rkl:          NOTRUN -> [SKIP][180] ([i915#13707])
   [180]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-3/igt@kms_dp_linktrain_fallback@dp-fallback.html
    - shard-dg1:          NOTRUN -> [SKIP][181] ([i915#13707])
   [181]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg1-16/igt@kms_dp_linktrain_fallback@dp-fallback.html
    - shard-tglu:         NOTRUN -> [SKIP][182] ([i915#13707])
   [182]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-7/igt@kms_dp_linktrain_fallback@dp-fallback.html
    - shard-mtlp:         NOTRUN -> [SKIP][183] ([i915#13707])
   [183]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-mtlp-3/igt@kms_dp_linktrain_fallback@dp-fallback.html

  * igt@kms_dsc@dsc-basic:
    - shard-dg2:          NOTRUN -> [SKIP][184] ([i915#3555] / [i915#3840]) +1 other test skip
   [184]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg2-5/igt@kms_dsc@dsc-basic.html
    - shard-rkl:          NOTRUN -> [SKIP][185] ([i915#3555] / [i915#3840]) +1 other test skip
   [185]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-4/igt@kms_dsc@dsc-basic.html
    - shard-tglu-1:       NOTRUN -> [SKIP][186] ([i915#3555] / [i915#3840])
   [186]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-1/igt@kms_dsc@dsc-basic.html
    - shard-dg1:          NOTRUN -> [SKIP][187] ([i915#3555] / [i915#3840]) +1 other test skip
   [187]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg1-18/igt@kms_dsc@dsc-basic.html
    - shard-mtlp:         NOTRUN -> [SKIP][188] ([i915#3555] / [i915#3840] / [i915#9159])
   [188]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-mtlp-8/igt@kms_dsc@dsc-basic.html

  * igt@kms_dsc@dsc-fractional-bpp-with-bpc:
    - shard-dg2:          NOTRUN -> [SKIP][189] ([i915#3840])
   [189]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg2-1/igt@kms_dsc@dsc-fractional-bpp-with-bpc.html
    - shard-tglu:         NOTRUN -> [SKIP][190] ([i915#3840])
   [190]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-8/igt@kms_dsc@dsc-fractional-bpp-with-bpc.html

  * igt@kms_dsc@dsc-with-output-formats:
    - shard-mtlp:         NOTRUN -> [SKIP][191] ([i915#3555] / [i915#3840])
   [191]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-mtlp-6/igt@kms_dsc@dsc-with-output-formats.html
    - shard-tglu:         NOTRUN -> [SKIP][192] ([i915#3555] / [i915#3840]) +1 other test skip
   [192]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-5/igt@kms_dsc@dsc-with-output-formats.html

  * igt@kms_dsc@dsc-with-output-formats-with-bpc:
    - shard-rkl:          NOTRUN -> [SKIP][193] ([i915#3840] / [i915#9053])
   [193]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-2/igt@kms_dsc@dsc-with-output-formats-with-bpc.html

  * igt@kms_fbcon_fbt@psr-suspend:
    - shard-rkl:          NOTRUN -> [SKIP][194] ([i915#3955])
   [194]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-4/igt@kms_fbcon_fbt@psr-suspend.html

  * igt@kms_feature_discovery@psr2:
    - shard-rkl:          NOTRUN -> [SKIP][195] ([i915#658])
   [195]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-5/igt@kms_feature_discovery@psr2.html

  * igt@kms_flip@2x-absolute-wf_vblank-interruptible:
    - shard-mtlp:         NOTRUN -> [SKIP][196] ([i915#3637] / [i915#9934]) +1 other test skip
   [196]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-mtlp-7/igt@kms_flip@2x-absolute-wf_vblank-interruptible.html
    - shard-dg2:          NOTRUN -> [SKIP][197] ([i915#9934]) +1 other test skip
   [197]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg2-3/igt@kms_flip@2x-absolute-wf_vblank-interruptible.html
    - shard-tglu-1:       NOTRUN -> [SKIP][198] ([i915#3637] / [i915#9934])
   [198]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-1/igt@kms_flip@2x-absolute-wf_vblank-interruptible.html

  * igt@kms_flip@2x-flip-vs-dpms-on-nop-interruptible:
    - shard-tglu:         NOTRUN -> [SKIP][199] ([i915#9934])
   [199]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-9/igt@kms_flip@2x-flip-vs-dpms-on-nop-interruptible.html
    - shard-mtlp:         NOTRUN -> [SKIP][200] ([i915#9934])
   [200]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-mtlp-6/igt@kms_flip@2x-flip-vs-dpms-on-nop-interruptible.html

  * igt@kms_flip@2x-flip-vs-panning-interruptible:
    - shard-dg1:          NOTRUN -> [SKIP][201] ([i915#9934]) +2 other tests skip
   [201]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg1-18/igt@kms_flip@2x-flip-vs-panning-interruptible.html

  * igt@kms_flip@2x-flip-vs-suspend-interruptible:
    - shard-snb:          [PASS][202] -> [TIMEOUT][203] ([i915#14033] / [i915#14350])
   [202]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-snb7/igt@kms_flip@2x-flip-vs-suspend-interruptible.html
   [203]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-snb4/igt@kms_flip@2x-flip-vs-suspend-interruptible.html

  * igt@kms_flip@2x-flip-vs-suspend-interruptible@ab-vga1-hdmi-a1:
    - shard-snb:          [PASS][204] -> [TIMEOUT][205] ([i915#14033]) +2 other tests timeout
   [204]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-snb7/igt@kms_flip@2x-flip-vs-suspend-interruptible@ab-vga1-hdmi-a1.html
   [205]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-snb4/igt@kms_flip@2x-flip-vs-suspend-interruptible@ab-vga1-hdmi-a1.html

  * igt@kms_flip@2x-nonexisting-fb:
    - shard-tglu:         NOTRUN -> [SKIP][206] ([i915#3637] / [i915#9934]) +4 other tests skip
   [206]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-8/igt@kms_flip@2x-nonexisting-fb.html

  * igt@kms_flip@2x-plain-flip:
    - shard-rkl:          NOTRUN -> [SKIP][207] ([i915#9934]) +2 other tests skip
   [207]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-2/igt@kms_flip@2x-plain-flip.html

  * igt@kms_flip@flip-vs-suspend-interruptible:
    - shard-glk:          NOTRUN -> [INCOMPLETE][208] ([i915#12745] / [i915#4839])
   [208]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-glk6/igt@kms_flip@flip-vs-suspend-interruptible.html

  * igt@kms_flip@flip-vs-suspend-interruptible@a-hdmi-a1:
    - shard-glk:          NOTRUN -> [INCOMPLETE][209] ([i915#12745])
   [209]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-glk6/igt@kms_flip@flip-vs-suspend-interruptible@a-hdmi-a1.html

  * igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling:
    - shard-rkl:          NOTRUN -> [SKIP][210] ([i915#15643]) +3 other tests skip
   [210]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-3/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-upscaling:
    - shard-tglu-1:       NOTRUN -> [SKIP][211] ([i915#15643])
   [211]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-1/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-upscaling.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-downscaling:
    - shard-dg2:          NOTRUN -> [SKIP][212] ([i915#15643]) +1 other test skip
   [212]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg2-3/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-downscaling.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling:
    - shard-tglu:         NOTRUN -> [SKIP][213] ([i915#15643]) +3 other tests skip
   [213]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-5/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-downscaling:
    - shard-dg1:          NOTRUN -> [SKIP][214] ([i915#15643]) +1 other test skip
   [214]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg1-16/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-downscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling:
    - shard-mtlp:         NOTRUN -> [SKIP][215] ([i915#15643])
   [215]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-mtlp-5/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling.html

  * igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-indfb-draw-mmap-cpu:
    - shard-dg2:          [PASS][216] -> [FAIL][217] ([i915#15389])
   [216]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-dg2-11/igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-indfb-draw-mmap-cpu.html
   [217]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg2-5/igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-indfb-draw-mmap-cpu.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-onoff:
    - shard-tglu:         NOTRUN -> [SKIP][218] +67 other tests skip
   [218]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-3/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-onoff.html

  * igt@kms_frontbuffer_tracking@fbc-tiling-4:
    - shard-rkl:          NOTRUN -> [SKIP][219] ([i915#5439])
   [219]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-3/igt@kms_frontbuffer_tracking@fbc-tiling-4.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-indfb-draw-pwrite:
    - shard-dg2:          NOTRUN -> [SKIP][220] ([i915#15102])
   [220]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg2-8/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-indfb-draw-pwrite.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-pwrite:
    - shard-dg1:          NOTRUN -> [SKIP][221] ([i915#15102] / [i915#3458]) +5 other tests skip
   [221]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg1-12/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-pwrite.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-pri-indfb-multidraw:
    - shard-tglu-1:       NOTRUN -> [SKIP][222] +15 other tests skip
   [222]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-1/igt@kms_frontbuffer_tracking@fbcpsr-2p-pri-indfb-multidraw.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-shrfb-draw-mmap-wc:
    - shard-dg2:          NOTRUN -> [SKIP][223] ([i915#8708]) +4 other tests skip
   [223]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg2-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-shrfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-shrfb-draw-render:
    - shard-dg2:          NOTRUN -> [SKIP][224] ([i915#5354]) +21 other tests skip
   [224]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg2-7/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-shrfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-draw-pwrite:
    - shard-dg1:          NOTRUN -> [SKIP][225] +13 other tests skip
   [225]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg1-15/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-draw-pwrite.html

  * igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-mmap-wc:
    - shard-tglu-1:       NOTRUN -> [SKIP][226] ([i915#15102]) +4 other tests skip
   [226]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-1/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@pipe-fbc-rte:
    - shard-tglu:         NOTRUN -> [SKIP][227] ([i915#9766])
   [227]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-9/igt@kms_frontbuffer_tracking@pipe-fbc-rte.html

  * igt@kms_frontbuffer_tracking@psr-1p-offscreen-pri-indfb-draw-mmap-gtt:
    - shard-rkl:          NOTRUN -> [SKIP][228] ([i915#15102]) +1 other test skip
   [228]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-2/igt@kms_frontbuffer_tracking@psr-1p-offscreen-pri-indfb-draw-mmap-gtt.html
    - shard-dg1:          NOTRUN -> [SKIP][229] ([i915#15104])
   [229]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg1-15/igt@kms_frontbuffer_tracking@psr-1p-offscreen-pri-indfb-draw-mmap-gtt.html
    - shard-mtlp:         NOTRUN -> [SKIP][230] ([i915#15104])
   [230]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-mtlp-8/igt@kms_frontbuffer_tracking@psr-1p-offscreen-pri-indfb-draw-mmap-gtt.html
    - shard-dg2:          NOTRUN -> [SKIP][231] ([i915#15104])
   [231]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg2-4/igt@kms_frontbuffer_tracking@psr-1p-offscreen-pri-indfb-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-render:
    - shard-dg2:          NOTRUN -> [SKIP][232] ([i915#15102] / [i915#3458]) +5 other tests skip
   [232]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg2-3/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-cur-indfb-draw-mmap-gtt:
    - shard-dg1:          NOTRUN -> [SKIP][233] ([i915#8708]) +4 other tests skip
   [233]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg1-15/igt@kms_frontbuffer_tracking@psr-2p-primscrn-cur-indfb-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-indfb-draw-render:
    - shard-rkl:          NOTRUN -> [SKIP][234] ([i915#14544] / [i915#1825])
   [234]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-6/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-render:
    - shard-mtlp:         NOTRUN -> [SKIP][235] ([i915#1825]) +18 other tests skip
   [235]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-mtlp-2/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-shrfb-draw-mmap-gtt:
    - shard-mtlp:         NOTRUN -> [SKIP][236] ([i915#8708]) +2 other tests skip
   [236]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-mtlp-4/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-shrfb-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-shrfb-plflip-blt:
    - shard-rkl:          NOTRUN -> [SKIP][237] ([i915#1825]) +30 other tests skip
   [237]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-2/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-shrfb-plflip-blt.html

  * igt@kms_frontbuffer_tracking@psr-indfb-scaledprimary:
    - shard-glk10:        NOTRUN -> [SKIP][238] +196 other tests skip
   [238]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-glk10/igt@kms_frontbuffer_tracking@psr-indfb-scaledprimary.html

  * igt@kms_frontbuffer_tracking@psr-rgb565-draw-render:
    - shard-rkl:          NOTRUN -> [SKIP][239] ([i915#15102] / [i915#3023]) +11 other tests skip
   [239]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-3/igt@kms_frontbuffer_tracking@psr-rgb565-draw-render.html

  * igt@kms_frontbuffer_tracking@psr-shrfb-scaledprimary:
    - shard-tglu:         NOTRUN -> [SKIP][240] ([i915#15102]) +32 other tests skip
   [240]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-9/igt@kms_frontbuffer_tracking@psr-shrfb-scaledprimary.html

  * igt@kms_hdr@bpc-switch-dpms:
    - shard-rkl:          NOTRUN -> [SKIP][241] ([i915#3555] / [i915#8228]) +1 other test skip
   [241]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-2/igt@kms_hdr@bpc-switch-dpms.html
    - shard-dg1:          NOTRUN -> [SKIP][242] ([i915#3555] / [i915#8228])
   [242]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg1-13/igt@kms_hdr@bpc-switch-dpms.html
    - shard-tglu:         NOTRUN -> [SKIP][243] ([i915#3555] / [i915#8228]) +1 other test skip
   [243]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-7/igt@kms_hdr@bpc-switch-dpms.html

  * igt@kms_hdr@brightness-with-hdr:
    - shard-rkl:          NOTRUN -> [SKIP][244] ([i915#12713])
   [244]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-8/igt@kms_hdr@brightness-with-hdr.html

  * igt@kms_hdr@static-swap:
    - shard-dg2:          [PASS][245] -> [SKIP][246] ([i915#3555] / [i915#8228])
   [245]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-dg2-11/igt@kms_hdr@static-swap.html
   [246]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg2-3/igt@kms_hdr@static-swap.html

  * igt@kms_hdr@static-toggle-suspend:
    - shard-dg2:          NOTRUN -> [SKIP][247] ([i915#3555] / [i915#8228]) +1 other test skip
   [247]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg2-7/igt@kms_hdr@static-toggle-suspend.html

  * igt@kms_joiner@basic-big-joiner:
    - shard-dg1:          NOTRUN -> [SKIP][248] ([i915#15460])
   [248]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg1-17/igt@kms_joiner@basic-big-joiner.html
    - shard-tglu:         NOTRUN -> [SKIP][249] ([i915#15460])
   [249]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-4/igt@kms_joiner@basic-big-joiner.html
    - shard-mtlp:         NOTRUN -> [SKIP][250] ([i915#15460])
   [250]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-mtlp-2/igt@kms_joiner@basic-big-joiner.html
    - shard-dg2:          NOTRUN -> [SKIP][251] ([i915#15460])
   [251]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg2-11/igt@kms_joiner@basic-big-joiner.html

  * igt@kms_joiner@basic-force-big-joiner:
    - shard-tglu:         NOTRUN -> [SKIP][252] ([i915#15459])
   [252]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-6/igt@kms_joiner@basic-force-big-joiner.html

  * igt@kms_joiner@invalid-modeset-force-ultra-joiner:
    - shard-rkl:          NOTRUN -> [SKIP][253] ([i915#15458])
   [253]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-5/igt@kms_joiner@invalid-modeset-force-ultra-joiner.html

  * igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner:
    - shard-dg1:          NOTRUN -> [SKIP][254] ([i915#15638])
   [254]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg1-15/igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner.html
    - shard-tglu:         NOTRUN -> [SKIP][255] ([i915#15638])
   [255]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-6/igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner.html

  * igt@kms_multipipe_modeset@basic-max-pipe-crc-check:
    - shard-tglu-1:       NOTRUN -> [SKIP][256] ([i915#1839])
   [256]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-1/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html

  * igt@kms_panel_fitting@atomic-fastset:
    - shard-tglu:         NOTRUN -> [SKIP][257] ([i915#6301]) +1 other test skip
   [257]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-10/igt@kms_panel_fitting@atomic-fastset.html
    - shard-dg1:          NOTRUN -> [SKIP][258] ([i915#6301]) +1 other test skip
   [258]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg1-12/igt@kms_panel_fitting@atomic-fastset.html

  * igt@kms_panel_fitting@legacy:
    - shard-dg2:          NOTRUN -> [SKIP][259] ([i915#6301])
   [259]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg2-4/igt@kms_panel_fitting@legacy.html
    - shard-rkl:          NOTRUN -> [SKIP][260] ([i915#6301])
   [260]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-2/igt@kms_panel_fitting@legacy.html

  * igt@kms_pipe_crc_basic@suspend-read-crc:
    - shard-rkl:          [PASS][261] -> [INCOMPLETE][262] ([i915#12756] / [i915#13476])
   [261]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-rkl-8/igt@kms_pipe_crc_basic@suspend-read-crc.html
   [262]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-3/igt@kms_pipe_crc_basic@suspend-read-crc.html

  * igt@kms_pipe_crc_basic@suspend-read-crc@pipe-b-hdmi-a-2:
    - shard-rkl:          NOTRUN -> [INCOMPLETE][263] ([i915#13476])
   [263]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-3/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-b-hdmi-a-2.html

  * igt@kms_plane@pixel-format-4-tiled-dg2-mc-ccs-modifier-source-clamping:
    - shard-tglu:         NOTRUN -> [SKIP][264] ([i915#8825]) +6 other tests skip
   [264]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-7/igt@kms_plane@pixel-format-4-tiled-dg2-mc-ccs-modifier-source-clamping.html
    - shard-mtlp:         NOTRUN -> [SKIP][265] ([i915#8825]) +1 other test skip
   [265]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-mtlp-2/igt@kms_plane@pixel-format-4-tiled-dg2-mc-ccs-modifier-source-clamping.html
    - shard-dg2:          NOTRUN -> [SKIP][266] ([i915#8825]) +3 other tests skip
   [266]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg2-7/igt@kms_plane@pixel-format-4-tiled-dg2-mc-ccs-modifier-source-clamping.html
    - shard-dg1:          NOTRUN -> [SKIP][267] ([i915#8825]) +1 other test skip
   [267]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg1-18/igt@kms_plane@pixel-format-4-tiled-dg2-mc-ccs-modifier-source-clamping.html

  * igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-modifier:
    - shard-rkl:          NOTRUN -> [SKIP][268] ([i915#14544] / [i915#8825])
   [268]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-6/igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-modifier.html
    - shard-tglu-1:       NOTRUN -> [SKIP][269] ([i915#8825]) +1 other test skip
   [269]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-1/igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-modifier.html

  * igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-modifier@pipe-a-plane-5:
    - shard-mtlp:         NOTRUN -> [SKIP][270] ([i915#15608]) +1 other test skip
   [270]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-mtlp-1/igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-modifier@pipe-a-plane-5.html

  * igt@kms_plane@pixel-format-y-tiled-ccs-modifier:
    - shard-rkl:          NOTRUN -> [SKIP][271] ([i915#8825]) +4 other tests skip
   [271]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-3/igt@kms_plane@pixel-format-y-tiled-ccs-modifier.html

  * igt@kms_plane_alpha_blend@alpha-basic:
    - shard-glk:          NOTRUN -> [FAIL][272] ([i915#12178])
   [272]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-glk8/igt@kms_plane_alpha_blend@alpha-basic.html

  * igt@kms_plane_alpha_blend@alpha-basic@pipe-c-hdmi-a-1:
    - shard-glk:          NOTRUN -> [FAIL][273] ([i915#7862]) +1 other test fail
   [273]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-glk8/igt@kms_plane_alpha_blend@alpha-basic@pipe-c-hdmi-a-1.html

  * igt@kms_plane_multiple@2x-tiling-none:
    - shard-rkl:          NOTRUN -> [SKIP][274] ([i915#13958])
   [274]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-4/igt@kms_plane_multiple@2x-tiling-none.html

  * igt@kms_plane_multiple@2x-tiling-yf:
    - shard-tglu:         NOTRUN -> [SKIP][275] ([i915#13958])
   [275]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-10/igt@kms_plane_multiple@2x-tiling-yf.html

  * igt@kms_plane_multiple@tiling-4:
    - shard-rkl:          NOTRUN -> [SKIP][276] ([i915#14259])
   [276]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-8/igt@kms_plane_multiple@tiling-4.html

  * igt@kms_plane_multiple@tiling-yf:
    - shard-tglu-1:       NOTRUN -> [SKIP][277] ([i915#14259])
   [277]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-1/igt@kms_plane_multiple@tiling-yf.html

  * igt@kms_plane_scaling@plane-downscale-factor-0-5-with-rotation@pipe-a:
    - shard-rkl:          NOTRUN -> [SKIP][278] ([i915#15329]) +3 other tests skip
   [278]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-3/igt@kms_plane_scaling@plane-downscale-factor-0-5-with-rotation@pipe-a.html

  * igt@kms_plane_scaling@planes-upscale-factor-0-25@pipe-a:
    - shard-snb:          NOTRUN -> [SKIP][279] +70 other tests skip
   [279]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-snb7/igt@kms_plane_scaling@planes-upscale-factor-0-25@pipe-a.html

  * igt@kms_pm_backlight@bad-brightness:
    - shard-rkl:          NOTRUN -> [SKIP][280] ([i915#5354])
   [280]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-5/igt@kms_pm_backlight@bad-brightness.html

  * igt@kms_pm_backlight@brightness-with-dpms:
    - shard-tglu:         NOTRUN -> [SKIP][281] ([i915#12343])
   [281]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-8/igt@kms_pm_backlight@brightness-with-dpms.html

  * igt@kms_pm_dc@dc5-retention-flops:
    - shard-rkl:          NOTRUN -> [SKIP][282] ([i915#3828])
   [282]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-7/igt@kms_pm_dc@dc5-retention-flops.html

  * igt@kms_pm_dc@dc6-dpms:
    - shard-tglu:         NOTRUN -> [FAIL][283] ([i915#9295])
   [283]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-5/igt@kms_pm_dc@dc6-dpms.html

  * igt@kms_pm_dc@dc6-psr:
    - shard-rkl:          NOTRUN -> [SKIP][284] ([i915#14544] / [i915#9685])
   [284]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-6/igt@kms_pm_dc@dc6-psr.html

  * igt@kms_pm_dc@dc9-dpms:
    - shard-tglu-1:       NOTRUN -> [SKIP][285] ([i915#4281])
   [285]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-1/igt@kms_pm_dc@dc9-dpms.html

  * igt@kms_pm_lpsp@screens-disabled:
    - shard-tglu:         NOTRUN -> [SKIP][286] ([i915#8430])
   [286]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-6/igt@kms_pm_lpsp@screens-disabled.html

  * igt@kms_pm_rpm@modeset-non-lpsp:
    - shard-dg2:          [PASS][287] -> [SKIP][288] ([i915#15073])
   [287]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-dg2-3/igt@kms_pm_rpm@modeset-non-lpsp.html
   [288]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg2-4/igt@kms_pm_rpm@modeset-non-lpsp.html

  * igt@kms_pm_rpm@modeset-non-lpsp-stress:
    - shard-dg1:          [PASS][289] -> [SKIP][290] ([i915#15073]) +1 other test skip
   [289]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-dg1-16/igt@kms_pm_rpm@modeset-non-lpsp-stress.html
   [290]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg1-15/igt@kms_pm_rpm@modeset-non-lpsp-stress.html
    - shard-tglu:         NOTRUN -> [SKIP][291] ([i915#15073])
   [291]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-10/igt@kms_pm_rpm@modeset-non-lpsp-stress.html

  * igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait:
    - shard-mtlp:         NOTRUN -> [SKIP][292] ([i915#15073])
   [292]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-mtlp-2/igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait.html

  * igt@kms_pm_rpm@system-suspend-modeset:
    - shard-glk:          [PASS][293] -> [INCOMPLETE][294] ([i915#10553])
   [293]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-glk1/igt@kms_pm_rpm@system-suspend-modeset.html
   [294]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-glk1/igt@kms_pm_rpm@system-suspend-modeset.html

  * igt@kms_prime@basic-crc-vgem:
    - shard-dg2:          NOTRUN -> [SKIP][295] ([i915#6524] / [i915#6805])
   [295]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg2-6/igt@kms_prime@basic-crc-vgem.html
    - shard-dg1:          NOTRUN -> [SKIP][296] ([i915#6524])
   [296]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg1-15/igt@kms_prime@basic-crc-vgem.html

  * igt@kms_psr2_sf@fbc-pr-overlay-plane-move-continuous-exceed-fully-sf:
    - shard-tglu:         NOTRUN -> [SKIP][297] ([i915#11520]) +11 other tests skip
   [297]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-10/igt@kms_psr2_sf@fbc-pr-overlay-plane-move-continuous-exceed-fully-sf.html

  * igt@kms_psr2_sf@fbc-pr-plane-move-sf-dmg-area:
    - shard-glk:          NOTRUN -> [SKIP][298] ([i915#11520]) +12 other tests skip
   [298]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-glk5/igt@kms_psr2_sf@fbc-pr-plane-move-sf-dmg-area.html

  * igt@kms_psr2_sf@fbc-psr2-primary-plane-update-sf-dmg-area@pipe-a-edp-1:
    - shard-mtlp:         NOTRUN -> [SKIP][299] ([i915#9808])
   [299]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-mtlp-3/igt@kms_psr2_sf@fbc-psr2-primary-plane-update-sf-dmg-area@pipe-a-edp-1.html

  * igt@kms_psr2_sf@pr-cursor-plane-move-continuous-exceed-sf:
    - shard-dg1:          NOTRUN -> [SKIP][300] ([i915#11520]) +3 other tests skip
   [300]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg1-14/igt@kms_psr2_sf@pr-cursor-plane-move-continuous-exceed-sf.html

  * igt@kms_psr2_sf@pr-plane-move-sf-dmg-area:
    - shard-mtlp:         NOTRUN -> [SKIP][301] ([i915#12316]) +4 other tests skip
   [301]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-mtlp-1/igt@kms_psr2_sf@pr-plane-move-sf-dmg-area.html
    - shard-snb:          NOTRUN -> [SKIP][302] ([i915#11520]) +1 other test skip
   [302]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-snb4/igt@kms_psr2_sf@pr-plane-move-sf-dmg-area.html

  * igt@kms_psr2_sf@pr-primary-plane-update-sf-dmg-area:
    - shard-dg2:          NOTRUN -> [SKIP][303] ([i915#11520]) +3 other tests skip
   [303]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg2-3/igt@kms_psr2_sf@pr-primary-plane-update-sf-dmg-area.html

  * igt@kms_psr2_sf@psr2-cursor-plane-move-continuous-exceed-sf:
    - shard-glk10:        NOTRUN -> [SKIP][304] ([i915#11520]) +5 other tests skip
   [304]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-glk10/igt@kms_psr2_sf@psr2-cursor-plane-move-continuous-exceed-sf.html

  * igt@kms_psr2_sf@psr2-cursor-plane-update-sf:
    - shard-tglu-1:       NOTRUN -> [SKIP][305] ([i915#11520])
   [305]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-1/igt@kms_psr2_sf@psr2-cursor-plane-update-sf.html

  * igt@kms_psr2_sf@psr2-plane-move-sf-dmg-area:
    - shard-rkl:          NOTRUN -> [SKIP][306] ([i915#11520]) +5 other tests skip
   [306]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-8/igt@kms_psr2_sf@psr2-plane-move-sf-dmg-area.html

  * igt@kms_psr2_su@frontbuffer-xrgb8888:
    - shard-mtlp:         NOTRUN -> [SKIP][307] ([i915#4348])
   [307]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-mtlp-6/igt@kms_psr2_su@frontbuffer-xrgb8888.html

  * igt@kms_psr@fbc-pr-sprite-plane-onoff:
    - shard-rkl:          NOTRUN -> [SKIP][308] ([i915#1072] / [i915#9732]) +14 other tests skip
   [308]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-7/igt@kms_psr@fbc-pr-sprite-plane-onoff.html

  * igt@kms_psr@fbc-psr-cursor-mmap-cpu:
    - shard-tglu-1:       NOTRUN -> [SKIP][309] ([i915#9732]) +5 other tests skip
   [309]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-1/igt@kms_psr@fbc-psr-cursor-mmap-cpu.html

  * igt@kms_psr@pr-cursor-mmap-cpu:
    - shard-dg2:          NOTRUN -> [SKIP][310] ([i915#1072] / [i915#9732]) +7 other tests skip
   [310]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg2-4/igt@kms_psr@pr-cursor-mmap-cpu.html

  * igt@kms_psr@pr-primary-mmap-cpu:
    - shard-mtlp:         NOTRUN -> [SKIP][311] ([i915#9688]) +6 other tests skip
   [311]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-mtlp-4/igt@kms_psr@pr-primary-mmap-cpu.html

  * igt@kms_psr@psr-primary-render:
    - shard-tglu:         NOTRUN -> [SKIP][312] ([i915#9732]) +20 other tests skip
   [312]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-8/igt@kms_psr@psr-primary-render.html

  * igt@kms_psr@psr2-suspend:
    - shard-dg1:          NOTRUN -> [SKIP][313] ([i915#1072] / [i915#9732]) +3 other tests skip
   [313]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg1-12/igt@kms_psr@psr2-suspend.html

  * igt@kms_rotation_crc@bad-tiling:
    - shard-mtlp:         NOTRUN -> [SKIP][314] ([i915#12755]) +1 other test skip
   [314]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-mtlp-4/igt@kms_rotation_crc@bad-tiling.html

  * igt@kms_rotation_crc@multiplane-rotation-cropping-bottom:
    - shard-glk10:        NOTRUN -> [INCOMPLETE][315] ([i915#15500])
   [315]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-glk10/igt@kms_rotation_crc@multiplane-rotation-cropping-bottom.html

  * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270:
    - shard-tglu:         NOTRUN -> [SKIP][316] ([i915#5289]) +1 other test skip
   [316]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-9/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270.html

  * igt@kms_scaling_modes@scaling-mode-center:
    - shard-tglu-1:       NOTRUN -> [SKIP][317] ([i915#3555])
   [317]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-1/igt@kms_scaling_modes@scaling-mode-center.html

  * igt@kms_scaling_modes@scaling-mode-full:
    - shard-tglu:         NOTRUN -> [SKIP][318] ([i915#3555]) +4 other tests skip
   [318]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-6/igt@kms_scaling_modes@scaling-mode-full.html

  * igt@kms_scaling_modes@scaling-mode-none:
    - shard-rkl:          NOTRUN -> [SKIP][319] ([i915#3555]) +3 other tests skip
   [319]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-8/igt@kms_scaling_modes@scaling-mode-none.html

  * igt@kms_selftest@drm_framebuffer:
    - shard-rkl:          NOTRUN -> [ABORT][320] ([i915#13179]) +1 other test abort
   [320]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-3/igt@kms_selftest@drm_framebuffer.html

  * igt@kms_tiled_display@basic-test-pattern:
    - shard-tglu-1:       NOTRUN -> [SKIP][321] ([i915#8623])
   [321]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-1/igt@kms_tiled_display@basic-test-pattern.html

  * igt@kms_vrr@flip-basic:
    - shard-dg2:          NOTRUN -> [SKIP][322] ([i915#15243] / [i915#3555])
   [322]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg2-8/igt@kms_vrr@flip-basic.html
    - shard-rkl:          NOTRUN -> [SKIP][323] ([i915#15243] / [i915#3555])
   [323]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-3/igt@kms_vrr@flip-basic.html
    - shard-mtlp:         NOTRUN -> [SKIP][324] ([i915#3555] / [i915#8808])
   [324]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-mtlp-5/igt@kms_vrr@flip-basic.html

  * igt@kms_vrr@lobf:
    - shard-tglu:         NOTRUN -> [SKIP][325] ([i915#11920])
   [325]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-9/igt@kms_vrr@lobf.html

  * igt@kms_vrr@seamless-rr-switch-vrr:
    - shard-dg2:          NOTRUN -> [SKIP][326] ([i915#9906])
   [326]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg2-8/igt@kms_vrr@seamless-rr-switch-vrr.html
    - shard-rkl:          NOTRUN -> [SKIP][327] ([i915#9906])
   [327]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-3/igt@kms_vrr@seamless-rr-switch-vrr.html
    - shard-dg1:          NOTRUN -> [SKIP][328] ([i915#9906])
   [328]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg1-18/igt@kms_vrr@seamless-rr-switch-vrr.html
    - shard-tglu:         NOTRUN -> [SKIP][329] ([i915#9906])
   [329]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-2/igt@kms_vrr@seamless-rr-switch-vrr.html
    - shard-mtlp:         NOTRUN -> [SKIP][330] ([i915#8808] / [i915#9906])
   [330]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-mtlp-5/igt@kms_vrr@seamless-rr-switch-vrr.html

  * igt@perf@gen8-unprivileged-single-ctx-counters:
    - shard-rkl:          NOTRUN -> [SKIP][331] ([i915#2436])
   [331]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-2/igt@perf@gen8-unprivileged-single-ctx-counters.html

  * igt@perf_pmu@module-unload:
    - shard-tglu-1:       NOTRUN -> [FAIL][332] ([i915#14433])
   [332]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-1/igt@perf_pmu@module-unload.html

  * igt@perf_pmu@most-busy-idle-check-all:
    - shard-dg2:          [PASS][333] -> [FAIL][334] ([i915#15520]) +1 other test fail
   [333]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-dg2-3/igt@perf_pmu@most-busy-idle-check-all.html
   [334]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg2-11/igt@perf_pmu@most-busy-idle-check-all.html

  * igt@perf_pmu@most-busy-idle-check-all@rcs0:
    - shard-mtlp:         [PASS][335] -> [FAIL][336] ([i915#15520]) +1 other test fail
   [335]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-mtlp-5/igt@perf_pmu@most-busy-idle-check-all@rcs0.html
   [336]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-mtlp-2/igt@perf_pmu@most-busy-idle-check-all@rcs0.html

  * igt@perf_pmu@rc6-all-gts:
    - shard-rkl:          NOTRUN -> [SKIP][337] ([i915#8516])
   [337]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-2/igt@perf_pmu@rc6-all-gts.html

  * igt@perf_pmu@rc6-suspend:
    - shard-rkl:          NOTRUN -> [INCOMPLETE][338] ([i915#13520])
   [338]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-3/igt@perf_pmu@rc6-suspend.html

  * igt@sriov_basic@bind-unbind-vf@vf-4:
    - shard-tglu:         NOTRUN -> [FAIL][339] ([i915#12910]) +9 other tests fail
   [339]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-3/igt@sriov_basic@bind-unbind-vf@vf-4.html

  
#### Possible fixes ####

  * igt@gem_ccs@suspend-resume:
    - shard-dg2:          [INCOMPLETE][340] ([i915#13356]) -> [PASS][341]
   [340]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-dg2-4/igt@gem_ccs@suspend-resume.html
   [341]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg2-11/igt@gem_ccs@suspend-resume.html

  * igt@gem_ccs@suspend-resume@xmajor-compressed-compfmt0-lmem0-lmem0:
    - shard-dg2:          [INCOMPLETE][342] ([i915#12392] / [i915#13356]) -> [PASS][343]
   [342]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-dg2-4/igt@gem_ccs@suspend-resume@xmajor-compressed-compfmt0-lmem0-lmem0.html
   [343]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg2-11/igt@gem_ccs@suspend-resume@xmajor-compressed-compfmt0-lmem0-lmem0.html

  * igt@gem_ctx_freq@sysfs:
    - shard-dg2:          [FAIL][344] ([i915#9561]) -> [PASS][345] +1 other test pass
   [344]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-dg2-1/igt@gem_ctx_freq@sysfs.html
   [345]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg2-7/igt@gem_ctx_freq@sysfs.html

  * igt@gem_exec_big@single:
    - shard-tglu:         [ABORT][346] ([i915#11713]) -> [PASS][347]
   [346]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-tglu-7/igt@gem_exec_big@single.html
   [347]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-10/igt@gem_exec_big@single.html

  * igt@gem_lmem_swapping@smem-oom:
    - shard-dg1:          [FAIL][348] -> [PASS][349]
   [348]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-dg1-16/igt@gem_lmem_swapping@smem-oom.html
   [349]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg1-18/igt@gem_lmem_swapping@smem-oom.html

  * igt@gem_lmem_swapping@smem-oom@lmem0:
    - shard-dg1:          [CRASH][350] ([i915#5493]) -> [PASS][351]
   [350]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-dg1-16/igt@gem_lmem_swapping@smem-oom@lmem0.html
   [351]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg1-18/igt@gem_lmem_swapping@smem-oom@lmem0.html

  * igt@i915_module_load@reload-no-display:
    - shard-dg2:          [DMESG-WARN][352] ([i915#13029] / [i915#14545]) -> [PASS][353]
   [352]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-dg2-11/igt@i915_module_load@reload-no-display.html
   [353]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg2-8/igt@i915_module_load@reload-no-display.html
    - shard-dg1:          [DMESG-WARN][354] ([i915#13029] / [i915#14545]) -> [PASS][355]
   [354]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-dg1-14/igt@i915_module_load@reload-no-display.html
   [355]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg1-18/igt@i915_module_load@reload-no-display.html

  * igt@i915_pm_freq_api@freq-suspend@gt0:
    - shard-dg2:          [INCOMPLETE][356] ([i915#13356] / [i915#13820]) -> [PASS][357] +1 other test pass
   [356]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-dg2-6/igt@i915_pm_freq_api@freq-suspend@gt0.html
   [357]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg2-1/igt@i915_pm_freq_api@freq-suspend@gt0.html

  * igt@i915_pm_rc6_residency@rc6-accuracy:
    - shard-dg2:          [FAIL][358] ([i915#12964]) -> [PASS][359] +1 other test pass
   [358]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-dg2-6/igt@i915_pm_rc6_residency@rc6-accuracy.html
   [359]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg2-5/igt@i915_pm_rc6_residency@rc6-accuracy.html

  * igt@kms_async_flips@alternate-sync-async-flip-atomic:
    - shard-dg1:          [FAIL][360] ([i915#14888]) -> [PASS][361]
   [360]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-dg1-14/igt@kms_async_flips@alternate-sync-async-flip-atomic.html
   [361]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg1-12/igt@kms_async_flips@alternate-sync-async-flip-atomic.html

  * igt@kms_async_flips@async-flip-suspend-resume:
    - shard-rkl:          [INCOMPLETE][362] ([i915#12761]) -> [PASS][363]
   [362]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-rkl-3/igt@kms_async_flips@async-flip-suspend-resume.html
   [363]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-5/igt@kms_async_flips@async-flip-suspend-resume.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip:
    - shard-mtlp:         [FAIL][364] ([i915#5138]) -> [PASS][365] +2 other tests pass
   [364]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-mtlp-5/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip.html
   [365]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-mtlp-6/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip.html

  * igt@kms_cursor_crc@cursor-random-128x42@pipe-a-hdmi-a-1:
    - shard-rkl:          [FAIL][366] ([i915#13566]) -> [PASS][367] +3 other tests pass
   [366]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-rkl-8/igt@kms_cursor_crc@cursor-random-128x42@pipe-a-hdmi-a-1.html
   [367]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-5/igt@kms_cursor_crc@cursor-random-128x42@pipe-a-hdmi-a-1.html

  * igt@kms_cursor_crc@cursor-random-64x21:
    - shard-tglu:         [FAIL][368] ([i915#13566]) -> [PASS][369] +1 other test pass
   [368]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-tglu-9/igt@kms_cursor_crc@cursor-random-64x21.html
   [369]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-8/igt@kms_cursor_crc@cursor-random-64x21.html

  * igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions-varying-size:
    - shard-rkl:          [FAIL][370] ([i915#15564]) -> [PASS][371]
   [370]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-rkl-4/igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions-varying-size.html
   [371]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-4/igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions-varying-size.html

  * igt@kms_fbcon_fbt@fbc-suspend:
    - shard-rkl:          [INCOMPLETE][372] ([i915#9878]) -> [PASS][373]
   [372]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-rkl-4/igt@kms_fbcon_fbt@fbc-suspend.html
   [373]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-2/igt@kms_fbcon_fbt@fbc-suspend.html

  * igt@kms_flip@modeset-vs-vblank-race@b-hdmi-a1:
    - shard-tglu:         [FAIL][374] ([i915#10826]) -> [PASS][375] +1 other test pass
   [374]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-tglu-8/igt@kms_flip@modeset-vs-vblank-race@b-hdmi-a1.html
   [375]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-6/igt@kms_flip@modeset-vs-vblank-race@b-hdmi-a1.html

  * igt@kms_frontbuffer_tracking@fbc-rgb565-draw-mmap-cpu:
    - shard-dg2:          [FAIL][376] ([i915#15389] / [i915#6880]) -> [PASS][377]
   [376]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-dg2-3/igt@kms_frontbuffer_tracking@fbc-rgb565-draw-mmap-cpu.html
   [377]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg2-1/igt@kms_frontbuffer_tracking@fbc-rgb565-draw-mmap-cpu.html

  * igt@kms_joiner@basic-force-big-joiner:
    - shard-dg2:          [SKIP][378] ([i915#15459]) -> [PASS][379]
   [378]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-dg2-5/igt@kms_joiner@basic-force-big-joiner.html
   [379]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg2-11/igt@kms_joiner@basic-force-big-joiner.html

  * igt@kms_pm_rpm@dpms-lpsp:
    - shard-rkl:          [SKIP][380] ([i915#15073]) -> [PASS][381]
   [380]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-rkl-3/igt@kms_pm_rpm@dpms-lpsp.html
   [381]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-2/igt@kms_pm_rpm@dpms-lpsp.html

  * igt@kms_pm_rpm@dpms-non-lpsp:
    - shard-dg1:          [SKIP][382] ([i915#15073]) -> [PASS][383]
   [382]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-dg1-14/igt@kms_pm_rpm@dpms-non-lpsp.html
   [383]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg1-17/igt@kms_pm_rpm@dpms-non-lpsp.html

  * igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait:
    - shard-dg2:          [SKIP][384] ([i915#15073]) -> [PASS][385]
   [384]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-dg2-4/igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait.html
   [385]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg2-11/igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait.html

  * igt@kms_pm_rpm@system-suspend-idle:
    - shard-dg1:          [DMESG-WARN][386] ([i915#4423]) -> [PASS][387]
   [386]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-dg1-16/igt@kms_pm_rpm@system-suspend-idle.html
   [387]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg1-15/igt@kms_pm_rpm@system-suspend-idle.html

  * igt@kms_setmode@basic:
    - shard-snb:          [FAIL][388] ([i915#15106]) -> [PASS][389] +2 other tests pass
   [388]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-snb7/igt@kms_setmode@basic.html
   [389]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-snb4/igt@kms_setmode@basic.html

  * igt@perf@polling@0-rcs0:
    - shard-tglu:         [FAIL][390] ([i915#10538]) -> [PASS][391] +1 other test pass
   [390]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-tglu-10/igt@perf@polling@0-rcs0.html
   [391]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-tglu-7/igt@perf@polling@0-rcs0.html

  
#### Warnings ####

  * igt@api_intel_bb@object-reloc-purge-cache:
    - shard-rkl:          [SKIP][392] ([i915#14544] / [i915#8411]) -> [SKIP][393] ([i915#8411])
   [392]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-rkl-6/igt@api_intel_bb@object-reloc-purge-cache.html
   [393]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-3/igt@api_intel_bb@object-reloc-purge-cache.html

  * igt@gem_close_race@multigpu-basic-process:
    - shard-rkl:          [SKIP][394] ([i915#14544] / [i915#7697]) -> [SKIP][395] ([i915#7697])
   [394]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-rkl-6/igt@gem_close_race@multigpu-basic-process.html
   [395]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-2/igt@gem_close_race@multigpu-basic-process.html

  * igt@gem_exec_balancer@parallel-balancer:
    - shard-rkl:          [SKIP][396] ([i915#4525]) -> [SKIP][397] ([i915#14544] / [i915#4525])
   [396]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-rkl-8/igt@gem_exec_balancer@parallel-balancer.html
   [397]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-6/igt@gem_exec_balancer@parallel-balancer.html

  * igt@gem_exec_reloc@basic-gtt-wc-noreloc:
    - shard-rkl:          [SKIP][398] ([i915#3281]) -> [SKIP][399] ([i915#14544] / [i915#3281]) +1 other test skip
   [398]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-rkl-2/igt@gem_exec_reloc@basic-gtt-wc-noreloc.html
   [399]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-6/igt@gem_exec_reloc@basic-gtt-wc-noreloc.html

  * igt@gem_exec_reloc@basic-scanout:
    - shard-rkl:          [SKIP][400] ([i915#14544] / [i915#3281]) -> [SKIP][401] ([i915#3281]) +3 other tests skip
   [400]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-rkl-6/igt@gem_exec_reloc@basic-scanout.html
   [401]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-8/igt@gem_exec_reloc@basic-scanout.html

  * igt@gem_huc_copy@huc-copy:
    - shard-rkl:          [SKIP][402] ([i915#14544] / [i915#2190]) -> [SKIP][403] ([i915#2190])
   [402]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-rkl-6/igt@gem_huc_copy@huc-copy.html
   [403]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-8/igt@gem_huc_copy@huc-copy.html

  * igt@gem_pxp@hw-rejects-pxp-context:
    - shard-rkl:          [FAIL][404] ([i915#15169]) -> [SKIP][405] ([i915#13717])
   [404]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-rkl-8/igt@gem_pxp@hw-rejects-pxp-context.html
   [405]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-8/igt@gem_pxp@hw-rejects-pxp-context.html

  * igt@gem_userptr_blits@create-destroy-unsync:
    - shard-rkl:          [SKIP][406] ([i915#14544] / [i915#3297]) -> [SKIP][407] ([i915#3297])
   [406]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-rkl-6/igt@gem_userptr_blits@create-destroy-unsync.html
   [407]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-5/igt@gem_userptr_blits@create-destroy-unsync.html

  * igt@gen3_render_tiledy_blits:
    - shard-rkl:          [SKIP][408] -> [SKIP][409] ([i915#14544])
   [408]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-rkl-7/igt@gen3_render_tiledy_blits.html
   [409]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-6/igt@gen3_render_tiledy_blits.html

  * igt@i915_module_load@resize-bar:
    - shard-rkl:          [SKIP][410] ([i915#6412]) -> [SKIP][411] ([i915#14544] / [i915#6412])
   [410]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-rkl-3/igt@i915_module_load@resize-bar.html
   [411]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-6/igt@i915_module_load@resize-bar.html

  * igt@i915_pm_rc6_residency@media-rc6-accuracy:
    - shard-rkl:          [SKIP][412] ([i915#14544]) -> [SKIP][413] +10 other tests skip
   [412]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-rkl-6/igt@i915_pm_rc6_residency@media-rc6-accuracy.html
   [413]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-3/igt@i915_pm_rc6_residency@media-rc6-accuracy.html

  * igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels:
    - shard-rkl:          [SKIP][414] ([i915#1769] / [i915#3555]) -> [SKIP][415] ([i915#14544] / [i915#1769] / [i915#3555])
   [414]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-rkl-2/igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels.html
   [415]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-6/igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels.html

  * igt@kms_big_fb@4-tiled-64bpp-rotate-90:
    - shard-rkl:          [SKIP][416] ([i915#14544] / [i915#5286]) -> [SKIP][417] ([i915#5286])
   [416]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-rkl-6/igt@kms_big_fb@4-tiled-64bpp-rotate-90.html
   [417]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-8/igt@kms_big_fb@4-tiled-64bpp-rotate-90.html

  * igt@kms_big_fb@linear-8bpp-rotate-90:
    - shard-rkl:          [SKIP][418] ([i915#14544] / [i915#3638]) -> [SKIP][419] ([i915#3638]) +1 other test skip
   [418]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-rkl-6/igt@kms_big_fb@linear-8bpp-rotate-90.html
   [419]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-8/igt@kms_big_fb@linear-8bpp-rotate-90.html

  * igt@kms_big_fb@x-tiled-32bpp-rotate-270:
    - shard-dg1:          [SKIP][420] ([i915#3638]) -> [SKIP][421] ([i915#3638] / [i915#4423])
   [420]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-dg1-15/igt@kms_big_fb@x-tiled-32bpp-rotate-270.html
   [421]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg1-17/igt@kms_big_fb@x-tiled-32bpp-rotate-270.html

  * igt@kms_ccs@bad-aux-stride-4-tiled-mtl-mc-ccs@pipe-a-hdmi-a-2:
    - shard-rkl:          [SKIP][422] ([i915#14544] / [i915#6095]) -> [SKIP][423] ([i915#6095]) +4 other tests skip
   [422]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-rkl-6/igt@kms_ccs@bad-aux-stride-4-tiled-mtl-mc-ccs@pipe-a-hdmi-a-2.html
   [423]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-7/igt@kms_ccs@bad-aux-stride-4-tiled-mtl-mc-ccs@pipe-a-hdmi-a-2.html

  * igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-mc-ccs:
    - shard-rkl:          [SKIP][424] ([i915#14098] / [i915#14544] / [i915#6095]) -> [SKIP][425] ([i915#14098] / [i915#6095]) +6 other tests skip
   [424]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-rkl-6/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-mc-ccs.html
   [425]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-4/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-mc-ccs.html

  * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-mc-ccs:
    - shard-rkl:          [SKIP][426] ([i915#14098] / [i915#6095]) -> [SKIP][427] ([i915#14098] / [i915#14544] / [i915#6095])
   [426]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-rkl-5/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-mc-ccs.html
   [427]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-6/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-mc-ccs.html

  * igt@kms_chamelium_hpd@dp-hpd:
    - shard-rkl:          [SKIP][428] ([i915#11151] / [i915#14544] / [i915#7828]) -> [SKIP][429] ([i915#11151] / [i915#7828]) +1 other test skip
   [428]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-rkl-6/igt@kms_chamelium_hpd@dp-hpd.html
   [429]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-5/igt@kms_chamelium_hpd@dp-hpd.html

  * igt@kms_content_protection@atomic-hdcp14:
    - shard-rkl:          [SKIP][430] ([i915#14544] / [i915#6944]) -> [SKIP][431] ([i915#6944])
   [430]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-rkl-6/igt@kms_content_protection@atomic-hdcp14.html
   [431]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-3/igt@kms_content_protection@atomic-hdcp14.html

  * igt@kms_content_protection@dp-mst-lic-type-1:
    - shard-rkl:          [SKIP][432] ([i915#14544] / [i915#15330] / [i915#3116]) -> [SKIP][433] ([i915#15330] / [i915#3116])
   [432]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-rkl-6/igt@kms_content_protection@dp-mst-lic-type-1.html
   [433]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-4/igt@kms_content_protection@dp-mst-lic-type-1.html

  * igt@kms_content_protection@legacy:
    - shard-dg2:          [FAIL][434] ([i915#7173]) -> [SKIP][435] ([i915#6944] / [i915#7118] / [i915#9424])
   [434]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-dg2-11/igt@kms_content_protection@legacy.html
   [435]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg2-7/igt@kms_content_protection@legacy.html
    - shard-rkl:          [SKIP][436] ([i915#14544] / [i915#6944] / [i915#7118] / [i915#9424]) -> [SKIP][437] ([i915#6944] / [i915#7118] / [i915#9424])
   [436]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-rkl-6/igt@kms_content_protection@legacy.html
   [437]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-2/igt@kms_content_protection@legacy.html

  * igt@kms_content_protection@lic-type-0-hdcp14:
    - shard-dg2:          [SKIP][438] ([i915#6944]) -> [FAIL][439] ([i915#7173])
   [438]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-dg2-3/igt@kms_content_protection@lic-type-0-hdcp14.html
   [439]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg2-11/igt@kms_content_protection@lic-type-0-hdcp14.html

  * igt@kms_content_protection@lic-type-1:
    - shard-rkl:          [SKIP][440] ([i915#14544] / [i915#6944] / [i915#9424]) -> [SKIP][441] ([i915#6944] / [i915#9424])
   [440]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-rkl-6/igt@kms_content_protection@lic-type-1.html
   [441]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-5/igt@kms_content_protection@lic-type-1.html

  * igt@kms_content_protection@mei-interface:
    - shard-dg1:          [SKIP][442] ([i915#6944] / [i915#9424]) -> [SKIP][443] ([i915#9433])
   [442]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-dg1-18/igt@kms_content_protection@mei-interface.html
   [443]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg1-12/igt@kms_content_protection@mei-interface.html

  * igt@kms_content_protection@suspend-resume:
    - shard-dg2:          [FAIL][444] ([i915#7173]) -> [SKIP][445] ([i915#6944])
   [444]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-dg2-11/igt@kms_content_protection@suspend-resume.html
   [445]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg2-3/igt@kms_content_protection@suspend-resume.html

  * igt@kms_cursor_crc@cursor-onscreen-512x170:
    - shard-rkl:          [SKIP][446] ([i915#13049] / [i915#14544]) -> [SKIP][447] ([i915#13049])
   [446]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-rkl-6/igt@kms_cursor_crc@cursor-onscreen-512x170.html
   [447]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-8/igt@kms_cursor_crc@cursor-onscreen-512x170.html

  * igt@kms_cursor_crc@cursor-rapid-movement-32x32:
    - shard-dg1:          [SKIP][448] ([i915#3555] / [i915#4423]) -> [SKIP][449] ([i915#3555])
   [448]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-dg1-17/igt@kms_cursor_crc@cursor-rapid-movement-32x32.html
   [449]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg1-17/igt@kms_cursor_crc@cursor-rapid-movement-32x32.html

  * igt@kms_cursor_crc@cursor-sliding-32x10:
    - shard-rkl:          [SKIP][450] ([i915#14544] / [i915#3555]) -> [SKIP][451] ([i915#3555])
   [450]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-rkl-6/igt@kms_cursor_crc@cursor-sliding-32x10.html
   [451]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-5/igt@kms_cursor_crc@cursor-sliding-32x10.html

  * igt@kms_dsc@dsc-with-bpc-formats:
    - shard-rkl:          [SKIP][452] ([i915#14544] / [i915#3555] / [i915#3840]) -> [SKIP][453] ([i915#3555] / [i915#3840])
   [452]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-rkl-6/igt@kms_dsc@dsc-with-bpc-formats.html
   [453]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-2/igt@kms_dsc@dsc-with-bpc-formats.html

  * igt@kms_flip@2x-flip-vs-panning-interruptible:
    - shard-rkl:          [SKIP][454] ([i915#14544] / [i915#9934]) -> [SKIP][455] ([i915#9934]) +1 other test skip
   [454]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-rkl-6/igt@kms_flip@2x-flip-vs-panning-interruptible.html
   [455]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-5/igt@kms_flip@2x-flip-vs-panning-interruptible.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling:
    - shard-rkl:          [SKIP][456] ([i915#14544] / [i915#15643]) -> [SKIP][457] ([i915#15643]) +1 other test skip
   [456]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-rkl-6/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling.html
   [457]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-5/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling.html

  * igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-indfb-draw-mmap-gtt:
    - shard-dg1:          [SKIP][458] ([i915#15104]) -> [SKIP][459] ([i915#15104] / [i915#4423])
   [458]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-dg1-15/igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-indfb-draw-mmap-gtt.html
   [459]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg1-16/igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-indfb-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-render:
    - shard-rkl:          [SKIP][460] ([i915#14544] / [i915#1825]) -> [SKIP][461] ([i915#1825]) +11 other tests skip
   [460]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-rkl-6/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-render.html
   [461]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-3/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-pwrite:
    - shard-rkl:          [SKIP][462] ([i915#15102] / [i915#3023]) -> [SKIP][463] ([i915#14544] / [i915#15102] / [i915#3023]) +1 other test skip
   [462]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-rkl-5/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-pwrite.html
   [463]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-6/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-pwrite.html

  * igt@kms_frontbuffer_tracking@fbcpsr-tiling-4:
    - shard-dg2:          [SKIP][464] ([i915#10433] / [i915#15102] / [i915#3458]) -> [SKIP][465] ([i915#15102] / [i915#3458]) +1 other test skip
   [464]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-dg2-4/igt@kms_frontbuffer_tracking@fbcpsr-tiling-4.html
   [465]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg2-8/igt@kms_frontbuffer_tracking@fbcpsr-tiling-4.html
    - shard-rkl:          [SKIP][466] ([i915#14544] / [i915#5439]) -> [SKIP][467] ([i915#5439])
   [466]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-rkl-6/igt@kms_frontbuffer_tracking@fbcpsr-tiling-4.html
   [467]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-3/igt@kms_frontbuffer_tracking@fbcpsr-tiling-4.html

  * igt@kms_frontbuffer_tracking@psr-1p-offscreen-pri-indfb-draw-blt:
    - shard-rkl:          [SKIP][468] ([i915#14544] / [i915#15102]) -> [SKIP][469] ([i915#15102]) +1 other test skip
   [468]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-rkl-6/igt@kms_frontbuffer_tracking@psr-1p-offscreen-pri-indfb-draw-blt.html
   [469]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-3/igt@kms_frontbuffer_tracking@psr-1p-offscreen-pri-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-mmap-cpu:
    - shard-dg2:          [SKIP][470] ([i915#15102] / [i915#3458]) -> [SKIP][471] ([i915#10433] / [i915#15102] / [i915#3458])
   [470]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-dg2-11/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-mmap-cpu.html
   [471]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg2-4/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-mmap-cpu.html

  * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-spr-indfb-draw-mmap-cpu:
    - shard-rkl:          [SKIP][472] ([i915#1825]) -> [SKIP][473] ([i915#14544] / [i915#1825]) +1 other test skip
   [472]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-rkl-3/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-spr-indfb-draw-mmap-cpu.html
   [473]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-6/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-spr-indfb-draw-mmap-cpu.html

  * igt@kms_frontbuffer_tracking@psr-indfb-scaledprimary:
    - shard-rkl:          [SKIP][474] ([i915#14544] / [i915#15102] / [i915#3023]) -> [SKIP][475] ([i915#15102] / [i915#3023]) +4 other tests skip
   [474]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-rkl-6/igt@kms_frontbuffer_tracking@psr-indfb-scaledprimary.html
   [475]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-4/igt@kms_frontbuffer_tracking@psr-indfb-scaledprimary.html

  * igt@kms_hdr@brightness-with-hdr:
    - shard-dg2:          [SKIP][476] ([i915#13331]) -> [SKIP][477] ([i915#12713])
   [476]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-dg2-11/igt@kms_hdr@brightness-with-hdr.html
   [477]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg2-8/igt@kms_hdr@brightness-with-hdr.html
    - shard-dg1:          [SKIP][478] ([i915#1187] / [i915#12713]) -> [SKIP][479] ([i915#12713])
   [478]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-dg1-13/igt@kms_hdr@brightness-with-hdr.html
   [479]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg1-17/igt@kms_hdr@brightness-with-hdr.html

  * igt@kms_joiner@basic-force-big-joiner:
    - shard-rkl:          [SKIP][480] ([i915#14544] / [i915#15459]) -> [SKIP][481] ([i915#15459])
   [480]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-rkl-6/igt@kms_joiner@basic-force-big-joiner.html
   [481]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-4/igt@kms_joiner@basic-force-big-joiner.html

  * igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner:
    - shard-rkl:          [SKIP][482] ([i915#14544] / [i915#15638]) -> [SKIP][483] ([i915#15638])
   [482]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-rkl-6/igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner.html
   [483]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-8/igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner.html

  * igt@kms_plane@pixel-format-4-tiled-bmg-ccs-modifier:
    - shard-rkl:          [SKIP][484] ([i915#14544] / [i915#8825]) -> [SKIP][485] ([i915#8825]) +1 other test skip
   [484]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-rkl-6/igt@kms_plane@pixel-format-4-tiled-bmg-ccs-modifier.html
   [485]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-4/igt@kms_plane@pixel-format-4-tiled-bmg-ccs-modifier.html

  * igt@kms_pm_lpsp@kms-lpsp:
    - shard-rkl:          [SKIP][486] ([i915#14544] / [i915#9340]) -> [SKIP][487] ([i915#3828])
   [486]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-rkl-6/igt@kms_pm_lpsp@kms-lpsp.html
   [487]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-5/igt@kms_pm_lpsp@kms-lpsp.html
    - shard-dg1:          [SKIP][488] ([i915#9340]) -> [SKIP][489] ([i915#3828])
   [488]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-dg1-18/igt@kms_pm_lpsp@kms-lpsp.html
   [489]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-dg1-15/igt@kms_pm_lpsp@kms-lpsp.html

  * igt@kms_pm_rpm@system-suspend-modeset:
    - shard-rkl:          [INCOMPLETE][490] ([i915#14419]) -> [ABORT][491] ([i915#15132])
   [490]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-rkl-3/igt@kms_pm_rpm@system-suspend-modeset.html
   [491]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-1/igt@kms_pm_rpm@system-suspend-modeset.html

  * igt@kms_psr2_sf@fbc-pr-primary-plane-update-sf-dmg-area:
    - shard-rkl:          [SKIP][492] ([i915#11520]) -> [SKIP][493] ([i915#11520] / [i915#14544])
   [492]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-rkl-2/igt@kms_psr2_sf@fbc-pr-primary-plane-update-sf-dmg-area.html
   [493]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-6/igt@kms_psr2_sf@fbc-pr-primary-plane-update-sf-dmg-area.html

  * igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-sf:
    - shard-rkl:          [SKIP][494] ([i915#11520] / [i915#14544]) -> [SKIP][495] ([i915#11520]) +3 other tests skip
   [494]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-rkl-6/igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-sf.html
   [495]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-5/igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-sf.html

  * igt@kms_psr2_su@frontbuffer-xrgb8888:
    - shard-rkl:          [SKIP][496] ([i915#14544] / [i915#9683]) -> [SKIP][497] ([i915#9683])
   [496]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-rkl-6/igt@kms_psr2_su@frontbuffer-xrgb8888.html
   [497]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-5/igt@kms_psr2_su@frontbuffer-xrgb8888.html

  * igt@kms_psr@psr-primary-mmap-cpu:
    - shard-rkl:          [SKIP][498] ([i915#1072] / [i915#14544] / [i915#9732]) -> [SKIP][499] ([i915#1072] / [i915#9732]) +2 other tests skip
   [498]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-rkl-6/igt@kms_psr@psr-primary-mmap-cpu.html
   [499]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-7/igt@kms_psr@psr-primary-mmap-cpu.html

  * igt@kms_psr@psr-sprite-plane-onoff:
    - shard-rkl:          [SKIP][500] ([i915#1072] / [i915#9732]) -> [SKIP][501] ([i915#1072] / [i915#14544] / [i915#9732]) +1 other test skip
   [500]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-rkl-2/igt@kms_psr@psr-sprite-plane-onoff.html
   [501]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-6/igt@kms_psr@psr-sprite-plane-onoff.html

  * igt@kms_setmode@invalid-clone-exclusive-crtc:
    - shard-rkl:          [SKIP][502] ([i915#3555]) -> [SKIP][503] ([i915#14544] / [i915#3555])
   [502]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-rkl-3/igt@kms_setmode@invalid-clone-exclusive-crtc.html
   [503]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-6/igt@kms_setmode@invalid-clone-exclusive-crtc.html

  * igt@kms_vrr@flipline:
    - shard-rkl:          [SKIP][504] ([i915#15243] / [i915#3555]) -> [SKIP][505] ([i915#14544] / [i915#15243] / [i915#3555])
   [504]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-rkl-4/igt@kms_vrr@flipline.html
   [505]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-6/igt@kms_vrr@flipline.html

  * igt@kms_vrr@negative-basic:
    - shard-rkl:          [SKIP][506] ([i915#14544] / [i915#3555] / [i915#9906]) -> [SKIP][507] ([i915#3555] / [i915#9906])
   [506]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-rkl-6/igt@kms_vrr@negative-basic.html
   [507]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-8/igt@kms_vrr@negative-basic.html

  * igt@perf@unprivileged-single-ctx-counters:
    - shard-rkl:          [SKIP][508] ([i915#2433]) -> [SKIP][509] ([i915#14544] / [i915#2433])
   [508]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-rkl-5/igt@perf@unprivileged-single-ctx-counters.html
   [509]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-6/igt@perf@unprivileged-single-ctx-counters.html

  * igt@prime_vgem@basic-fence-read:
    - shard-rkl:          [SKIP][510] ([i915#14544] / [i915#3291] / [i915#3708]) -> [SKIP][511] ([i915#3291] / [i915#3708])
   [510]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-rkl-6/igt@prime_vgem@basic-fence-read.html
   [511]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-2/igt@prime_vgem@basic-fence-read.html

  * igt@sriov_basic@bind-unbind-vf:
    - shard-rkl:          [SKIP][512] ([i915#14544] / [i915#9917]) -> [SKIP][513] ([i915#9917]) +1 other test skip
   [512]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17995/shard-rkl-6/igt@sriov_basic@bind-unbind-vf.html
   [513]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/shard-rkl-7/igt@sriov_basic@bind-unbind-vf.html

  
  [i915#10307]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10307
  [i915#10433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10433
  [i915#10434]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10434
  [i915#10538]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10538
  [i915#10553]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10553
  [i915#1072]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1072
  [i915#10826]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10826
  [i915#11151]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11151
  [i915#11520]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11520
  [i915#11681]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11681
  [i915#11713]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11713
  [i915#1187]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1187
  [i915#11920]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11920
  [i915#12061]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061
  [i915#12178]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12178
  [i915#12193]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12193
  [i915#12313]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12313
  [i915#12316]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12316
  [i915#12343]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12343
  [i915#12392]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12392
  [i915#12713]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12713
  [i915#12745]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12745
  [i915#12755]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12755
  [i915#12756]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12756
  [i915#12761]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12761
  [i915#12805]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12805
  [i915#12910]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12910
  [i915#12964]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12964
  [i915#13029]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13029
  [i915#13046]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13046
  [i915#13049]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13049
  [i915#13179]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13179
  [i915#13331]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13331
  [i915#13356]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13356
  [i915#13476]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13476
  [i915#13520]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13520
  [i915#13566]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13566
  [i915#13691]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13691
  [i915#13707]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13707
  [i915#13717]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13717
  [i915#13748]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13748
  [i915#13749]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13749
  [i915#13783]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13783
  [i915#13784]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13784
  [i915#13790]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13790
  [i915#13809]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13809
  [i915#13820]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13820
  [i915#13821]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13821
  [i915#13958]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13958
  [i915#14033]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14033
  [i915#14098]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14098
  [i915#14123]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14123
  [i915#14259]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14259
  [i915#14350]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14350
  [i915#14419]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14419
  [i915#14433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14433
  [i915#14544]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14544
  [i915#14545]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14545
  [i915#14702]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14702
  [i915#14888]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14888
  [i915#15073]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15073
  [i915#15102]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15102
  [i915#15104]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15104
  [i915#15106]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15106
  [i915#15132]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15132
  [i915#15169]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15169
  [i915#15243]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15243
  [i915#15329]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15329
  [i915#15330]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15330
  [i915#15342]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15342
  [i915#15389]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15389
  [i915#15458]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15458
  [i915#15459]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15459
  [i915#15460]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15460
  [i915#15500]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15500
  [i915#15520]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15520
  [i915#15522]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15522
  [i915#15560]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15560
  [i915#15564]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15564
  [i915#15588]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15588
  [i915#15608]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15608
  [i915#15638]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15638
  [i915#15643]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15643
  [i915#15662]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15662
  [i915#15678]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15678
  [i915#1769]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1769
  [i915#1825]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1825
  [i915#1839]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1839
  [i915#2190]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2190
  [i915#2346]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2346
  [i915#2433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2433
  [i915#2436]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2436
  [i915#2527]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2527
  [i915#2658]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2658
  [i915#2681]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2681
  [i915#280]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/280
  [i915#2856]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2856
  [i915#3023]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3023
  [i915#3116]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3116
  [i915#3281]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3281
  [i915#3282]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3282
  [i915#3291]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3291
  [i915#3297]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3297
  [i915#3299]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3299
  [i915#3323]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3323
  [i915#3458]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3458
  [i915#3539]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3539
  [i915#3555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3555
  [i915#3637]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3637
  [i915#3638]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3638
  [i915#3708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3708
  [i915#3742]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3742
  [i915#3828]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3828
  [i915#3840]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3840
  [i915#3955]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3955
  [i915#4077]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4077
  [i915#4083]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4083
  [i915#4103]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4103
  [i915#4212]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4212
  [i915#4270]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4270
  [i915#4281]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4281
  [i915#4348]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4348
  [i915#4391]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4391
  [i915#4423]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4423
  [i915#4525]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4525
  [i915#4538]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4538
  [i915#4565]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4565
  [i915#4613]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4613
  [i915#4771]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4771
  [i915#4812]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4812
  [i915#4817]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4817
  [i915#4839]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4839
  [i915#4852]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4852
  [i915#4860]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4860
  [i915#4880]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4880
  [i915#5138]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5138
  [i915#5190]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5190
  [i915#5286]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5286
  [i915#5289]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5289
  [i915#5354]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5354
  [i915#5439]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5439
  [i915#5493]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5493
  [i915#5956]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5956
  [i915#6095]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6095
  [i915#6188]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6188
  [i915#6301]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6301
  [i915#6335]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6335
  [i915#6412]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6412
  [i915#6524]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6524
  [i915#658]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/658
  [i915#6805]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6805
  [i915#6880]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6880
  [i915#6944]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6944
  [i915#7116]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7116
  [i915#7118]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7118
  [i915#7173]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7173
  [i915#7276]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7276
  [i915#7443]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7443
  [i915#7582]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7582
  [i915#7697]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7697
  [i915#7828]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7828
  [i915#7862]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7862
  [i915#8228]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8228
  [i915#8399]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8399
  [i915#8411]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8411
  [i915#8428]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8428
  [i915#8430]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8430
  [i915#8516]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8516
  [i915#8623]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8623
  [i915#8708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8708
  [i915#8808]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8808
  [i915#8814]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8814
  [i915#8825]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8825
  [i915#9053]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9053
  [i915#9067]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9067
  [i915#9159]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9159
  [i915#9295]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9295
  [i915#9323]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9323
  [i915#9340]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9340
  [i915#9424]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9424
  [i915#9433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9433
  [i915#9561]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9561
  [i915#9683]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9683
  [i915#9685]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9685
  [i915#9688]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9688
  [i915#9723]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9723
  [i915#9732]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9732
  [i915#9766]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9766
  [i915#9808]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9808
  [i915#9809]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9809
  [i915#9833]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9833
  [i915#9878]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9878
  [i915#9906]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9906
  [i915#9917]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9917
  [i915#9934]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9934


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_8754 -> IGTPW_14560
  * Piglit: piglit_4509 -> None

  CI-20190529: 20190529
  CI_DRM_17995: d8a2676d71fe28909d78ed9707ca9c6871ff1e14 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_14560: 14560
  IGT_8754: 8754
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14560/index.html

[-- Attachment #2: Type: text/html, Size: 171387 bytes --]

Re: [PATCH i-g-t v3 1/8] drm-uapi/xe_drm: Add UAPI support for purgeable buffer objects

[Kamil Konieczny]

Hi Arvind,
On 2026-02-17 at 08:04:12 +0530, Arvind Yadav wrote:
> From: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
> 
> Extend the DRM_XE_MADVISE ioctl to support purgeable buffer object
> management by adding DRM_XE_VMA_ATTR_PURGEABLE_STATE attribute type.
> 
> This allows userspace applications to provide memory usage hints to
> the kernel for better memory management under pressure:
> 
> This allows userspace applications to provide memory usage hints to
> the kernel for better memory management under pressure:
> 
> - WILLNEED: Buffer is needed and should not be purged. If the BO was
>   previously purged, retained field returns 0 indicating backing store
>   was lost (once purged, always purged semantics matching i915).
> 
> - DONTNEED: Buffer is not currently needed and may be purged by the
>   kernel under memory pressure to free resources. Only applies to
>   non-shared BOs.
> 
> The implementation includes a 'retained' output field (matching i915's
> drm_i915_gem_madvise.retained) that indicates whether the BO's backing
> store still exists (1) or has been purged (0).
> 
> v2:
>   - Update UAPI documentation to clarify retained must be initialized
>     to 0(Thomas)

This should be a sync with a kernel commit from drm-next,
see git log.

Regards,
Kamil

> 
> Cc: Nishit Sharma <nishit.sharma@intel.com>
> Cc: Pravalika Gurram <pravalika.gurram@intel.com>
> Cc: Matthew Brost <matthew.brost@intel.com>
> Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
> Signed-off-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
> Signed-off-by: Arvind Yadav <arvind.yadav@intel.com>
> ---
>  include/drm-uapi/xe_drm.h | 44 +++++++++++++++++++++++++++++++++++++++
>  1 file changed, 44 insertions(+)
> 
> diff --git a/include/drm-uapi/xe_drm.h b/include/drm-uapi/xe_drm.h
> index 077e66a68..3dd1ba875 100644
> --- a/include/drm-uapi/xe_drm.h
> +++ b/include/drm-uapi/xe_drm.h
> @@ -2099,6 +2099,7 @@ struct drm_xe_madvise {
>  #define DRM_XE_MEM_RANGE_ATTR_PREFERRED_LOC	0
>  #define DRM_XE_MEM_RANGE_ATTR_ATOMIC		1
>  #define DRM_XE_MEM_RANGE_ATTR_PAT		2
> +#define DRM_XE_VMA_ATTR_PURGEABLE_STATE		3
>  	/** @type: type of attribute */
>  	__u32 type;
>  
> @@ -2189,6 +2190,49 @@ struct drm_xe_madvise {
>  			/** @pat_index.reserved: Reserved */
>  			__u64 reserved;
>  		} pat_index;
> +
> +		/**
> +		 * @purge_state_val: Purgeable state configuration
> +		 *
> +		 * Used when @type == DRM_XE_VMA_ATTR_PURGEABLE_STATE.
> +		 *
> +		 * Configures the purgeable state of buffer objects in the specified
> +		 * virtual address range. This allows applications to hint to the kernel
> +		 * about bo's usage patterns for better memory management.
> +		 *
> +		 * Supported values for @purge_state_val.val:
> +		 *  - DRM_XE_VMA_PURGEABLE_STATE_WILLNEED (0): Marks BO as needed.
> +		 *    If BO was purged, returns retained=0 (backing store lost).
> +		 *
> +		 *  - DRM_XE_VMA_PURGEABLE_STATE_DONTNEED (1): Hints that BO is not
> +		 *    currently needed. Kernel may purge it under memory pressure.
> +		 *    Only applies to non-shared BOs. Returns retained=1 if not purged.
> +		 */
> +		struct {
> +#define DRM_XE_VMA_PURGEABLE_STATE_WILLNEED	0
> +#define DRM_XE_VMA_PURGEABLE_STATE_DONTNEED	1
> +			/** @purge_state_val.val: value for DRM_XE_VMA_ATTR_PURGEABLE_STATE */
> +			__u32 val;
> +
> +			/* @purge_state_val.pad */
> +			__u32 pad;
> +			/**
> +			 * @purge_state_val.retained: Pointer to output field for backing
> +			 * store status.
> +			 *
> +			 * Userspace must initialize this u32 field to 0 before the
> +			 * ioctl. Kernel writes to it after the operation:
> +			 * - 1 if backing store exists (not purged)
> +			 * - 0 if backing store was purged
> +			 *
> +			 * If userspace fails to initialize to 0, ioctl returns -EINVAL.
> +			 * This ensures a safe default (0 = assume purged) if kernel
> +			 * cannot write the result.
> +			 *
> +			 * Similar to i915's drm_i915_gem_madvise.retained field.
> +			 */
> +			__u64 retained;
> +		} purge_state_val;
>  	};
>  
>  	/** @reserved: Reserved */
> -- 
> 2.43.0
> 

RE: [PATCH i-g-t v3 3/8] tests/intel/xe_madvise: Add dontneed-before-mmap subtest

[Gurram, Pravalika]

> -----Original Message-----
> From: Yadav, Arvind <arvind.yadav@intel.com>
> Sent: Tuesday, 17 February, 2026 08:04 AM
> To: igt-dev@lists.freedesktop.org
> Cc: Brost, Matthew <matthew.brost@intel.com>; Ghimiray, Himal Prasad
> <himal.prasad.ghimiray@intel.com>; thomas.hellstrom@linux.intel.com;
> Sharma, Nishit <nishit.sharma@intel.com>; Gurram, Pravalika
> <pravalika.gurram@intel.com>
> Subject: [PATCH i-g-t v3 3/8] tests/intel/xe_madvise: Add dontneed-before-
> mmap subtest
> 
> This test validates kernel behavior when mapping a BO that was already
> marked as purgeable and purged before mmap. After purging the BO under
> memory pressure, the test attempts to mmap and access it. The kernel should
> trigger SIGBUS or SIGSEGV when accessing the purged mapping, confirming
> that purged memory is properly invalidated.
> 
> Cc: Nishit Sharma <nishit.sharma@intel.com>
> Cc: Pravalika Gurram <pravalika.gurram@intel.com>
> Cc: Matthew Brost <matthew.brost@intel.com>
> Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
> Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
> Signed-off-by: Arvind Yadav <arvind.yadav@intel.com>
> ---
>  tests/intel/xe_madvise.c | 219
> +++++++++++++++++++++++++++++++++++++++
>  tests/meson.build        |   1 +
>  2 files changed, 220 insertions(+)
>  create mode 100644 tests/intel/xe_madvise.c
> 
> diff --git a/tests/intel/xe_madvise.c b/tests/intel/xe_madvise.c new file mode
> 100644 index 000000000..7dbe70f42
> --- /dev/null
> +++ b/tests/intel/xe_madvise.c
> @@ -0,0 +1,219 @@
> +// SPDX-License-Identifier: MIT
> +/*
> + * Copyright © 2025 Intel Corporation
> + */
> +
> +/**
> + * TEST: Validate purgeable BO madvise functionality
> + * Category: Core
> + * Mega feature: General Core features
> + * Sub-category: Memory management tests
> + * Functionality: madvise, purgeable
> + */
> +
> +#include "igt.h"
> +#include "xe_drm.h"
> +
> +#include "xe/xe_ioctl.h"
> +#include "xe/xe_query.h"
> +
> +/* Purgeable test constants */
> +#define PURGEABLE_ADDR		0x1a0000
> +#define PURGEABLE_BO_SIZE	4096
> +
> +/**
> + * trigger_memory_pressure - Fill VRAM + 25% to force purgeable reclaim
> + * @fd: DRM file descriptor
> + * @vm: VM handle (unused, kept for API compatibility)
> + *
> + * Allocates BOs in a temporary VM until VRAM is overcommitted,
> + * forcing the kernel to purge DONTNEED-marked BOs.
> + */
> +static void trigger_memory_pressure(int fd, uint32_t vm) {
> +	uint64_t vram_size, overpressure;
> +	const uint64_t chunk = 8ull << 20; /* 8 MiB */
> +	int max_objs, n = 0;
> +	uint32_t *handles;
> +	uint64_t total;
> +	void *p;
> +	uint32_t handle, temp_vm;
> +
> +	/* Use a separate VM so pressure BOs don't affect the test VM */
> +	temp_vm = xe_vm_create(fd, 0, 0);
> +
> +	vram_size = xe_visible_vram_size(fd, 0);
> +	/* Scale overpressure to 25% of VRAM, minimum 64MB */
> +	overpressure = vram_size / 4;
> +	if (overpressure < (64 << 20))
> +		overpressure = 64 << 20;
> +
> +	max_objs = (vram_size + overpressure) / chunk + 1;
> +	handles = malloc(max_objs * sizeof(*handles));
> +	igt_assert(handles);
> +
> +	total = 0;
> +	while (total < vram_size + overpressure && n < max_objs) {
> +		handle = xe_bo_create(fd, temp_vm, chunk,
> +				      vram_if_possible(fd, 0),
> +
> DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);
> +		handles[n++] = handle;
> +		total += chunk;
> +
> +		p = xe_bo_map(fd, handle, chunk);
> +		igt_assert(p != MAP_FAILED);
> +
> +		/* Fault in all pages so they actually consume VRAM */
> +		memset(p, 0xCD, chunk);
> +		munmap(p, chunk);
> +	}
> +
> +	/* Allow shrinker time to process pressure */
> +	usleep(100000);
> +
> +	for (int i = 0; i < n; i++)
> +		gem_close(fd, handles[i]);
> +
> +	free(handles);
> +
> +	xe_vm_destroy(fd, temp_vm);
> +}
> +
> +static jmp_buf jmp;
> +
> +__noreturn static void sigtrap(int sig) {
> +	siglongjmp(jmp, sig);
> +}
> +
> +/**
> + * purgeable_mark_and_verify_purged - Mark DONTNEED, pressure, check
> +purged
> + * @fd: DRM file descriptor
> + * @vm: VM handle
> + * @addr: Virtual address of the BO
> + * @size: Size of the BO
> + *
> + * Returns true if the BO was purged under memory pressure.
> + */
> +static bool purgeable_mark_and_verify_purged(int fd, uint32_t vm,
> +uint64_t addr, size_t size) {
> +	uint32_t retained;
> +
> +	/* Mark as DONTNEED */
> +	retained = xe_vm_madvise_purgeable(fd, vm, addr, size,
> +
> DRM_XE_VMA_PURGEABLE_STATE_DONTNEED);
> +	if (retained != 1)
> +		return false;
> +
> +	/* Trigger memory pressure */
> +	trigger_memory_pressure(fd, vm);
> +
> +	/* Verify purged */
> +	retained = xe_vm_madvise_purgeable(fd, vm, addr, size,
> +
> DRM_XE_VMA_PURGEABLE_STATE_WILLNEED);
> +	return retained == 0;
> +}
> +
> +/**
> + * purgeable_setup_simple_bo - Setup VM and bind a single BO
> + * @fd: DRM file descriptor
> + * @vm: Output VM handle
> + * @bo: Output BO handle
> + * @addr: Virtual address to bind at
> + * @size: Size of the BO
> + * @use_scratch: Whether to use scratch page flag
> + *
> + * Helper to create VM, BO, and bind it at the specified address.
> + */
> +static void purgeable_setup_simple_bo(int fd, uint32_t *vm, uint32_t *bo,
> +				      uint64_t addr, size_t size, bool
> use_scratch) {
> +	struct drm_xe_sync sync = {
> +		.type = DRM_XE_SYNC_TYPE_USER_FENCE,
> +		.flags = DRM_XE_SYNC_FLAG_SIGNAL,
> +		.timeline_value = 1,
> +	};
> +	uint64_t sync_val = 0;
> +
> +	*vm = xe_vm_create(fd, use_scratch ?
> DRM_XE_VM_CREATE_FLAG_SCRATCH_PAGE : 0, 0);
> +	*bo = xe_bo_create(fd, *vm, size, vram_if_possible(fd, 0),
> +
> DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);
> +
> +	sync.addr = to_user_pointer(&sync_val);
> +	xe_vm_bind_async(fd, *vm, 0, *bo, 0, addr, size, &sync, 1);
> +	xe_wait_ufence(fd, &sync_val, 1, 0, NSEC_PER_SEC); }
> +
> +/**
> + * SUBTEST: dontneed-before-mmap
> + * Description: Mark BO as DONTNEED before mmap, verify mmap fails or
> +SIGBUS on access
> + * Test category: functionality test
> + */
> +static void test_dontneed_before_mmap(int fd, struct
> +drm_xe_engine_class_instance *hwe) {
> +	uint32_t bo, vm;
> +	uint64_t addr = PURGEABLE_ADDR;
> +	size_t bo_size = PURGEABLE_BO_SIZE;
> +	void *map;
> +
> +	purgeable_setup_simple_bo(fd, &vm, &bo, addr, bo_size, false);
> +	if (!purgeable_mark_and_verify_purged(fd, vm, addr, bo_size))
> +		igt_skip("Unable to induce purge on this platform/config");
> +
> +	/* mmap the purged BO - access should trigger SIGBUS */
> +	map = xe_bo_map(fd, bo, bo_size);
> +
> +	{
> +		sighandler_t old_sigsegv, old_sigbus;
> +		char *ptr = (char *)map;
> +		int sig;
> +
> +		old_sigsegv = signal(SIGSEGV, (__sighandler_t)sigtrap);
> +		old_sigbus = signal(SIGBUS, (__sighandler_t)sigtrap);
> +
> +		sig = sigsetjmp(jmp, SIGBUS | SIGSEGV);
> +		switch (sig) {
> +		case SIGBUS:
> +		case SIGSEGV:
> +			/* Expected - purged BO access failed */
> +			break;
> +		case 0:
> +			*ptr = 0;
> +			__attribute__ ((fallthrough));
> +		default:
> +			igt_assert_f(false,
> +				     "Access to purged mmap should trigger
> SIGBUS, got sig=%d\n",
> +				     sig);
> +			break;
> +		}
> +
> +		signal(SIGBUS, old_sigbus);
> +		signal(SIGSEGV, old_sigsegv);
> +		munmap(map, bo_size);
> +	}
Can you please move munmap out of block
and one thing did not get how igt is receiving the SIGSEV
if I comment the SIGNAL code am not receiving any error from kernel. Can you please paste the output how SIGSEGV error will be seen from kernel
> +
> +	gem_close(fd, bo);
> +	xe_vm_destroy(fd, vm);
> +}
> +
> +int igt_main()
> +{
> +	struct drm_xe_engine_class_instance *hwe;
> +	int fd;
> +
> +	igt_fixture() {
> +		fd = drm_open_driver(DRIVER_XE);
> +		xe_device_get(fd);
> +	}
> +
> +	igt_subtest("dontneed-before-mmap")
> +		xe_for_each_engine(fd, hwe) {
> +			test_dontneed_before_mmap(fd, hwe);
> +			break;
> +		}
> +
> +	igt_fixture() {
> +		xe_device_put(fd);
> +		drm_close_driver(fd);
> +	}
> +}
> diff --git a/tests/meson.build b/tests/meson.build index
> 0ad728b87..9d41d7de6 100644
> --- a/tests/meson.build
> +++ b/tests/meson.build
> @@ -313,6 +313,7 @@ intel_xe_progs = [
>  	'xe_huc_copy',
>  	'xe_intel_bb',
>  	'xe_live_ktest',
> +	'xe_madvise',
>  	'xe_media_fill',
>  	'xe_mmap',
>          'xe_module_load',
> --
> 2.43.0

RE: [PATCH i-g-t v3 4/8] tests/intel/xe_madvise: Add dontneed-after-mmap subtest

[Gurram, Pravalika]

> -----Original Message-----
> From: Yadav, Arvind <arvind.yadav@intel.com>
> Sent: Tuesday, 17 February, 2026 08:04 AM
> To: igt-dev@lists.freedesktop.org
> Cc: Brost, Matthew <matthew.brost@intel.com>; Ghimiray, Himal Prasad
> <himal.prasad.ghimiray@intel.com>; thomas.hellstrom@linux.intel.com;
> Sharma, Nishit <nishit.sharma@intel.com>; Gurram, Pravalika
> <pravalika.gurram@intel.com>
> Subject: [PATCH i-g-t v3 4/8] tests/intel/xe_madvise: Add dontneed-after-
> mmap subtest
> 
> This test verifies that an existing mmap becomes invalid after the BO is marked
> as purgeable and purged. The test creates a BO, maps it, writes data, then
> marks it DONTNEED and triggers memory pressure.
> Accessing the previously valid mapping should now trigger SIGBUS or SIGSEGV,
> confirming that existing mappings are correctly invalidated when the backing
> store is purged.
> 
> Cc: Nishit Sharma <nishit.sharma@intel.com>
> Cc: Pravalika Gurram <pravalika.gurram@intel.com>
> Cc: Matthew Brost <matthew.brost@intel.com>
> Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
> Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
> Signed-off-by: Arvind Yadav <arvind.yadav@intel.com>
> ---
>  tests/intel/xe_madvise.c | 54
> ++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 54 insertions(+)
> 
> diff --git a/tests/intel/xe_madvise.c b/tests/intel/xe_madvise.c index
> 7dbe70f42..5c6a24553 100644
> --- a/tests/intel/xe_madvise.c
> +++ b/tests/intel/xe_madvise.c
> @@ -196,6 +196,54 @@ static void test_dontneed_before_mmap(int fd,
> struct drm_xe_engine_class_instanc
>  	xe_vm_destroy(fd, vm);
>  }
> 
> +/**
> + * SUBTEST: dontneed-after-mmap
> + * Description: Mark BO as DONTNEED after mmap, verify SIGBUS on
> +accessing purged mapping
> + * Test category: functionality test
> + */
> +static void test_dontneed_after_mmap(int fd, struct
> +drm_xe_engine_class_instance *hwe) {
> +	uint32_t bo, vm;
> +	uint64_t addr = PURGEABLE_ADDR;
> +	size_t bo_size = PURGEABLE_BO_SIZE;
> +	void *map;
> +
> +	purgeable_setup_simple_bo(fd, &vm, &bo, addr, bo_size, true);
> +
> +	map = xe_bo_map(fd, bo, bo_size);
> +	memset(map, 0xAB, bo_size);
> +
> +	if (!purgeable_mark_and_verify_purged(fd, vm, addr, bo_size))
> +		igt_skip("Unable to induce purge on this platform/config");
> +
here you have purged the bo by this time. And here you should try to access the bo again correct ?
With out access the bo how the SIGSEGV signal come? Here also same I did not receive any SIGSEGV signal from kernell

Rest all looks okay to me please clarify these points
Regards,
PRavalika
> +	/* Access purged mapping - should trigger SIGBUS/SIGSEGV */
> +	{
> +		sighandler_t old_sigsegv, old_sigbus;
> +		char *ptr = (char *)map;
> +		int sig;
> +
> +		old_sigsegv = signal(SIGSEGV, (__sighandler_t)sigtrap);
> +		old_sigbus = signal(SIGBUS, (__sighandler_t)sigtrap);
> +
> +		sig = sigsetjmp(jmp, SIGBUS | SIGSEGV);
> +		if (sig == SIGBUS || sig == SIGSEGV) {
> +			/* Expected - purged mapping access failed */
> +		} else if (sig == 0) {
> +			*ptr = 0;
> +			igt_assert_f(false, "Access to purged mapping should
> trigger signal\n");
> +		} else {
> +			igt_assert_f(false, "unexpected signal %d\n", sig);
> +		}
> +
> +		signal(SIGBUS, old_sigbus);
> +		signal(SIGSEGV, old_sigsegv);
> +	}
> +
> +	munmap(map, bo_size);
> +	gem_close(fd, bo);
> +	xe_vm_destroy(fd, vm);
> +}
> +
>  int igt_main()
>  {
>  	struct drm_xe_engine_class_instance *hwe; @@ -212,6 +260,12 @@
> int igt_main()
>  			break;
>  		}
> 
> +	igt_subtest("dontneed-after-mmap")
> +		xe_for_each_engine(fd, hwe) {
> +			test_dontneed_after_mmap(fd, hwe);
> +			break;
> +		}
> +
>  	igt_fixture() {
>  		xe_device_put(fd);
>  		drm_close_driver(fd);
> --
> 2.43.0

Re: [PATCH i-g-t v3 3/8] tests/intel/xe_madvise: Add dontneed-before-mmap subtest

[Yadav, Arvind]

On 19-02-2026 10:28, Gurram, Pravalika wrote:
>
>> -----Original Message-----
>> From: Yadav, Arvind <arvind.yadav@intel.com>
>> Sent: Tuesday, 17 February, 2026 08:04 AM
>> To: igt-dev@lists.freedesktop.org
>> Cc: Brost, Matthew <matthew.brost@intel.com>; Ghimiray, Himal Prasad
>> <himal.prasad.ghimiray@intel.com>; thomas.hellstrom@linux.intel.com;
>> Sharma, Nishit <nishit.sharma@intel.com>; Gurram, Pravalika
>> <pravalika.gurram@intel.com>
>> Subject: [PATCH i-g-t v3 3/8] tests/intel/xe_madvise: Add dontneed-before-
>> mmap subtest
>>
>> This test validates kernel behavior when mapping a BO that was already
>> marked as purgeable and purged before mmap. After purging the BO under
>> memory pressure, the test attempts to mmap and access it. The kernel should
>> trigger SIGBUS or SIGSEGV when accessing the purged mapping, confirming
>> that purged memory is properly invalidated.
>>
>> Cc: Nishit Sharma <nishit.sharma@intel.com>
>> Cc: Pravalika Gurram <pravalika.gurram@intel.com>
>> Cc: Matthew Brost <matthew.brost@intel.com>
>> Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
>> Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
>> Signed-off-by: Arvind Yadav <arvind.yadav@intel.com>
>> ---
>>   tests/intel/xe_madvise.c | 219
>> +++++++++++++++++++++++++++++++++++++++
>>   tests/meson.build        |   1 +
>>   2 files changed, 220 insertions(+)
>>   create mode 100644 tests/intel/xe_madvise.c
>>
>> diff --git a/tests/intel/xe_madvise.c b/tests/intel/xe_madvise.c new file mode
>> 100644 index 000000000..7dbe70f42
>> --- /dev/null
>> +++ b/tests/intel/xe_madvise.c
>> @@ -0,0 +1,219 @@
>> +// SPDX-License-Identifier: MIT
>> +/*
>> + * Copyright © 2025 Intel Corporation
>> + */
>> +
>> +/**
>> + * TEST: Validate purgeable BO madvise functionality
>> + * Category: Core
>> + * Mega feature: General Core features
>> + * Sub-category: Memory management tests
>> + * Functionality: madvise, purgeable
>> + */
>> +
>> +#include "igt.h"
>> +#include "xe_drm.h"
>> +
>> +#include "xe/xe_ioctl.h"
>> +#include "xe/xe_query.h"
>> +
>> +/* Purgeable test constants */
>> +#define PURGEABLE_ADDR		0x1a0000
>> +#define PURGEABLE_BO_SIZE	4096
>> +
>> +/**
>> + * trigger_memory_pressure - Fill VRAM + 25% to force purgeable reclaim
>> + * @fd: DRM file descriptor
>> + * @vm: VM handle (unused, kept for API compatibility)
>> + *
>> + * Allocates BOs in a temporary VM until VRAM is overcommitted,
>> + * forcing the kernel to purge DONTNEED-marked BOs.
>> + */
>> +static void trigger_memory_pressure(int fd, uint32_t vm) {
>> +	uint64_t vram_size, overpressure;
>> +	const uint64_t chunk = 8ull << 20; /* 8 MiB */
>> +	int max_objs, n = 0;
>> +	uint32_t *handles;
>> +	uint64_t total;
>> +	void *p;
>> +	uint32_t handle, temp_vm;
>> +
>> +	/* Use a separate VM so pressure BOs don't affect the test VM */
>> +	temp_vm = xe_vm_create(fd, 0, 0);
>> +
>> +	vram_size = xe_visible_vram_size(fd, 0);
>> +	/* Scale overpressure to 25% of VRAM, minimum 64MB */
>> +	overpressure = vram_size / 4;
>> +	if (overpressure < (64 << 20))
>> +		overpressure = 64 << 20;
>> +
>> +	max_objs = (vram_size + overpressure) / chunk + 1;
>> +	handles = malloc(max_objs * sizeof(*handles));
>> +	igt_assert(handles);
>> +
>> +	total = 0;
>> +	while (total < vram_size + overpressure && n < max_objs) {
>> +		handle = xe_bo_create(fd, temp_vm, chunk,
>> +				      vram_if_possible(fd, 0),
>> +
>> DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);
>> +		handles[n++] = handle;
>> +		total += chunk;
>> +
>> +		p = xe_bo_map(fd, handle, chunk);
>> +		igt_assert(p != MAP_FAILED);
>> +
>> +		/* Fault in all pages so they actually consume VRAM */
>> +		memset(p, 0xCD, chunk);
>> +		munmap(p, chunk);
>> +	}
>> +
>> +	/* Allow shrinker time to process pressure */
>> +	usleep(100000);
>> +
>> +	for (int i = 0; i < n; i++)
>> +		gem_close(fd, handles[i]);
>> +
>> +	free(handles);
>> +
>> +	xe_vm_destroy(fd, temp_vm);
>> +}
>> +
>> +static jmp_buf jmp;
>> +
>> +__noreturn static void sigtrap(int sig) {
>> +	siglongjmp(jmp, sig);
>> +}
>> +
>> +/**
>> + * purgeable_mark_and_verify_purged - Mark DONTNEED, pressure, check
>> +purged
>> + * @fd: DRM file descriptor
>> + * @vm: VM handle
>> + * @addr: Virtual address of the BO
>> + * @size: Size of the BO
>> + *
>> + * Returns true if the BO was purged under memory pressure.
>> + */
>> +static bool purgeable_mark_and_verify_purged(int fd, uint32_t vm,
>> +uint64_t addr, size_t size) {
>> +	uint32_t retained;
>> +
>> +	/* Mark as DONTNEED */
>> +	retained = xe_vm_madvise_purgeable(fd, vm, addr, size,
>> +
>> DRM_XE_VMA_PURGEABLE_STATE_DONTNEED);
>> +	if (retained != 1)
>> +		return false;
>> +
>> +	/* Trigger memory pressure */
>> +	trigger_memory_pressure(fd, vm);
>> +
>> +	/* Verify purged */
>> +	retained = xe_vm_madvise_purgeable(fd, vm, addr, size,
>> +
>> DRM_XE_VMA_PURGEABLE_STATE_WILLNEED);
>> +	return retained == 0;
>> +}
>> +
>> +/**
>> + * purgeable_setup_simple_bo - Setup VM and bind a single BO
>> + * @fd: DRM file descriptor
>> + * @vm: Output VM handle
>> + * @bo: Output BO handle
>> + * @addr: Virtual address to bind at
>> + * @size: Size of the BO
>> + * @use_scratch: Whether to use scratch page flag
>> + *
>> + * Helper to create VM, BO, and bind it at the specified address.
>> + */
>> +static void purgeable_setup_simple_bo(int fd, uint32_t *vm, uint32_t *bo,
>> +				      uint64_t addr, size_t size, bool
>> use_scratch) {
>> +	struct drm_xe_sync sync = {
>> +		.type = DRM_XE_SYNC_TYPE_USER_FENCE,
>> +		.flags = DRM_XE_SYNC_FLAG_SIGNAL,
>> +		.timeline_value = 1,
>> +	};
>> +	uint64_t sync_val = 0;
>> +
>> +	*vm = xe_vm_create(fd, use_scratch ?
>> DRM_XE_VM_CREATE_FLAG_SCRATCH_PAGE : 0, 0);
>> +	*bo = xe_bo_create(fd, *vm, size, vram_if_possible(fd, 0),
>> +
>> DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);
>> +
>> +	sync.addr = to_user_pointer(&sync_val);
>> +	xe_vm_bind_async(fd, *vm, 0, *bo, 0, addr, size, &sync, 1);
>> +	xe_wait_ufence(fd, &sync_val, 1, 0, NSEC_PER_SEC); }
>> +
>> +/**
>> + * SUBTEST: dontneed-before-mmap
>> + * Description: Mark BO as DONTNEED before mmap, verify mmap fails or
>> +SIGBUS on access
>> + * Test category: functionality test
>> + */
>> +static void test_dontneed_before_mmap(int fd, struct
>> +drm_xe_engine_class_instance *hwe) {
>> +	uint32_t bo, vm;
>> +	uint64_t addr = PURGEABLE_ADDR;
>> +	size_t bo_size = PURGEABLE_BO_SIZE;
>> +	void *map;
>> +
>> +	purgeable_setup_simple_bo(fd, &vm, &bo, addr, bo_size, false);
>> +	if (!purgeable_mark_and_verify_purged(fd, vm, addr, bo_size))
>> +		igt_skip("Unable to induce purge on this platform/config");
>> +
>> +	/* mmap the purged BO - access should trigger SIGBUS */
>> +	map = xe_bo_map(fd, bo, bo_size);
>> +
>> +	{
>> +		sighandler_t old_sigsegv, old_sigbus;
>> +		char *ptr = (char *)map;
>> +		int sig;
>> +
>> +		old_sigsegv = signal(SIGSEGV, (__sighandler_t)sigtrap);
>> +		old_sigbus = signal(SIGBUS, (__sighandler_t)sigtrap);
>> +
>> +		sig = sigsetjmp(jmp, SIGBUS | SIGSEGV);
>> +		switch (sig) {
>> +		case SIGBUS:
>> +		case SIGSEGV:
>> +			/* Expected - purged BO access failed */
>> +			break;
>> +		case 0:
>> +			*ptr = 0;
>> +			__attribute__ ((fallthrough));
>> +		default:
>> +			igt_assert_f(false,
>> +				     "Access to purged mmap should trigger
>> SIGBUS, got sig=%d\n",
>> +				     sig);
>> +			break;
>> +		}
>> +
>> +		signal(SIGBUS, old_sigbus);
>> +		signal(SIGSEGV, old_sigsegv);
>> +		munmap(map, bo_size);
>> +	}
> Can you please move munmap out of block


Will move munmap outside the block as suggested.


> and one thing did not get how igt is receiving the SIGSEV
> if I comment the SIGNAL code am not receiving any error from kernel. Can you please paste the output how SIGSEGV error will be seen from kernel


Signals (SIGBUS/SIGSEGV) are delivered to the process, not printed as 
kernel logs. The signal handler catches the fatal signal and uses 
siglongjmp() to return control to the test, which then validates the 
signal was received. Without the handler, the test would simply crash. 
This matches i915's gem_madvise implementation.
You can add a log for "dontneed-after-mmap" test then you will get SIGNAL.

Thanks,
Arvind

>> +
>> +	gem_close(fd, bo);
>> +	xe_vm_destroy(fd, vm);
>> +}
>> +
>> +int igt_main()
>> +{
>> +	struct drm_xe_engine_class_instance *hwe;
>> +	int fd;
>> +
>> +	igt_fixture() {
>> +		fd = drm_open_driver(DRIVER_XE);
>> +		xe_device_get(fd);
>> +	}
>> +
>> +	igt_subtest("dontneed-before-mmap")
>> +		xe_for_each_engine(fd, hwe) {
>> +			test_dontneed_before_mmap(fd, hwe);
>> +			break;
>> +		}
>> +
>> +	igt_fixture() {
>> +		xe_device_put(fd);
>> +		drm_close_driver(fd);
>> +	}
>> +}
>> diff --git a/tests/meson.build b/tests/meson.build index
>> 0ad728b87..9d41d7de6 100644
>> --- a/tests/meson.build
>> +++ b/tests/meson.build
>> @@ -313,6 +313,7 @@ intel_xe_progs = [
>>   	'xe_huc_copy',
>>   	'xe_intel_bb',
>>   	'xe_live_ktest',
>> +	'xe_madvise',
>>   	'xe_media_fill',
>>   	'xe_mmap',
>>           'xe_module_load',
>> --
>> 2.43.0

Re: [PATCH i-g-t v3 4/8] tests/intel/xe_madvise: Add dontneed-after-mmap subtest

[Yadav, Arvind]

On 19-02-2026 10:31, Gurram, Pravalika wrote:
>
>> -----Original Message-----
>> From: Yadav, Arvind <arvind.yadav@intel.com>
>> Sent: Tuesday, 17 February, 2026 08:04 AM
>> To: igt-dev@lists.freedesktop.org
>> Cc: Brost, Matthew <matthew.brost@intel.com>; Ghimiray, Himal Prasad
>> <himal.prasad.ghimiray@intel.com>; thomas.hellstrom@linux.intel.com;
>> Sharma, Nishit <nishit.sharma@intel.com>; Gurram, Pravalika
>> <pravalika.gurram@intel.com>
>> Subject: [PATCH i-g-t v3 4/8] tests/intel/xe_madvise: Add dontneed-after-
>> mmap subtest
>>
>> This test verifies that an existing mmap becomes invalid after the BO is marked
>> as purgeable and purged. The test creates a BO, maps it, writes data, then
>> marks it DONTNEED and triggers memory pressure.
>> Accessing the previously valid mapping should now trigger SIGBUS or SIGSEGV,
>> confirming that existing mappings are correctly invalidated when the backing
>> store is purged.
>>
>> Cc: Nishit Sharma <nishit.sharma@intel.com>
>> Cc: Pravalika Gurram <pravalika.gurram@intel.com>
>> Cc: Matthew Brost <matthew.brost@intel.com>
>> Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
>> Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
>> Signed-off-by: Arvind Yadav <arvind.yadav@intel.com>
>> ---
>>   tests/intel/xe_madvise.c | 54
>> ++++++++++++++++++++++++++++++++++++++++
>>   1 file changed, 54 insertions(+)
>>
>> diff --git a/tests/intel/xe_madvise.c b/tests/intel/xe_madvise.c index
>> 7dbe70f42..5c6a24553 100644
>> --- a/tests/intel/xe_madvise.c
>> +++ b/tests/intel/xe_madvise.c
>> @@ -196,6 +196,54 @@ static void test_dontneed_before_mmap(int fd,
>> struct drm_xe_engine_class_instanc
>>   	xe_vm_destroy(fd, vm);
>>   }
>>
>> +/**
>> + * SUBTEST: dontneed-after-mmap
>> + * Description: Mark BO as DONTNEED after mmap, verify SIGBUS on
>> +accessing purged mapping
>> + * Test category: functionality test
>> + */
>> +static void test_dontneed_after_mmap(int fd, struct
>> +drm_xe_engine_class_instance *hwe) {
>> +	uint32_t bo, vm;
>> +	uint64_t addr = PURGEABLE_ADDR;
>> +	size_t bo_size = PURGEABLE_BO_SIZE;
>> +	void *map;
>> +
>> +	purgeable_setup_simple_bo(fd, &vm, &bo, addr, bo_size, true);
>> +
>> +	map = xe_bo_map(fd, bo, bo_size);
>> +	memset(map, 0xAB, bo_size);
>> +
>> +	if (!purgeable_mark_and_verify_purged(fd, vm, addr, bo_size))
>> +		igt_skip("Unable to induce purge on this platform/config");
>> +
> here you have purged the bo by this time. And here you should try to access the bo again correct ?
> With out access the bo how the SIGSEGV signal come? Here also same I did not receive any SIGSEGV signal from kernell
>
> Rest all looks okay to me please clarify these points.


Yes, the BO is accessed after purging - the access happens at *ptr = 0; 
inside the else if (sig == 0) block.
Signals are delivered to the process silently - no dmesg/console output. 
This matches i915's gem_madvise.c exactly.

Thanks,
Arvind

> Regards,
> PRavalika
>> +	/* Access purged mapping - should trigger SIGBUS/SIGSEGV */
>> +	{
>> +		sighandler_t old_sigsegv, old_sigbus;
>> +		char *ptr = (char *)map;
>> +		int sig;
>> +
>> +		old_sigsegv = signal(SIGSEGV, (__sighandler_t)sigtrap);
>> +		old_sigbus = signal(SIGBUS, (__sighandler_t)sigtrap);
>> +
>> +		sig = sigsetjmp(jmp, SIGBUS | SIGSEGV);
>> +		if (sig == SIGBUS || sig == SIGSEGV) {
>> +			/* Expected - purged mapping access failed */
>> +		} else if (sig == 0) {
>> +			*ptr = 0;
>> +			igt_assert_f(false, "Access to purged mapping should
>> trigger signal\n");
>> +		} else {
>> +			igt_assert_f(false, "unexpected signal %d\n", sig);
>> +		}
>> +
>> +		signal(SIGBUS, old_sigbus);
>> +		signal(SIGSEGV, old_sigsegv);
>> +	}
>> +
>> +	munmap(map, bo_size);
>> +	gem_close(fd, bo);
>> +	xe_vm_destroy(fd, vm);
>> +}
>> +
>>   int igt_main()
>>   {
>>   	struct drm_xe_engine_class_instance *hwe; @@ -212,6 +260,12 @@
>> int igt_main()
>>   			break;
>>   		}
>>
>> +	igt_subtest("dontneed-after-mmap")
>> +		xe_for_each_engine(fd, hwe) {
>> +			test_dontneed_after_mmap(fd, hwe);
>> +			break;
>> +		}
>> +
>>   	igt_fixture() {
>>   		xe_device_put(fd);
>>   		drm_close_driver(fd);
>> --
>> 2.43.0

RE: [PATCH i-g-t v3 1/8] drm-uapi/xe_drm: Add UAPI support for purgeable buffer objects

[Gurram, Pravalika]

> -----Original Message-----
> From: Yadav, Arvind <arvind.yadav@intel.com>
> Sent: Tuesday, 17 February, 2026 08:04 AM
> To: igt-dev@lists.freedesktop.org
> Cc: Brost, Matthew <matthew.brost@intel.com>; Ghimiray, Himal Prasad
> <himal.prasad.ghimiray@intel.com>; thomas.hellstrom@linux.intel.com;
> Sharma, Nishit <nishit.sharma@intel.com>; Gurram, Pravalika
> <pravalika.gurram@intel.com>
> Subject: [PATCH i-g-t v3 1/8] drm-uapi/xe_drm: Add UAPI support for
> purgeable buffer objects
> 
> From: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
> 
> Extend the DRM_XE_MADVISE ioctl to support purgeable buffer object
> management by adding DRM_XE_VMA_ATTR_PURGEABLE_STATE attribute
> type.
> 
> This allows userspace applications to provide memory usage hints to the
> kernel for better memory management under pressure:
> 
> This allows userspace applications to provide memory usage hints to the
> kernel for better memory management under pressure:
> 
> - WILLNEED: Buffer is needed and should not be purged. If the BO was
>   previously purged, retained field returns 0 indicating backing store
>   was lost (once purged, always purged semantics matching i915).
> 
> - DONTNEED: Buffer is not currently needed and may be purged by the
>   kernel under memory pressure to free resources. Only applies to
>   non-shared BOs.
> 
> The implementation includes a 'retained' output field (matching i915's
> drm_i915_gem_madvise.retained) that indicates whether the BO's backing
> store still exists (1) or has been purged (0).
> 
> v2:
>   - Update UAPI documentation to clarify retained must be initialized
>     to 0(Thomas)
> 
> Cc: Nishit Sharma <nishit.sharma@intel.com>
> Cc: Pravalika Gurram <pravalika.gurram@intel.com>
> Cc: Matthew Brost <matthew.brost@intel.com>
> Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
> Signed-off-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
> Signed-off-by: Arvind Yadav <arvind.yadav@intel.com>
> ---
>  include/drm-uapi/xe_drm.h | 44
> +++++++++++++++++++++++++++++++++++++++
>  1 file changed, 44 insertions(+)
> 
> diff --git a/include/drm-uapi/xe_drm.h b/include/drm-uapi/xe_drm.h index
> 077e66a68..3dd1ba875 100644
> --- a/include/drm-uapi/xe_drm.h
> +++ b/include/drm-uapi/xe_drm.h
> @@ -2099,6 +2099,7 @@ struct drm_xe_madvise {
>  #define DRM_XE_MEM_RANGE_ATTR_PREFERRED_LOC	0
>  #define DRM_XE_MEM_RANGE_ATTR_ATOMIC		1
>  #define DRM_XE_MEM_RANGE_ATTR_PAT		2
> +#define DRM_XE_VMA_ATTR_PURGEABLE_STATE		3
>  	/** @type: type of attribute */
>  	__u32 type;
> 
> @@ -2189,6 +2190,49 @@ struct drm_xe_madvise {
>  			/** @pat_index.reserved: Reserved */
>  			__u64 reserved;
>  		} pat_index;
> +
> +		/**
> +		 * @purge_state_val: Purgeable state configuration
> +		 *
> +		 * Used when @type ==
> DRM_XE_VMA_ATTR_PURGEABLE_STATE.
> +		 *
> +		 * Configures the purgeable state of buffer objects in the
> specified
> +		 * virtual address range. This allows applications to hint to the
> kernel
> +		 * about bo's usage patterns for better memory management.
> +		 *
> +		 * Supported values for @purge_state_val.val:
> +		 *  - DRM_XE_VMA_PURGEABLE_STATE_WILLNEED (0): Marks
> BO as needed.
> +		 *    If BO was purged, returns retained=0 (backing store lost).
> +		 *
> +		 *  - DRM_XE_VMA_PURGEABLE_STATE_DONTNEED (1): Hints
> that BO is not
> +		 *    currently needed. Kernel may purge it under memory
> pressure.
> +		 *    Only applies to non-shared BOs. Returns retained=1 if not
> purged.
> +		 */
> +		struct {
> +#define DRM_XE_VMA_PURGEABLE_STATE_WILLNEED	0
> +#define DRM_XE_VMA_PURGEABLE_STATE_DONTNEED	1
> +			/** @purge_state_val.val: value for
> DRM_XE_VMA_ATTR_PURGEABLE_STATE */
> +			__u32 val;
> +
> +			/* @purge_state_val.pad */
> +			__u32 pad;
> +			/**
> +			 * @purge_state_val.retained: Pointer to output field
> for backing
> +			 * store status.
> +			 *
> +			 * Userspace must initialize this u32 field to 0 before
> the
> +			 * ioctl. Kernel writes to it after the operation:
> +			 * - 1 if backing store exists (not purged)
> +			 * - 0 if backing store was purged
> +			 *
> +			 * If userspace fails to initialize to 0, ioctl returns -
> EINVAL.
> +			 * This ensures a safe default (0 = assume purged) if
> kernel
> +			 * cannot write the result.
> +			 *
> +			 * Similar to i915's drm_i915_gem_madvise.retained
> field.
> +			 */
> +			__u64 retained;
> +		} purge_state_val;
>  	};
As kamil suggested please make sure that it’s a copy of kernel
Reviewed-by: Pravalika Gurram <pravalika.gurram@intel.com>
> 
>  	/** @reserved: Reserved */
> --
> 2.43.0

RE: [PATCH i-g-t v3 2/8] lib/xe: Add purgeable memory ioctl support

[Gurram, Pravalika]

> -----Original Message-----
> From: Yadav, Arvind <arvind.yadav@intel.com>
> Sent: Tuesday, 17 February, 2026 08:04 AM
> To: igt-dev@lists.freedesktop.org
> Cc: Brost, Matthew <matthew.brost@intel.com>; Ghimiray, Himal Prasad
> <himal.prasad.ghimiray@intel.com>; thomas.hellstrom@linux.intel.com;
> Sharma, Nishit <nishit.sharma@intel.com>; Gurram, Pravalika
> <pravalika.gurram@intel.com>
> Subject: [PATCH i-g-t v3 2/8] lib/xe: Add purgeable memory ioctl support
> 
> Add xe_vm_madvise_purgeable() helper function to support purgeable
> memory management through the XE madvise ioctl. This allows applications
> to hint to the kernel about buffer object usage patterns for better memory
> management under pressure.
> 
> The function provides a clean interface to:
> - Mark buffer objects as DONTNEED (purgeable)
> - Mark buffer objects as WILLNEED (not purgeable)
> 
> Returns the retained value directly (1 if backing store exists, 0 if purged).
> 
> Also update __xe_vm_madvise() to reject purgeable state operations and
> direct users to the dedicated helper.
> 
> v2:
>   - retained must be initialized to 0(Thomas)
> 
> Cc: Nishit Sharma <nishit.sharma@intel.com>
> Cc: Pravalika Gurram <pravalika.gurram@intel.com>
> Cc: Matthew Brost <matthew.brost@intel.com>
> Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
> Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
> Signed-off-by: Arvind Yadav <arvind.yadav@intel.com>
> ---
>  lib/xe/xe_ioctl.c | 33 +++++++++++++++++++++++++++++++++
> lib/xe/xe_ioctl.h |  2 ++
>  2 files changed, 35 insertions(+)
> 
> diff --git a/lib/xe/xe_ioctl.c b/lib/xe/xe_ioctl.c index 16aae05c9..b61f85b7b
> 100644
> --- a/lib/xe/xe_ioctl.c
> +++ b/lib/xe/xe_ioctl.c
> @@ -739,6 +739,9 @@ int __xe_vm_madvise(int fd, uint32_t vm, uint64_t
> addr, uint64_t range,
>  	case DRM_XE_MEM_RANGE_ATTR_PAT:
>  		madvise.pat_index.val = op_val;
>  		break;
> +	case DRM_XE_VMA_ATTR_PURGEABLE_STATE:
> +		/* Purgeable state handled by xe_vm_madvise_purgeable */
> +		return -EINVAL;
>  	default:
>  		igt_warn("Unknown attribute\n");
>  		return -EINVAL;
> @@ -775,6 +778,36 @@ void xe_vm_madvise(int fd, uint32_t vm, uint64_t
> addr, uint64_t range,
>  				      instance), 0);
>  }
> 
> +/**
> + * xe_vm_madvise_purgeable:
> + * @fd: xe device fd
> + * @vm_id: vm_id of the virtual range
> + * @start: start of the virtual address range
> + * @range: size of the virtual address range
> + * @state: purgeable state (DRM_XE_VMA_PURGEABLE_STATE_WILLNEED or
> +DONTNEED)
> + *
> + * Sets the purgeable state for a virtual memory range. This allows
> +applications
> + * to hint to the kernel about buffer object usage patterns for better memory
> management.
> + *
> + * Returns: retained value (1 if backing store exists, 0 if purged)  */
> +uint32_t xe_vm_madvise_purgeable(int fd, uint32_t vm_id, uint64_t start,
> +				 uint64_t range, uint32_t state)
> +{
> +	uint32_t retained_val = 0;
> +	struct drm_xe_madvise madvise = {
> +		.vm_id = vm_id,
> +		.start = start,
> +		.range = range,
> +		.type = DRM_XE_VMA_ATTR_PURGEABLE_STATE,
> +		.purge_state_val.val = state,
> +		.purge_state_val.retained =
> (uint64_t)(uintptr_t)&retained_val,
> +	};
> +
> +	igt_assert_eq(igt_ioctl(fd, DRM_IOCTL_XE_MADVISE, &madvise), 0);
> +	return retained_val;
> +}
> +
>  #define	BIND_SYNC_VAL	0x686868
>  void xe_vm_bind_lr_sync(int fd, uint32_t vm, uint32_t bo, uint64_t offset,
>  			uint64_t addr, uint64_t size, uint32_t flags) diff --git
> a/lib/xe/xe_ioctl.h b/lib/xe/xe_ioctl.h index 3ea651063..8eb506915 100644
> --- a/lib/xe/xe_ioctl.h
> +++ b/lib/xe/xe_ioctl.h
> @@ -107,6 +107,8 @@ int __xe_vm_madvise(int fd, uint32_t vm, uint64_t
> addr, uint64_t range, uint64_t
>  		    uint32_t type, uint32_t op_val, uint16_t policy, uint16_t
> instance);  void xe_vm_madvise(int fd, uint32_t vm, uint64_t addr, uint64_t
> range, uint64_t ext,
>  		   uint32_t type, uint32_t op_val, uint16_t policy, uint16_t
> instance);
> +uint32_t xe_vm_madvise_purgeable(int fd, uint32_t vm_id, uint64_t start,
> +				 uint64_t range, uint32_t state);
Reviewed-by: Pravalika Gurram <pravalika.gurram@intel.com>
>  int xe_vm_number_vmas_in_range(int fd, struct
> drm_xe_vm_query_mem_range_attr *vmas_attr);  int xe_vm_vma_attrs(int
> fd, struct drm_xe_vm_query_mem_range_attr *vmas_attr,
>  		    struct drm_xe_mem_range_attr *mem_attr);
> --
> 2.43.0

RE: [PATCH i-g-t v3 3/8] tests/intel/xe_madvise: Add dontneed-before-mmap subtest

[Gurram, Pravalika]

> -----Original Message-----
> From: Yadav, Arvind <arvind.yadav@intel.com>
> Sent: Tuesday, 17 February, 2026 08:04 AM
> To: igt-dev@lists.freedesktop.org
> Cc: Brost, Matthew <matthew.brost@intel.com>; Ghimiray, Himal Prasad
> <himal.prasad.ghimiray@intel.com>; thomas.hellstrom@linux.intel.com;
> Sharma, Nishit <nishit.sharma@intel.com>; Gurram, Pravalika
> <pravalika.gurram@intel.com>
> Subject: [PATCH i-g-t v3 3/8] tests/intel/xe_madvise: Add dontneed-before-
> mmap subtest
> 
> This test validates kernel behavior when mapping a BO that was already
> marked as purgeable and purged before mmap. After purging the BO under
> memory pressure, the test attempts to mmap and access it. The kernel should
> trigger SIGBUS or SIGSEGV when accessing the purged mapping, confirming
> that purged memory is properly invalidated.
> 
> Cc: Nishit Sharma <nishit.sharma@intel.com>
> Cc: Pravalika Gurram <pravalika.gurram@intel.com>
> Cc: Matthew Brost <matthew.brost@intel.com>
> Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
> Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
> Signed-off-by: Arvind Yadav <arvind.yadav@intel.com>
> ---
>  tests/intel/xe_madvise.c | 219
> +++++++++++++++++++++++++++++++++++++++
>  tests/meson.build        |   1 +
>  2 files changed, 220 insertions(+)
>  create mode 100644 tests/intel/xe_madvise.c
> 
> diff --git a/tests/intel/xe_madvise.c b/tests/intel/xe_madvise.c new file mode
> 100644 index 000000000..7dbe70f42
> --- /dev/null
> +++ b/tests/intel/xe_madvise.c
> @@ -0,0 +1,219 @@
> +// SPDX-License-Identifier: MIT
> +/*
> + * Copyright © 2025 Intel Corporation
> + */
> +
> +/**
> + * TEST: Validate purgeable BO madvise functionality
> + * Category: Core
> + * Mega feature: General Core features
> + * Sub-category: Memory management tests
> + * Functionality: madvise, purgeable
> + */
> +
> +#include "igt.h"
> +#include "xe_drm.h"
> +
> +#include "xe/xe_ioctl.h"
> +#include "xe/xe_query.h"
> +
> +/* Purgeable test constants */
> +#define PURGEABLE_ADDR		0x1a0000
> +#define PURGEABLE_BO_SIZE	4096
> +
> +/**
> + * trigger_memory_pressure - Fill VRAM + 25% to force purgeable reclaim
> + * @fd: DRM file descriptor
> + * @vm: VM handle (unused, kept for API compatibility)
> + *
> + * Allocates BOs in a temporary VM until VRAM is overcommitted,
> + * forcing the kernel to purge DONTNEED-marked BOs.
> + */
> +static void trigger_memory_pressure(int fd, uint32_t vm) {
> +	uint64_t vram_size, overpressure;
> +	const uint64_t chunk = 8ull << 20; /* 8 MiB */
> +	int max_objs, n = 0;
> +	uint32_t *handles;
> +	uint64_t total;
> +	void *p;
> +	uint32_t handle, temp_vm;
> +
> +	/* Use a separate VM so pressure BOs don't affect the test VM */
> +	temp_vm = xe_vm_create(fd, 0, 0);
> +
> +	vram_size = xe_visible_vram_size(fd, 0);
> +	/* Scale overpressure to 25% of VRAM, minimum 64MB */
> +	overpressure = vram_size / 4;
> +	if (overpressure < (64 << 20))
> +		overpressure = 64 << 20;
> +
> +	max_objs = (vram_size + overpressure) / chunk + 1;
> +	handles = malloc(max_objs * sizeof(*handles));
> +	igt_assert(handles);
> +
> +	total = 0;
> +	while (total < vram_size + overpressure && n < max_objs) {
> +		handle = xe_bo_create(fd, temp_vm, chunk,
> +				      vram_if_possible(fd, 0),
> +
> DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);
> +		handles[n++] = handle;
> +		total += chunk;
> +
> +		p = xe_bo_map(fd, handle, chunk);
> +		igt_assert(p != MAP_FAILED);
> +
> +		/* Fault in all pages so they actually consume VRAM */
> +		memset(p, 0xCD, chunk);
> +		munmap(p, chunk);
> +	}
> +
> +	/* Allow shrinker time to process pressure */
> +	usleep(100000);
> +
> +	for (int i = 0; i < n; i++)
> +		gem_close(fd, handles[i]);
> +
> +	free(handles);
> +
> +	xe_vm_destroy(fd, temp_vm);
> +}
> +
> +static jmp_buf jmp;
> +
> +__noreturn static void sigtrap(int sig) {
> +	siglongjmp(jmp, sig);
> +}
> +
> +/**
> + * purgeable_mark_and_verify_purged - Mark DONTNEED, pressure, check
> +purged
> + * @fd: DRM file descriptor
> + * @vm: VM handle
> + * @addr: Virtual address of the BO
> + * @size: Size of the BO
> + *
> + * Returns true if the BO was purged under memory pressure.
> + */
> +static bool purgeable_mark_and_verify_purged(int fd, uint32_t vm,
> +uint64_t addr, size_t size) {
> +	uint32_t retained;
> +
> +	/* Mark as DONTNEED */
> +	retained = xe_vm_madvise_purgeable(fd, vm, addr, size,
> +
> DRM_XE_VMA_PURGEABLE_STATE_DONTNEED);
> +	if (retained != 1)
> +		return false;
> +
> +	/* Trigger memory pressure */
> +	trigger_memory_pressure(fd, vm);
> +
> +	/* Verify purged */
> +	retained = xe_vm_madvise_purgeable(fd, vm, addr, size,
> +
> DRM_XE_VMA_PURGEABLE_STATE_WILLNEED);
> +	return retained == 0;
> +}
> +
> +/**
> + * purgeable_setup_simple_bo - Setup VM and bind a single BO
> + * @fd: DRM file descriptor
> + * @vm: Output VM handle
> + * @bo: Output BO handle
> + * @addr: Virtual address to bind at
> + * @size: Size of the BO
> + * @use_scratch: Whether to use scratch page flag
> + *
> + * Helper to create VM, BO, and bind it at the specified address.
> + */
> +static void purgeable_setup_simple_bo(int fd, uint32_t *vm, uint32_t *bo,
> +				      uint64_t addr, size_t size, bool
> use_scratch) {
> +	struct drm_xe_sync sync = {
> +		.type = DRM_XE_SYNC_TYPE_USER_FENCE,
> +		.flags = DRM_XE_SYNC_FLAG_SIGNAL,
> +		.timeline_value = 1,
> +	};
> +	uint64_t sync_val = 0;
> +
> +	*vm = xe_vm_create(fd, use_scratch ?
> DRM_XE_VM_CREATE_FLAG_SCRATCH_PAGE : 0, 0);
> +	*bo = xe_bo_create(fd, *vm, size, vram_if_possible(fd, 0),
> +
> DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);
> +
> +	sync.addr = to_user_pointer(&sync_val);
> +	xe_vm_bind_async(fd, *vm, 0, *bo, 0, addr, size, &sync, 1);
> +	xe_wait_ufence(fd, &sync_val, 1, 0, NSEC_PER_SEC); }
> +
> +/**
> + * SUBTEST: dontneed-before-mmap
> + * Description: Mark BO as DONTNEED before mmap, verify mmap fails or
> +SIGBUS on access
> + * Test category: functionality test
> + */
> +static void test_dontneed_before_mmap(int fd, struct
> +drm_xe_engine_class_instance *hwe) {
> +	uint32_t bo, vm;
> +	uint64_t addr = PURGEABLE_ADDR;
> +	size_t bo_size = PURGEABLE_BO_SIZE;
> +	void *map;
> +
> +	purgeable_setup_simple_bo(fd, &vm, &bo, addr, bo_size, false);
> +	if (!purgeable_mark_and_verify_purged(fd, vm, addr, bo_size))
> +		igt_skip("Unable to induce purge on this platform/config");
> +
> +	/* mmap the purged BO - access should trigger SIGBUS */
> +	map = xe_bo_map(fd, bo, bo_size);
> +
> +	{
> +		sighandler_t old_sigsegv, old_sigbus;
> +		char *ptr = (char *)map;
> +		int sig;
> +
> +		old_sigsegv = signal(SIGSEGV, (__sighandler_t)sigtrap);
> +		old_sigbus = signal(SIGBUS, (__sighandler_t)sigtrap);
> +
> +		sig = sigsetjmp(jmp, SIGBUS | SIGSEGV);
> +		switch (sig) {
> +		case SIGBUS:
> +		case SIGSEGV:
> +			/* Expected - purged BO access failed */
> +			break;
> +		case 0:
> +			*ptr = 0;
> +			__attribute__ ((fallthrough));
> +		default:
> +			igt_assert_f(false,
> +				     "Access to purged mmap should trigger
> SIGBUS, got sig=%d\n",
> +				     sig);
> +			break;
> +		}
> +
> +		signal(SIGBUS, old_sigbus);
> +		signal(SIGSEGV, old_sigsegv);
> +		munmap(map, bo_size);
> +	}
> +
> +	gem_close(fd, bo);
> +	xe_vm_destroy(fd, vm);
> +}
> +
> +int igt_main()
> +{
> +	struct drm_xe_engine_class_instance *hwe;
> +	int fd;
> +
> +	igt_fixture() {
> +		fd = drm_open_driver(DRIVER_XE);
> +		xe_device_get(fd);
> +	}
> +
> +	igt_subtest("dontneed-before-mmap")
> +		xe_for_each_engine(fd, hwe) {
> +			test_dontneed_before_mmap(fd, hwe);
> +			break;
> +		}
> +
> +	igt_fixture() {
> +		xe_device_put(fd);
> +		drm_close_driver(fd);
> +	}
> +}
Reviewed-by: Pravalika Gurram <pravalika.gurram@intel.com>
> diff --git a/tests/meson.build b/tests/meson.build index
> 0ad728b87..9d41d7de6 100644
> --- a/tests/meson.build
> +++ b/tests/meson.build
> @@ -313,6 +313,7 @@ intel_xe_progs = [
>  	'xe_huc_copy',
>  	'xe_intel_bb',
>  	'xe_live_ktest',
> +	'xe_madvise',
>  	'xe_media_fill',
>  	'xe_mmap',
>          'xe_module_load',
> --
> 2.43.0

RE: [PATCH i-g-t v3 4/8] tests/intel/xe_madvise: Add dontneed-after-mmap subtest

[Gurram, Pravalika]

> -----Original Message-----
> From: Yadav, Arvind <arvind.yadav@intel.com>
> Sent: Tuesday, 17 February, 2026 08:04 AM
> To: igt-dev@lists.freedesktop.org
> Cc: Brost, Matthew <matthew.brost@intel.com>; Ghimiray, Himal Prasad
> <himal.prasad.ghimiray@intel.com>; thomas.hellstrom@linux.intel.com;
> Sharma, Nishit <nishit.sharma@intel.com>; Gurram, Pravalika
> <pravalika.gurram@intel.com>
> Subject: [PATCH i-g-t v3 4/8] tests/intel/xe_madvise: Add dontneed-after-
> mmap subtest
> 
> This test verifies that an existing mmap becomes invalid after the BO is marked
> as purgeable and purged. The test creates a BO, maps it, writes data, then
> marks it DONTNEED and triggers memory pressure.
> Accessing the previously valid mapping should now trigger SIGBUS or SIGSEGV,
> confirming that existing mappings are correctly invalidated when the backing
> store is purged.
> 
> Cc: Nishit Sharma <nishit.sharma@intel.com>
> Cc: Pravalika Gurram <pravalika.gurram@intel.com>
> Cc: Matthew Brost <matthew.brost@intel.com>
> Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
> Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
> Signed-off-by: Arvind Yadav <arvind.yadav@intel.com>
> ---
>  tests/intel/xe_madvise.c | 54
> ++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 54 insertions(+)
> 
> diff --git a/tests/intel/xe_madvise.c b/tests/intel/xe_madvise.c index
> 7dbe70f42..5c6a24553 100644
> --- a/tests/intel/xe_madvise.c
> +++ b/tests/intel/xe_madvise.c
> @@ -196,6 +196,54 @@ static void test_dontneed_before_mmap(int fd,
> struct drm_xe_engine_class_instanc
>  	xe_vm_destroy(fd, vm);
>  }
> 
> +/**
> + * SUBTEST: dontneed-after-mmap
> + * Description: Mark BO as DONTNEED after mmap, verify SIGBUS on
> +accessing purged mapping
> + * Test category: functionality test
> + */
> +static void test_dontneed_after_mmap(int fd, struct
> +drm_xe_engine_class_instance *hwe) {
> +	uint32_t bo, vm;
> +	uint64_t addr = PURGEABLE_ADDR;
> +	size_t bo_size = PURGEABLE_BO_SIZE;
> +	void *map;
> +
> +	purgeable_setup_simple_bo(fd, &vm, &bo, addr, bo_size, true);
> +
> +	map = xe_bo_map(fd, bo, bo_size);
> +	memset(map, 0xAB, bo_size);
> +
> +	if (!purgeable_mark_and_verify_purged(fd, vm, addr, bo_size))
> +		igt_skip("Unable to induce purge on this platform/config");
> +
> +	/* Access purged mapping - should trigger SIGBUS/SIGSEGV */
> +	{
> +		sighandler_t old_sigsegv, old_sigbus;
> +		char *ptr = (char *)map;
> +		int sig;
> +
> +		old_sigsegv = signal(SIGSEGV, (__sighandler_t)sigtrap);
> +		old_sigbus = signal(SIGBUS, (__sighandler_t)sigtrap);
> +
> +		sig = sigsetjmp(jmp, SIGBUS | SIGSEGV);
> +		if (sig == SIGBUS || sig == SIGSEGV) {
> +			/* Expected - purged mapping access failed */
> +		} else if (sig == 0) {
> +			*ptr = 0;
> +			igt_assert_f(false, "Access to purged mapping should
> trigger signal\n");
> +		} else {
> +			igt_assert_f(false, "unexpected signal %d\n", sig);
> +		}
> +
> +		signal(SIGBUS, old_sigbus);
> +		signal(SIGSEGV, old_sigsegv);
> +	}
> +
> +	munmap(map, bo_size);
> +	gem_close(fd, bo);
> +	xe_vm_destroy(fd, vm);
> +}
> +
Reviewed-by: Pravalika Gurram <pravalika.gurram@intel.com>
>  int igt_main()
>  {
>  	struct drm_xe_engine_class_instance *hwe; @@ -212,6 +260,12 @@
> int igt_main()
>  			break;
>  		}
> 
> +	igt_subtest("dontneed-after-mmap")
> +		xe_for_each_engine(fd, hwe) {
> +			test_dontneed_after_mmap(fd, hwe);
> +			break;
> +		}
> +
>  	igt_fixture() {
>  		xe_device_put(fd);
>  		drm_close_driver(fd);
> --
> 2.43.0

RE: [PATCH i-g-t v3 5/8] tests/intel/xe_madvise: Add dontneed-before-exec subtest

[Gurram, Pravalika]

> -----Original Message-----
> From: Yadav, Arvind <arvind.yadav@intel.com>
> Sent: Tuesday, 17 February, 2026 08:04 AM
> To: igt-dev@lists.freedesktop.org
> Cc: Brost, Matthew <matthew.brost@intel.com>; Ghimiray, Himal Prasad
> <himal.prasad.ghimiray@intel.com>; thomas.hellstrom@linux.intel.com;
> Sharma, Nishit <nishit.sharma@intel.com>; Gurram, Pravalika
> <pravalika.gurram@intel.com>
> Subject: [PATCH i-g-t v3 5/8] tests/intel/xe_madvise: Add dontneed-before-
> exec subtest
> 
> This test validates GPU execution behavior when a data BO is purged before
> submission. The test creates a batch that writes to a data BO, purges the data
> BO (while keeping the batch BO valid to avoid GPU reset), then submits for
> execution. With VM_CREATE_FLAG_SCRATCH_PAGE, the GPU write may
> succeed by landing on scratch memory instead of the purged BO,
> demonstrating graceful handling of purged memory during GPU operations.
> 
> Cc: Nishit Sharma <nishit.sharma@intel.com>
> Cc: Pravalika Gurram <pravalika.gurram@intel.com>
> Cc: Matthew Brost <matthew.brost@intel.com>
> Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
> Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
> Signed-off-by: Arvind Yadav <arvind.yadav@intel.com>
> ---
>  tests/intel/xe_madvise.c | 140
> +++++++++++++++++++++++++++++++++++++++
>  1 file changed, 140 insertions(+)
> 
> diff --git a/tests/intel/xe_madvise.c b/tests/intel/xe_madvise.c index
> 5c6a24553..42cf1b3e5 100644
> --- a/tests/intel/xe_madvise.c
> +++ b/tests/intel/xe_madvise.c
> @@ -19,7 +19,11 @@
> 
>  /* Purgeable test constants */
>  #define PURGEABLE_ADDR		0x1a0000
> +#define PURGEABLE_BATCH_ADDR	0x3c0000
>  #define PURGEABLE_BO_SIZE	4096
> +#define PURGEABLE_FENCE_VAL	0xbeef
> +#define PURGEABLE_TEST_PATTERN	0xc0ffee
> +#define PURGEABLE_DEAD_PATTERN	0xdead
> 
>  /**
>   * trigger_memory_pressure - Fill VRAM + 25% to force purgeable reclaim @@
> -144,6 +148,62 @@ static void purgeable_setup_simple_bo(int fd, uint32_t
> *vm, uint32_t *bo,
>  	xe_wait_ufence(fd, &sync_val, 1, 0, NSEC_PER_SEC);  }
> 
> +/**
> + * purgeable_setup_batch_and_data - Setup VM with batch and data BOs
> +for GPU exec
> + * @fd: DRM file descriptor
> + * @vm: Output VM handle
> + * @bind_engine: Output bind engine handle
> + * @batch_bo: Output batch BO handle
> + * @data_bo: Output data BO handle
> + * @batch: Output batch buffer pointer
> + * @data: Output data buffer pointer
> + * @batch_addr: Batch virtual address
> + * @data_addr: Data virtual address
> + * @batch_size: Batch buffer size
> + * @data_size: Data buffer size
> + *
> + * Helper to create VM, bind engine, batch and data BOs, and bind them.
> + */
> +static void purgeable_setup_batch_and_data(int fd, uint32_t *vm,
> +					   uint32_t *bind_engine,
> +					   uint32_t *batch_bo,
> +					   uint32_t *data_bo,
> +					   uint32_t **batch,
> +					   uint32_t **data,
> +					   uint64_t batch_addr,
> +					   uint64_t data_addr,
> +					   size_t batch_size,
> +					   size_t data_size)
> +{
> +	struct drm_xe_sync sync = {
> +		.type = DRM_XE_SYNC_TYPE_USER_FENCE,
> +		.flags = DRM_XE_SYNC_FLAG_SIGNAL,
> +		.timeline_value = PURGEABLE_FENCE_VAL,
> +	};
> +	uint64_t vm_sync = 0;
> +
> +	*vm = xe_vm_create(fd, DRM_XE_VM_CREATE_FLAG_SCRATCH_PAGE,
> 0);
> +	*bind_engine = xe_bind_exec_queue_create(fd, *vm, 0);
> +
> +	/* Create and bind batch BO */
> +	*batch_bo = xe_bo_create(fd, *vm, batch_size, vram_if_possible(fd,
> 0),
> +
> DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);
> +	*batch = xe_bo_map(fd, *batch_bo, batch_size);
> +
> +	sync.addr = to_user_pointer(&vm_sync);
> +	xe_vm_bind_async(fd, *vm, *bind_engine, *batch_bo, 0, batch_addr,
> batch_size, &sync, 1);
> +	xe_wait_ufence(fd, &vm_sync, PURGEABLE_FENCE_VAL, 0,
> NSEC_PER_SEC);
> +
> +	/* Create and bind data BO */
> +	*data_bo = xe_bo_create(fd, *vm, data_size, vram_if_possible(fd, 0),
> +
> 	DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);
> +	*data = xe_bo_map(fd, *data_bo, data_size);
> +
> +	vm_sync = 0;
> +	xe_vm_bind_async(fd, *vm, *bind_engine, *data_bo, 0, data_addr,
> data_size, &sync, 1);
> +	xe_wait_ufence(fd, &vm_sync, PURGEABLE_FENCE_VAL, 0,
> NSEC_PER_SEC); }
> +
>  /**
>   * SUBTEST: dontneed-before-mmap
>   * Description: Mark BO as DONTNEED before mmap, verify mmap fails or
> SIGBUS on access @@ -244,6 +304,80 @@ static void
> test_dontneed_after_mmap(int fd, struct drm_xe_engine_class_instance
>  	xe_vm_destroy(fd, vm);
>  }
> 
> +/**
> + * SUBTEST: dontneed-before-exec
> + * Description: Mark BO as DONTNEED before GPU exec, verify GPU
> +behavior with SCRATCH_PAGE
> + * Test category: functionality test
> + */
> +static void test_dontneed_before_exec(int fd, struct
> +drm_xe_engine_class_instance *hwe) {
> +	uint32_t vm, exec_queue, bo, batch_bo, bind_engine;
> +	uint64_t data_addr = PURGEABLE_ADDR;
> +	uint64_t batch_addr = PURGEABLE_BATCH_ADDR;
> +	size_t data_size = PURGEABLE_BO_SIZE;
> +	size_t batch_size = PURGEABLE_BO_SIZE;
> +	struct drm_xe_sync sync[1] = {
> +		{ .type = DRM_XE_SYNC_TYPE_USER_FENCE,
> +		  .flags = DRM_XE_SYNC_FLAG_SIGNAL,
> +		  .timeline_value = PURGEABLE_FENCE_VAL },
> +	};
> +	struct drm_xe_exec exec = {
> +		.num_batch_buffer = 1,
> +		.num_syncs = 1,
> +		.syncs = to_user_pointer(sync),
> +	};
> +	uint32_t *data, *batch;
> +	uint64_t vm_sync = 0;
> +	int b, ret;
> +
> +	purgeable_setup_batch_and_data(fd, &vm, &bind_engine,
> &batch_bo,
> +				       &bo, &batch, &data, batch_addr,
> +				       data_addr, batch_size, data_size);
> +
> +	/* Prepare batch */
> +	b = 0;
> +	batch[b++] = MI_STORE_DWORD_IMM_GEN4;
> +	batch[b++] = data_addr;
> +	batch[b++] = data_addr >> 32;
> +	batch[b++] = PURGEABLE_DEAD_PATTERN;
> +	batch[b++] = MI_BATCH_BUFFER_END;
> +
> +	/* Phase 1: Purge data BO, batch BO still valid */
> +	igt_assert(purgeable_mark_and_verify_purged(fd, vm, data_addr,
> +data_size));
> +
> +	exec_queue = xe_exec_queue_create(fd, vm, hwe, 0);
> +	exec.exec_queue_id = exec_queue;
> +	exec.address = batch_addr;
> +
> +	vm_sync = 0;
> +	sync[0].addr = to_user_pointer(&vm_sync);
> +
> +	/*
> +	 * VM has SCRATCH_PAGE — exec may succeed with the GPU write
> +	 * landing on scratch instead of the purged data BO.
> +	 */
> +	ret = __xe_exec(fd, &exec);
> +	if (ret == 0) {
> +		int64_t timeout = NSEC_PER_SEC;
> +
> +		__xe_wait_ufence(fd, &vm_sync, PURGEABLE_FENCE_VAL,
> +				 exec_queue, &timeout);
> +	}
> +
> +	/*
> +	 * Don't purge the batch BO — GPU would fetch zeroed scratch
> +	 * instructions and trigger an engine reset.
> +	 */
> +
> +	munmap(data, data_size);
> +	munmap(batch, batch_size);
> +	gem_close(fd, bo);
> +	gem_close(fd, batch_bo);
> +	xe_exec_queue_destroy(fd, bind_engine);
> +	xe_exec_queue_destroy(fd, exec_queue);
> +	xe_vm_destroy(fd, vm);
> +}
> +
>  int igt_main()
>  {
>  	struct drm_xe_engine_class_instance *hwe; @@ -266,6 +400,12 @@
> int igt_main()
>  			break;
>  		}
> 
> +	igt_subtest("dontneed-before-exec")
> +		xe_for_each_engine(fd, hwe) {
> +			test_dontneed_before_exec(fd, hwe);
> +			break;
> +		}
> +
>  	igt_fixture() {
>  		xe_device_put(fd);
>  		drm_close_driver(fd);
Reviewed-by: Pravalika Gurram <pravalika.gurram@intel.com>
> --
> 2.43.0

RE: [PATCH i-g-t v3 6/8] tests/intel/xe_madvise: Add dontneed-after-exec subtest

[Gurram, Pravalika]

> -----Original Message-----
> From: Yadav, Arvind <arvind.yadav@intel.com>
> Sent: Tuesday, 17 February, 2026 08:04 AM
> To: igt-dev@lists.freedesktop.org
> Cc: Brost, Matthew <matthew.brost@intel.com>; Ghimiray, Himal Prasad
> <himal.prasad.ghimiray@intel.com>; thomas.hellstrom@linux.intel.com;
> Sharma, Nishit <nishit.sharma@intel.com>; Gurram, Pravalika
> <pravalika.gurram@intel.com>
> Subject: [PATCH i-g-t v3 6/8] tests/intel/xe_madvise: Add dontneed-after-exec
> subtest
> 
> This test verifies that memory can be marked purgeable and reclaimed after
> successful GPU execution. The test first executes a batch that writes to a data
> BO and verifies the result. It then marks the BO as DONTNEED, triggers
> memory pressure to purge it, and attempts a second execution. The second
> execution may fail or succeed with scratch rebind, validating that the kernel
> correctly handles purged BOs in GPU submissions.
> 
> Cc: Nishit Sharma <nishit.sharma@intel.com>
> Cc: Pravalika Gurram <pravalika.gurram@intel.com>
> Cc: Matthew Brost <matthew.brost@intel.com>
> Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
> Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
> Signed-off-by: Arvind Yadav <arvind.yadav@intel.com>
> ---
>  tests/intel/xe_madvise.c | 93
> ++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 93 insertions(+)
> 
> diff --git a/tests/intel/xe_madvise.c b/tests/intel/xe_madvise.c index
> 42cf1b3e5..51ef4fad3 100644
> --- a/tests/intel/xe_madvise.c
> +++ b/tests/intel/xe_madvise.c
> @@ -16,6 +16,7 @@
> 
>  #include "xe/xe_ioctl.h"
>  #include "xe/xe_query.h"
> +#include "lib/igt_syncobj.h"
> 
>  /* Purgeable test constants */
>  #define PURGEABLE_ADDR		0x1a0000
> @@ -378,6 +379,92 @@ static void test_dontneed_before_exec(int fd, struct
> drm_xe_engine_class_instanc
>  	xe_vm_destroy(fd, vm);
>  }
> 
> +/**
> + * SUBTEST: dontneed-after-exec
> + * Description: Mark BO as DONTNEED after GPU exec, verify memory
> +becomes inaccessible
> + * Test category: functionality test
> + */
> +static void test_dontneed_after_exec(int fd, struct
> +drm_xe_engine_class_instance *hwe) {
> +	uint32_t vm, exec_queue, bo, batch_bo, bind_engine;
> +	uint64_t data_addr = PURGEABLE_ADDR;
> +	uint64_t batch_addr = PURGEABLE_BATCH_ADDR;
> +	size_t data_size = PURGEABLE_BO_SIZE;
> +	size_t batch_size = PURGEABLE_BO_SIZE;
> +	struct drm_xe_sync sync[2] = {
> +		{ .type = DRM_XE_SYNC_TYPE_USER_FENCE,
> +		  .flags = DRM_XE_SYNC_FLAG_SIGNAL,
> +		  .timeline_value = PURGEABLE_FENCE_VAL },
> +		{ .type = DRM_XE_SYNC_TYPE_SYNCOBJ,
> +		  .flags = DRM_XE_SYNC_FLAG_SIGNAL },
> +	};
> +	struct drm_xe_exec exec = {
> +		.num_batch_buffer = 1,
> +		.num_syncs = 2,
> +		.syncs = to_user_pointer(sync),
> +	};
> +	uint32_t *data, *batch;
> +	uint32_t syncobj;
> +	int b, ret;
> +
> +	purgeable_setup_batch_and_data(fd, &vm, &bind_engine,
> &batch_bo,
> +				       &bo, &batch, &data, batch_addr,
> +				       data_addr, batch_size, data_size);
> +	memset(data, 0, data_size);
> +
> +	syncobj = syncobj_create(fd, 0);
> +
> +	/* Prepare batch to write to data BO */
> +	b = 0;
> +	batch[b++] = MI_STORE_DWORD_IMM_GEN4;
> +	batch[b++] = data_addr;
> +	batch[b++] = data_addr >> 32;
> +	batch[b++] = 0xfeed0001;
> +	batch[b++] = MI_BATCH_BUFFER_END;
> +
> +	exec_queue = xe_exec_queue_create(fd, vm, hwe, 0);
> +	exec.exec_queue_id = exec_queue;
> +	exec.address = batch_addr;
> +
> +	/* Use only syncobj for exec (not USER_FENCE) */
> +	sync[1].handle = syncobj;
> +	exec.num_syncs = 1;
> +	exec.syncs = to_user_pointer(&sync[1]);
> +
> +	ret = __xe_exec(fd, &exec);
> +	igt_assert_eq(ret, 0);
> +
> +	igt_assert(syncobj_wait(fd, &syncobj, 1, INT64_MAX, 0, NULL));
> +	munmap(data, data_size);
> +	data = xe_bo_map(fd, bo, data_size);
> +	igt_assert_eq(data[0], 0xfeed0001);
> +
> +	igt_assert(purgeable_mark_and_verify_purged(fd, vm, data_addr,
> +data_size));
> +
> +	/* Prepare second batch (different value) */
> +	b = 0;
> +	batch[b++] = MI_STORE_DWORD_IMM_GEN4;
> +	batch[b++] = data_addr;
> +	batch[b++] = data_addr >> 32;
> +	batch[b++] = 0xfeed0002;
> +	batch[b++] = MI_BATCH_BUFFER_END;
> +
> +	ret = __xe_exec(fd, &exec);
> +	if (ret == 0) {
> +		/* Exec succeeded, but wait may fail on purged BO (both
> behaviors valid) */
> +		syncobj_wait(fd, &syncobj, 1, INT64_MAX, 0, NULL);
> +	}
> +
> +	munmap(data, data_size);
> +	munmap(batch, batch_size);
> +	gem_close(fd, bo);
> +	gem_close(fd, batch_bo);
> +	syncobj_destroy(fd, syncobj);
> +	xe_exec_queue_destroy(fd, bind_engine);
> +	xe_exec_queue_destroy(fd, exec_queue);
> +	xe_vm_destroy(fd, vm);
> +}
> +
>  int igt_main()
>  {
>  	struct drm_xe_engine_class_instance *hwe; @@ -406,6 +493,12 @@
> int igt_main()
>  			break;
>  		}
> 
> +	igt_subtest("dontneed-after-exec")
> +		xe_for_each_engine(fd, hwe) {
> +			test_dontneed_after_exec(fd, hwe);
> +			break;
> +		}
> +
Reviewed-by: Pravalika Gurram <pravalika.gurram@intel.com>
>  	igt_fixture() {
>  		xe_device_put(fd);
>  		drm_close_driver(fd);
> --
> 2.43.0

RE: [PATCH i-g-t v3 7/8] tests/intel/xe_madvise: Add per-vma-tracking subtest

[Gurram, Pravalika]

> -----Original Message-----
> From: Yadav, Arvind <arvind.yadav@intel.com>
> Sent: Tuesday, 17 February, 2026 08:04 AM
> To: igt-dev@lists.freedesktop.org
> Cc: Brost, Matthew <matthew.brost@intel.com>; Ghimiray, Himal Prasad
> <himal.prasad.ghimiray@intel.com>; thomas.hellstrom@linux.intel.com;
> Sharma, Nishit <nishit.sharma@intel.com>; Gurram, Pravalika
> <pravalika.gurram@intel.com>
> Subject: [PATCH i-g-t v3 7/8] tests/intel/xe_madvise: Add per-vma-tracking
> subtest
> 
> This test validates that purgeable state is tracked per-VMA when a single BO is
> bound in multiple VMs. The test creates one BO shared across two VMs at
> different virtual addresses. It verifies that marking only one VMA as
> DONTNEED does not make the BO purgeable, but marking both VMAs as
> DONTNEED allows the kernel to purge the shared BO. This ensures proper per-
> VMA tracking for shared memory.
> 
> Cc: Nishit Sharma <nishit.sharma@intel.com>
> Cc: Pravalika Gurram <pravalika.gurram@intel.com>
> Cc: Matthew Brost <matthew.brost@intel.com>
> Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
> Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
> Signed-off-by: Arvind Yadav <arvind.yadav@intel.com>
> ---
>  tests/intel/xe_madvise.c | 109
> +++++++++++++++++++++++++++++++++++++++
>  1 file changed, 109 insertions(+)
> 
> diff --git a/tests/intel/xe_madvise.c b/tests/intel/xe_madvise.c index
> 51ef4fad3..4e7df54a7 100644
> --- a/tests/intel/xe_madvise.c
> +++ b/tests/intel/xe_madvise.c
> @@ -20,6 +20,7 @@
> 
>  /* Purgeable test constants */
>  #define PURGEABLE_ADDR		0x1a0000
> +#define PURGEABLE_ADDR2		0x2b0000
>  #define PURGEABLE_BATCH_ADDR	0x3c0000
>  #define PURGEABLE_BO_SIZE	4096
>  #define PURGEABLE_FENCE_VAL	0xbeef
> @@ -205,6 +206,58 @@ static void purgeable_setup_batch_and_data(int fd,
> uint32_t *vm,
>  	xe_wait_ufence(fd, &vm_sync, PURGEABLE_FENCE_VAL, 0,
> NSEC_PER_SEC);  }
> 
> +/**
> + * purgeable_setup_two_vms_shared_bo - Setup two VMs with one shared
> BO
> + * @fd: DRM file descriptor
> + * @vm1: Output first VM handle
> + * @vm2: Output second VM handle
> + * @bo: Output shared BO handle
> + * @addr1: Virtual address in VM1
> + * @addr2: Virtual address in VM2
> + * @size: Size of the BO
> + * @use_scratch: Whether to use scratch page flag for VMs
> + *
> + * Helper to create two VMs and bind one shared BO in both VMs.
> + * Returns mapped pointer to the BO.
> + */
> +static void *purgeable_setup_two_vms_shared_bo(int fd, uint32_t *vm1,
> uint32_t *vm2,
> +					       uint32_t *bo, uint64_t addr1,
> +					       uint64_t addr2, size_t size,
> +					       bool use_scratch)
> +{
> +	struct drm_xe_sync sync = {
> +		.type = DRM_XE_SYNC_TYPE_USER_FENCE,
> +		.flags = DRM_XE_SYNC_FLAG_SIGNAL,
> +		.timeline_value = 1,
> +	};
> +	uint64_t sync_val = 0;
> +	void *map;
> +
> +	/* Create two VMs */
> +	*vm1 = xe_vm_create(fd, use_scratch ?
> DRM_XE_VM_CREATE_FLAG_SCRATCH_PAGE : 0, 0);
> +	*vm2 = xe_vm_create(fd, use_scratch ?
> +DRM_XE_VM_CREATE_FLAG_SCRATCH_PAGE : 0, 0);
> +
> +	/* Create shared BO */
> +	*bo = xe_bo_create(fd, 0, size, vram_if_possible(fd, 0),
> +
> DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);
> +
> +	map = xe_bo_map(fd, *bo, size);
> +	memset(map, 0xAB, size);
> +
> +	/* Bind BO in VM1 */
> +	sync.addr = to_user_pointer(&sync_val);
> +	sync_val = 0;
> +	xe_vm_bind_async(fd, *vm1, 0, *bo, 0, addr1, size, &sync, 1);
> +	xe_wait_ufence(fd, &sync_val, 1, 0, NSEC_PER_SEC);
> +
> +	/* Bind BO in VM2 */
> +	sync_val = 0;
> +	xe_vm_bind_async(fd, *vm2, 0, *bo, 0, addr2, size, &sync, 1);
> +	xe_wait_ufence(fd, &sync_val, 1, 0, NSEC_PER_SEC);
> +
> +	return map;
> +}
> +
>  /**
>   * SUBTEST: dontneed-before-mmap
>   * Description: Mark BO as DONTNEED before mmap, verify mmap fails or
> SIGBUS on access @@ -465,6 +518,56 @@ static void
> test_dontneed_after_exec(int fd, struct drm_xe_engine_class_instance
>  	xe_vm_destroy(fd, vm);
>  }
> 
> +/**
> + * SUBTEST: per-vma-tracking
> + * Description: One BO in two VMs becomes purgeable only when both
> VMAs
> +are DONTNEED
> + * Test category: functionality test
> + */
> +static void test_per_vma_tracking(int fd, struct
> +drm_xe_engine_class_instance *hwe) {
> +	uint32_t bo, vm1, vm2;
> +	uint64_t addr1 = PURGEABLE_ADDR;
> +	uint64_t addr2 = PURGEABLE_ADDR2;
> +	size_t bo_size = PURGEABLE_BO_SIZE;
> +	uint32_t retained;
> +	void *map;
> +
> +	map = purgeable_setup_two_vms_shared_bo(fd, &vm1, &vm2, &bo,
> +						addr1, addr2,
> +						bo_size, false);
> +
> +	/* Mark VMA1 as DONTNEED */
> +	retained = xe_vm_madvise_purgeable(fd, vm1, addr1, bo_size,
> +
> DRM_XE_VMA_PURGEABLE_STATE_DONTNEED);
> +	igt_assert_eq(retained, 1);
> +
> +	/* Verify BO NOT purgeable (VMA2 still WILLNEED) */
> +	retained = xe_vm_madvise_purgeable(fd, vm1, addr1, bo_size,
> +
> DRM_XE_VMA_PURGEABLE_STATE_WILLNEED);
> +	igt_assert_eq(retained, 1);
> +
> +	/* Mark both VMAs as DONTNEED */
> +	retained = xe_vm_madvise_purgeable(fd, vm1, addr1, bo_size,
> +
> DRM_XE_VMA_PURGEABLE_STATE_DONTNEED);
> +	igt_assert_eq(retained, 1);
> +
> +	retained = xe_vm_madvise_purgeable(fd, vm2, addr2, bo_size,
> +
> DRM_XE_VMA_PURGEABLE_STATE_DONTNEED);
> +	igt_assert_eq(retained, 1);
> +
> +	/* Trigger pressure and verify BO was purged */
> +	trigger_memory_pressure(fd, vm1);
> +
> +	retained = xe_vm_madvise_purgeable(fd, vm1, addr1, bo_size,
> +
> DRM_XE_VMA_PURGEABLE_STATE_WILLNEED);
> +	igt_assert_eq(retained, 0);
> +
> +	munmap(map, bo_size);
> +	gem_close(fd, bo);
> +	xe_vm_destroy(fd, vm1);
> +	xe_vm_destroy(fd, vm2);
> +}
> +
>  int igt_main()
>  {
>  	struct drm_xe_engine_class_instance *hwe; @@ -499,6 +602,12 @@
> int igt_main()
>  			break;
>  		}
> 
> +	igt_subtest("per-vma-tracking")
> +		xe_for_each_engine(fd, hwe) {
> +			test_per_vma_tracking(fd, hwe);
> +			break;
> +		}
> +
Reviewed-by: Pravalika Gurram <pravalika.gurram@intel.com>
>  	igt_fixture() {
>  		xe_device_put(fd);
>  		drm_close_driver(fd);
> --
> 2.43.0

RE: [PATCH i-g-t v3 8/8] tests/intel/xe_madvise: Add per-vma-protection subtest

[Gurram, Pravalika]

> -----Original Message-----
> From: Yadav, Arvind <arvind.yadav@intel.com>
> Sent: Tuesday, 17 February, 2026 08:04 AM
> To: igt-dev@lists.freedesktop.org
> Cc: Brost, Matthew <matthew.brost@intel.com>; Ghimiray, Himal Prasad
> <himal.prasad.ghimiray@intel.com>; thomas.hellstrom@linux.intel.com;
> Sharma, Nishit <nishit.sharma@intel.com>; Gurram, Pravalika
> <pravalika.gurram@intel.com>
> Subject: [PATCH i-g-t v3 8/8] tests/intel/xe_madvise: Add per-vma-protection
> subtest
> 
> This test validates that a WILLNEED VMA protects a shared BO from being
> purged even when other VMAs are marked DONTNEED. The test creates a BO
> shared across two VMs, marks VMA1 as DONTNEED while keeping VMA2 as
> WILLNEED, then triggers memory pressure. The BO should survive and GPU
> execution should succeed. After marking both VMAs as DONTNEED and
> triggering pressure again, the BO should be purged, demonstrating that all
> VMAs must be DONTNEED for the BO to be purgeable.
> 
> Cc: Nishit Sharma <nishit.sharma@intel.com>
> Cc: Pravalika Gurram <pravalika.gurram@intel.com>
> Cc: Matthew Brost <matthew.brost@intel.com>
> Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
> Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
> Signed-off-by: Arvind Yadav <arvind.yadav@intel.com>
> ---
>  tests/intel/xe_madvise.c | 116
> +++++++++++++++++++++++++++++++++++++++
>  1 file changed, 116 insertions(+)
> 
> diff --git a/tests/intel/xe_madvise.c b/tests/intel/xe_madvise.c index
> 4e7df54a7..2e512edc4 100644
> --- a/tests/intel/xe_madvise.c
> +++ b/tests/intel/xe_madvise.c
> @@ -568,6 +568,116 @@ static void test_per_vma_tracking(int fd, struct
> drm_xe_engine_class_instance *h
>  	xe_vm_destroy(fd, vm2);
>  }
> 
> +/**
> + * SUBTEST: per-vma-protection
> + * Description: WILLNEED VMA protects BO from purging; both DONTNEED
> +makes BO purgeable
> + * Test category: functionality test
> + */
> +static void test_per_vma_protection(int fd, struct
> +drm_xe_engine_class_instance *hwe) {
> +	uint32_t vm1, vm2, exec_queue, bo, batch_bo, bind_engine;
> +	uint64_t data_addr1 = PURGEABLE_ADDR;
> +	uint64_t data_addr2 = PURGEABLE_ADDR2;
> +	uint64_t batch_addr = PURGEABLE_BATCH_ADDR;
> +	size_t data_size = PURGEABLE_BO_SIZE;
> +	size_t batch_size = PURGEABLE_BO_SIZE;
> +	struct drm_xe_sync sync[2] = {
> +		{ .type = DRM_XE_SYNC_TYPE_USER_FENCE,
> +		  .flags = DRM_XE_SYNC_FLAG_SIGNAL,
> +		  .timeline_value = PURGEABLE_FENCE_VAL },
> +		{ .type = DRM_XE_SYNC_TYPE_SYNCOBJ,
> +		  .flags = DRM_XE_SYNC_FLAG_SIGNAL },
> +	};
> +	struct drm_xe_exec exec = {
> +		.num_batch_buffer = 1,
> +		.num_syncs = 1,
> +		.syncs = to_user_pointer(&sync[1]),
> +	};
> +	uint32_t *data, *batch;
> +	uint64_t vm_sync = 0;
> +	uint32_t retained, syncobj;
> +	int b, ret;
> +
> +	/* Create two VMs and bind shared data BO */
> +	data = purgeable_setup_two_vms_shared_bo(fd, &vm1, &vm2, &bo,
> +						 data_addr1, data_addr2,
> +						 data_size, true);
> +	memset(data, 0, data_size);
> +	bind_engine = xe_bind_exec_queue_create(fd, vm2, 0);
> +
> +	/* Create and bind batch BO in VM2 */
> +	batch_bo = xe_bo_create(fd, vm2, batch_size, vram_if_possible(fd, 0),
> +
> 	DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);
> +	batch = xe_bo_map(fd, batch_bo, batch_size);
> +
> +	sync[0].addr = to_user_pointer(&vm_sync);
> +	vm_sync = 0;
> +	xe_vm_bind_async(fd, vm2, bind_engine, batch_bo, 0, batch_addr,
> batch_size, sync, 1);
> +	xe_wait_ufence(fd, &vm_sync, PURGEABLE_FENCE_VAL, 0,
> NSEC_PER_SEC);
> +
> +	/* Mark VMA1 as DONTNEED, VMA2 stays WILLNEED */
> +	retained = xe_vm_madvise_purgeable(fd, vm1, data_addr1, data_size,
> +
> DRM_XE_VMA_PURGEABLE_STATE_DONTNEED);
> +	igt_assert_eq(retained, 1);
> +
> +	/* Trigger pressure - BO should survive (VMA2 protects) */
> +	trigger_memory_pressure(fd, vm1);
> +
> +	retained = xe_vm_madvise_purgeable(fd, vm2, data_addr2, data_size,
> +
> DRM_XE_VMA_PURGEABLE_STATE_WILLNEED);
> +	igt_assert_eq(retained, 1);
> +
> +	/* GPU workload - should succeed */
> +	b = 0;
> +	batch[b++] = MI_STORE_DWORD_IMM_GEN4;
> +	batch[b++] = data_addr2;
> +	batch[b++] = data_addr2 >> 32;
> +	batch[b++] = PURGEABLE_TEST_PATTERN;
> +	batch[b++] = MI_BATCH_BUFFER_END;
> +
> +	syncobj = syncobj_create(fd, 0);
> +	sync[1].handle = syncobj;
> +	exec_queue = xe_exec_queue_create(fd, vm2, hwe, 0);
> +	exec.exec_queue_id = exec_queue;
> +	exec.address = batch_addr;
> +
> +	ret = __xe_exec(fd, &exec);
> +	igt_assert_eq(ret, 0);
> +	igt_assert(syncobj_wait(fd, &syncobj, 1, INT64_MAX, 0, NULL));
> +
> +	munmap(data, data_size);
> +	data = xe_bo_map(fd, bo, data_size);
> +	igt_assert_eq(data[0], PURGEABLE_TEST_PATTERN);
> +
> +	/* Mark both VMAs DONTNEED */
> +	retained = xe_vm_madvise_purgeable(fd, vm2, data_addr2, data_size,
> +
> DRM_XE_VMA_PURGEABLE_STATE_DONTNEED);
> +	igt_assert_eq(retained, 1);
> +
> +	/* Trigger pressure - BO should be purged */
> +	trigger_memory_pressure(fd, vm1);
> +
> +	retained = xe_vm_madvise_purgeable(fd, vm2, data_addr2, data_size,
> +
> DRM_XE_VMA_PURGEABLE_STATE_WILLNEED);
> +	igt_assert_eq(retained, 0);
> +
> +	/* GPU workload - should fail or succeed with NULL rebind */
> +	batch[3] = PURGEABLE_DEAD_PATTERN;
> +
> +	ret = __xe_exec(fd, &exec);
> +	/* Exec on purged BO — may succeed (scratch rebind) or fail, both OK
> +*/
> +
> +	munmap(data, data_size);
> +	munmap(batch, batch_size);
> +	gem_close(fd, bo);
> +	gem_close(fd, batch_bo);
> +	syncobj_destroy(fd, syncobj);
> +	xe_exec_queue_destroy(fd, bind_engine);
> +	xe_exec_queue_destroy(fd, exec_queue);
> +	xe_vm_destroy(fd, vm1);
> +	xe_vm_destroy(fd, vm2);
> +}
> +
>  int igt_main()
>  {
>  	struct drm_xe_engine_class_instance *hwe; @@ -608,6 +718,12 @@
> int igt_main()
>  			break;
>  		}
> 
> +	igt_subtest("per-vma-protection")
> +		xe_for_each_engine(fd, hwe) {
> +			test_per_vma_protection(fd, hwe);
> +			break;
> +		}
> +
Reviewed-by: Pravalika Gurram <pravalika.gurram@intel.com>
>  	igt_fixture() {
>  		xe_device_put(fd);
>  		drm_close_driver(fd);
> --
> 2.43.0

Re: [PATCH i-g-t v3 3/8] tests/intel/xe_madvise: Add dontneed-before-mmap subtest

[Sharma, Nishit]

[-- Attachment #1: Type: text/plain, Size: 8777 bytes --]


On 2/23/2026 10:39 AM, Gurram, Pravalika wrote:
>
>> -----Original Message-----
>> From: Yadav, Arvind<arvind.yadav@intel.com>
>> Sent: Tuesday, 17 February, 2026 08:04 AM
>> To:igt-dev@lists.freedesktop.org
>> Cc: Brost, Matthew<matthew.brost@intel.com>; Ghimiray, Himal Prasad
>> <himal.prasad.ghimiray@intel.com>;thomas.hellstrom@linux.intel.com;
>> Sharma, Nishit<nishit.sharma@intel.com>; Gurram, Pravalika
>> <pravalika.gurram@intel.com>
>> Subject: [PATCH i-g-t v3 3/8] tests/intel/xe_madvise: Add dontneed-before-
>> mmap subtest
>>
>> This test validates kernel behavior when mapping a BO that was already
>> marked as purgeable and purged before mmap. After purging the BO under
>> memory pressure, the test attempts to mmap and access it. The kernel should
>> trigger SIGBUS or SIGSEGV when accessing the purged mapping, confirming
>> that purged memory is properly invalidated.
>>
>> Cc: Nishit Sharma<nishit.sharma@intel.com>
>> Cc: Pravalika Gurram<pravalika.gurram@intel.com>
>> Cc: Matthew Brost<matthew.brost@intel.com>
>> Cc: Thomas Hellström<thomas.hellstrom@linux.intel.com>
>> Cc: Himal Prasad Ghimiray<himal.prasad.ghimiray@intel.com>
>> Signed-off-by: Arvind Yadav<arvind.yadav@intel.com>
>> ---
>>   tests/intel/xe_madvise.c | 219
>> +++++++++++++++++++++++++++++++++++++++
>>   tests/meson.build        |   1 +
>>   2 files changed, 220 insertions(+)
>>   create mode 100644 tests/intel/xe_madvise.c
>>
>> diff --git a/tests/intel/xe_madvise.c b/tests/intel/xe_madvise.c new file mode
>> 100644 index 000000000..7dbe70f42
>> --- /dev/null
>> +++ b/tests/intel/xe_madvise.c
>> @@ -0,0 +1,219 @@
>> +// SPDX-License-Identifier: MIT
>> +/*
>> + * Copyright © 2025 Intel Corporation
>> + */
>> +
>> +/**
>> + * TEST: Validate purgeable BO madvise functionality
>> + * Category: Core
>> + * Mega feature: General Core features
>> + * Sub-category: Memory management tests
>> + * Functionality: madvise, purgeable
>> + */
>> +
>> +#include "igt.h"
>> +#include "xe_drm.h"
>> +
>> +#include "xe/xe_ioctl.h"
>> +#include "xe/xe_query.h"
>> +
>> +/* Purgeable test constants */
>> +#define PURGEABLE_ADDR		0x1a0000
>> +#define PURGEABLE_BO_SIZE	4096
>> +
>> +/**
>> + * trigger_memory_pressure - Fill VRAM + 25% to force purgeable reclaim
>> + * @fd: DRM file descriptor
>> + * @vm: VM handle (unused, kept for API compatibility)
>> + *
>> + * Allocates BOs in a temporary VM until VRAM is overcommitted,
>> + * forcing the kernel to purge DONTNEED-marked BOs.
>> + */
>> +static void trigger_memory_pressure(int fd, uint32_t vm) {
>> +	uint64_t vram_size, overpressure;
>> +	const uint64_t chunk = 8ull << 20; /* 8 MiB */
>> +	int max_objs, n = 0;
>> +	uint32_t *handles;
>> +	uint64_t total;
>> +	void *p;
>> +	uint32_t handle, temp_vm;
>> +
>> +	/* Use a separate VM so pressure BOs don't affect the test VM */
>> +	temp_vm = xe_vm_create(fd, 0, 0);
>> +
>> +	vram_size = xe_visible_vram_size(fd, 0);
>> +	/* Scale overpressure to 25% of VRAM, minimum 64MB */
>> +	overpressure = vram_size / 4;
>> +	if (overpressure < (64 << 20))
>> +		overpressure = 64 << 20;
>> +
>> +	max_objs = (vram_size + overpressure) / chunk + 1;
>> +	handles = malloc(max_objs * sizeof(*handles));
>> +	igt_assert(handles);
>> +
>> +	total = 0;
>> +	while (total < vram_size + overpressure && n < max_objs) {
>> +		handle = xe_bo_create(fd, temp_vm, chunk,
>> +				      vram_if_possible(fd, 0),
>> +
>> DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);
>> +		handles[n++] = handle;
>> +		total += chunk;
>> +
>> +		p = xe_bo_map(fd, handle, chunk);
>> +		igt_assert(p != MAP_FAILED);
>> +
>> +		/* Fault in all pages so they actually consume VRAM */
>> +		memset(p, 0xCD, chunk);
>> +		munmap(p, chunk);
>> +	}
>> +
>> +	/* Allow shrinker time to process pressure */
>> +	usleep(100000);
>> +
>> +	for (int i = 0; i < n; i++)
>> +		gem_close(fd, handles[i]);
>> +
>> +	free(handles);
>> +
>> +	xe_vm_destroy(fd, temp_vm);
>> +}
>> +
>> +static jmp_buf jmp;
>> +
>> +__noreturn static void sigtrap(int sig) {
>> +	siglongjmp(jmp, sig);
>> +}
>> +
>> +/**
>> + * purgeable_mark_and_verify_purged - Mark DONTNEED, pressure, check
>> +purged
>> + * @fd: DRM file descriptor
>> + * @vm: VM handle
>> + * @addr: Virtual address of the BO
>> + * @size: Size of the BO
>> + *
>> + * Returns true if the BO was purged under memory pressure.
>> + */
>> +static bool purgeable_mark_and_verify_purged(int fd, uint32_t vm,
>> +uint64_t addr, size_t size) {
>> +	uint32_t retained;
>> +
>> +	/* Mark as DONTNEED */
>> +	retained = xe_vm_madvise_purgeable(fd, vm, addr, size,
>> +
>> DRM_XE_VMA_PURGEABLE_STATE_DONTNEED);
>> +	if (retained != 1)
>> +		return false;
>> +
>> +	/* Trigger memory pressure */
>> +	trigger_memory_pressure(fd, vm);
>> +
>> +	/* Verify purged */
>> +	retained = xe_vm_madvise_purgeable(fd, vm, addr, size,
>> +
>> DRM_XE_VMA_PURGEABLE_STATE_WILLNEED);
>> +	return retained == 0;
>> +}
>> +
>> +/**
>> + * purgeable_setup_simple_bo - Setup VM and bind a single BO
>> + * @fd: DRM file descriptor
>> + * @vm: Output VM handle
>> + * @bo: Output BO handle
>> + * @addr: Virtual address to bind at
>> + * @size: Size of the BO
>> + * @use_scratch: Whether to use scratch page flag
>> + *
>> + * Helper to create VM, BO, and bind it at the specified address.
>> + */
>> +static void purgeable_setup_simple_bo(int fd, uint32_t *vm, uint32_t *bo,
>> +				      uint64_t addr, size_t size, bool
>> use_scratch) {
>> +	struct drm_xe_sync sync = {
>> +		.type = DRM_XE_SYNC_TYPE_USER_FENCE,
>> +		.flags = DRM_XE_SYNC_FLAG_SIGNAL,
>> +		.timeline_value = 1,
>> +	};
>> +	uint64_t sync_val = 0;
>> +
>> +	*vm = xe_vm_create(fd, use_scratch ?
>> DRM_XE_VM_CREATE_FLAG_SCRATCH_PAGE : 0, 0);
>> +	*bo = xe_bo_create(fd, *vm, size, vram_if_possible(fd, 0),
>> +
>> DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);
>> +
>> +	sync.addr = to_user_pointer(&sync_val);
>> +	xe_vm_bind_async(fd, *vm, 0, *bo, 0, addr, size, &sync, 1);
>> +	xe_wait_ufence(fd, &sync_val, 1, 0, NSEC_PER_SEC); }
>> +
>> +/**
>> + * SUBTEST: dontneed-before-mmap
>> + * Description: Mark BO as DONTNEED before mmap, verify mmap fails or
>> +SIGBUS on access
>> + * Test category: functionality test
>> + */
>> +static void test_dontneed_before_mmap(int fd, struct
>> +drm_xe_engine_class_instance *hwe) {
>> +	uint32_t bo, vm;
>> +	uint64_t addr = PURGEABLE_ADDR;
>> +	size_t bo_size = PURGEABLE_BO_SIZE;
>> +	void *map;
>> +
>> +	purgeable_setup_simple_bo(fd, &vm, &bo, addr, bo_size, false);
>> +	if (!purgeable_mark_and_verify_purged(fd, vm, addr, bo_size))
>> +		igt_skip("Unable to induce purge on this platform/config");
No cleanup before igt_skip() or it's handled somewhere. gem_close(fd, 
bo) and xe_vm_destroy(fd, vm);
>> +
>> +	/* mmap the purged BO - access should trigger SIGBUS */
>> +	map = xe_bo_map(fd, bo, bo_size);
Should check igt_assert(map != MAP_FAILED) before using it below.
>> +
>> +	{
>> +		sighandler_t old_sigsegv, old_sigbus;
>> +		char *ptr = (char *)map;
>> +		int sig;
>> +
>> +		old_sigsegv = signal(SIGSEGV, (__sighandler_t)sigtrap);
>> +		old_sigbus = signal(SIGBUS, (__sighandler_t)sigtrap);
>> +
>> +		sig = sigsetjmp(jmp, SIGBUS | SIGSEGV);
>> +		switch (sig) {
>> +		case SIGBUS:
>> +		case SIGSEGV:
>> +			/* Expected - purged BO access failed */
>> +			break;
>> +		case 0:
>> +			*ptr = 0;
>> +			__attribute__ ((fallthrough));

why this __attribute__? Any compiler warning? Can't it be handled like

case 0:

default:

     *ptr = 0;

igt_assert_f(false, "Access to purged mmap should trigger SIGBUS, got 
sig=%d\n", sig);

break;

as you are doing intentional fallout from case 0 to default?

>> +		default:
>> +			igt_assert_f(false,
>> +				     "Access to purged mmap should trigger
>> SIGBUS, got sig=%d\n",
>> +				     sig);
>> +			break;
>> +		}
>> +
>> +		signal(SIGBUS, old_sigbus);
>> +		signal(SIGSEGV, old_sigsegv);
>> +		munmap(map, bo_size);
>> +	}
>> +
>> +	gem_close(fd, bo);
>> +	xe_vm_destroy(fd, vm);
>> +}
>> +
>> +int igt_main()
>> +{
>> +	struct drm_xe_engine_class_instance *hwe;
>> +	int fd;
>> +
>> +	igt_fixture() {
>> +		fd = drm_open_driver(DRIVER_XE);
>> +		xe_device_get(fd);
>> +	}
>> +
>> +	igt_subtest("dontneed-before-mmap")
>> +		xe_for_each_engine(fd, hwe) {
>> +			test_dontneed_before_mmap(fd, hwe);
>> +			break;
>> +		}
>> +
>> +	igt_fixture() {
>> +		xe_device_put(fd);
>> +		drm_close_driver(fd);
>> +	}
>> +}
> Reviewed-by: Pravalika Gurram<pravalika.gurram@intel.com>
>> diff --git a/tests/meson.build b/tests/meson.build index
>> 0ad728b87..9d41d7de6 100644
>> --- a/tests/meson.build
>> +++ b/tests/meson.build
>> @@ -313,6 +313,7 @@ intel_xe_progs = [
>>   	'xe_huc_copy',
>>   	'xe_intel_bb',
>>   	'xe_live_ktest',
>> +	'xe_madvise',
>>   	'xe_media_fill',
>>   	'xe_mmap',
>>           'xe_module_load',
>> --
>> 2.43.0

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Re: [PATCH i-g-t v3 4/8] tests/intel/xe_madvise: Add dontneed-after-mmap subtest

[Sharma, Nishit]

On 2/23/2026 10:40 AM, Gurram, Pravalika wrote:
>
>> -----Original Message-----
>> From: Yadav, Arvind <arvind.yadav@intel.com>
>> Sent: Tuesday, 17 February, 2026 08:04 AM
>> To: igt-dev@lists.freedesktop.org
>> Cc: Brost, Matthew <matthew.brost@intel.com>; Ghimiray, Himal Prasad
>> <himal.prasad.ghimiray@intel.com>; thomas.hellstrom@linux.intel.com;
>> Sharma, Nishit <nishit.sharma@intel.com>; Gurram, Pravalika
>> <pravalika.gurram@intel.com>
>> Subject: [PATCH i-g-t v3 4/8] tests/intel/xe_madvise: Add dontneed-after-
>> mmap subtest
>>
>> This test verifies that an existing mmap becomes invalid after the BO is marked
>> as purgeable and purged. The test creates a BO, maps it, writes data, then
>> marks it DONTNEED and triggers memory pressure.
>> Accessing the previously valid mapping should now trigger SIGBUS or SIGSEGV,
>> confirming that existing mappings are correctly invalidated when the backing
>> store is purged.
>>
>> Cc: Nishit Sharma <nishit.sharma@intel.com>
>> Cc: Pravalika Gurram <pravalika.gurram@intel.com>
>> Cc: Matthew Brost <matthew.brost@intel.com>
>> Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
>> Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
>> Signed-off-by: Arvind Yadav <arvind.yadav@intel.com>
>> ---
>>   tests/intel/xe_madvise.c | 54
>> ++++++++++++++++++++++++++++++++++++++++
>>   1 file changed, 54 insertions(+)
>>
>> diff --git a/tests/intel/xe_madvise.c b/tests/intel/xe_madvise.c index
>> 7dbe70f42..5c6a24553 100644
>> --- a/tests/intel/xe_madvise.c
>> +++ b/tests/intel/xe_madvise.c
>> @@ -196,6 +196,54 @@ static void test_dontneed_before_mmap(int fd,
>> struct drm_xe_engine_class_instanc
>>   	xe_vm_destroy(fd, vm);
>>   }
>>
>> +/**
>> + * SUBTEST: dontneed-after-mmap
>> + * Description: Mark BO as DONTNEED after mmap, verify SIGBUS on
>> +accessing purged mapping
>> + * Test category: functionality test
>> + */
>> +static void test_dontneed_after_mmap(int fd, struct
>> +drm_xe_engine_class_instance *hwe) {
>> +	uint32_t bo, vm;
>> +	uint64_t addr = PURGEABLE_ADDR;
>> +	size_t bo_size = PURGEABLE_BO_SIZE;
>> +	void *map;
>> +
>> +	purgeable_setup_simple_bo(fd, &vm, &bo, addr, bo_size, true);
>> +
>> +	map = xe_bo_map(fd, bo, bo_size);
>> +	memset(map, 0xAB, bo_size);
>> +
>> +	if (!purgeable_mark_and_verify_purged(fd, vm, addr, bo_size))
>> +		igt_skip("Unable to induce purge on this platform/config");
Same comment as in [Patch- 3/8]
>> +
>> +	/* Access purged mapping - should trigger SIGBUS/SIGSEGV */
>> +	{
>> +		sighandler_t old_sigsegv, old_sigbus;
>> +		char *ptr = (char *)map;
>> +		int sig;
>> +
>> +		old_sigsegv = signal(SIGSEGV, (__sighandler_t)sigtrap);
>> +		old_sigbus = signal(SIGBUS, (__sighandler_t)sigtrap);
>> +
>> +		sig = sigsetjmp(jmp, SIGBUS | SIGSEGV);
>> +		if (sig == SIGBUS || sig == SIGSEGV) {
>> +			/* Expected - purged mapping access failed */
>> +		} else if (sig == 0) {
>> +			*ptr = 0;
>> +			igt_assert_f(false, "Access to purged mapping should
>> trigger signal\n");
>> +		} else {
>> +			igt_assert_f(false, "unexpected signal %d\n", sig);
>> +		}
same comment as in [Patch-3/8]
>> +
>> +		signal(SIGBUS, old_sigbus);
>> +		signal(SIGSEGV, old_sigsegv);
>> +	}
>> +
>> +	munmap(map, bo_size);
>> +	gem_close(fd, bo);
>> +	xe_vm_destroy(fd, vm);
>> +}
>> +
> Reviewed-by: Pravalika Gurram <pravalika.gurram@intel.com>
>>   int igt_main()
>>   {
>>   	struct drm_xe_engine_class_instance *hwe; @@ -212,6 +260,12 @@
>> int igt_main()
>>   			break;
>>   		}
>>
>> +	igt_subtest("dontneed-after-mmap")
>> +		xe_for_each_engine(fd, hwe) {
>> +			test_dontneed_after_mmap(fd, hwe);
>> +			break;
>> +		}
>> +
>>   	igt_fixture() {
>>   		xe_device_put(fd);
>>   		drm_close_driver(fd);
>> --
>> 2.43.0

Re: [PATCH i-g-t v3 5/8] tests/intel/xe_madvise: Add dontneed-before-exec subtest

[Sharma, Nishit]

On 2/23/2026 10:40 AM, Gurram, Pravalika wrote:
>
>> -----Original Message-----
>> From: Yadav, Arvind <arvind.yadav@intel.com>
>> Sent: Tuesday, 17 February, 2026 08:04 AM
>> To: igt-dev@lists.freedesktop.org
>> Cc: Brost, Matthew <matthew.brost@intel.com>; Ghimiray, Himal Prasad
>> <himal.prasad.ghimiray@intel.com>; thomas.hellstrom@linux.intel.com;
>> Sharma, Nishit <nishit.sharma@intel.com>; Gurram, Pravalika
>> <pravalika.gurram@intel.com>
>> Subject: [PATCH i-g-t v3 5/8] tests/intel/xe_madvise: Add dontneed-before-
>> exec subtest
>>
>> This test validates GPU execution behavior when a data BO is purged before
>> submission. The test creates a batch that writes to a data BO, purges the data
>> BO (while keeping the batch BO valid to avoid GPU reset), then submits for
>> execution. With VM_CREATE_FLAG_SCRATCH_PAGE, the GPU write may
>> succeed by landing on scratch memory instead of the purged BO,
>> demonstrating graceful handling of purged memory during GPU operations.
>>
>> Cc: Nishit Sharma <nishit.sharma@intel.com>
>> Cc: Pravalika Gurram <pravalika.gurram@intel.com>
>> Cc: Matthew Brost <matthew.brost@intel.com>
>> Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
>> Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
>> Signed-off-by: Arvind Yadav <arvind.yadav@intel.com>
>> ---
>>   tests/intel/xe_madvise.c | 140
>> +++++++++++++++++++++++++++++++++++++++
>>   1 file changed, 140 insertions(+)
>>
>> diff --git a/tests/intel/xe_madvise.c b/tests/intel/xe_madvise.c index
>> 5c6a24553..42cf1b3e5 100644
>> --- a/tests/intel/xe_madvise.c
>> +++ b/tests/intel/xe_madvise.c
>> @@ -19,7 +19,11 @@
>>
>>   /* Purgeable test constants */
>>   #define PURGEABLE_ADDR		0x1a0000
>> +#define PURGEABLE_BATCH_ADDR	0x3c0000
>>   #define PURGEABLE_BO_SIZE	4096
>> +#define PURGEABLE_FENCE_VAL	0xbeef
>> +#define PURGEABLE_TEST_PATTERN	0xc0ffee
>> +#define PURGEABLE_DEAD_PATTERN	0xdead
>>
>>   /**
>>    * trigger_memory_pressure - Fill VRAM + 25% to force purgeable reclaim @@
>> -144,6 +148,62 @@ static void purgeable_setup_simple_bo(int fd, uint32_t
>> *vm, uint32_t *bo,
>>   	xe_wait_ufence(fd, &sync_val, 1, 0, NSEC_PER_SEC);  }
>>
>> +/**
>> + * purgeable_setup_batch_and_data - Setup VM with batch and data BOs
>> +for GPU exec
>> + * @fd: DRM file descriptor
>> + * @vm: Output VM handle
>> + * @bind_engine: Output bind engine handle
>> + * @batch_bo: Output batch BO handle
>> + * @data_bo: Output data BO handle
>> + * @batch: Output batch buffer pointer
>> + * @data: Output data buffer pointer
>> + * @batch_addr: Batch virtual address
>> + * @data_addr: Data virtual address
>> + * @batch_size: Batch buffer size
>> + * @data_size: Data buffer size
>> + *
>> + * Helper to create VM, bind engine, batch and data BOs, and bind them.
>> + */
>> +static void purgeable_setup_batch_and_data(int fd, uint32_t *vm,
>> +					   uint32_t *bind_engine,
>> +					   uint32_t *batch_bo,
>> +					   uint32_t *data_bo,
>> +					   uint32_t **batch,
>> +					   uint32_t **data,
>> +					   uint64_t batch_addr,
>> +					   uint64_t data_addr,
>> +					   size_t batch_size,
>> +					   size_t data_size)
>> +{
>> +	struct drm_xe_sync sync = {
>> +		.type = DRM_XE_SYNC_TYPE_USER_FENCE,
>> +		.flags = DRM_XE_SYNC_FLAG_SIGNAL,
>> +		.timeline_value = PURGEABLE_FENCE_VAL,
>> +	};
>> +	uint64_t vm_sync = 0;
>> +
>> +	*vm = xe_vm_create(fd, DRM_XE_VM_CREATE_FLAG_SCRATCH_PAGE,
>> 0);
>> +	*bind_engine = xe_bind_exec_queue_create(fd, *vm, 0);
>> +
>> +	/* Create and bind batch BO */
>> +	*batch_bo = xe_bo_create(fd, *vm, batch_size, vram_if_possible(fd,
>> 0),
>> +
>> DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);
>> +	*batch = xe_bo_map(fd, *batch_bo, batch_size);
>> +
>> +	sync.addr = to_user_pointer(&vm_sync);
>> +	xe_vm_bind_async(fd, *vm, *bind_engine, *batch_bo, 0, batch_addr,
>> batch_size, &sync, 1);
>> +	xe_wait_ufence(fd, &vm_sync, PURGEABLE_FENCE_VAL, 0,
>> NSEC_PER_SEC);
>> +
>> +	/* Create and bind data BO */
>> +	*data_bo = xe_bo_create(fd, *vm, data_size, vram_if_possible(fd, 0),
>> +
>> 	DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);
>> +	*data = xe_bo_map(fd, *data_bo, data_size);
>> +
>> +	vm_sync = 0;
>> +	xe_vm_bind_async(fd, *vm, *bind_engine, *data_bo, 0, data_addr,
>> data_size, &sync, 1);
>> +	xe_wait_ufence(fd, &vm_sync, PURGEABLE_FENCE_VAL, 0,
>> NSEC_PER_SEC); }
>> +
>>   /**
>>    * SUBTEST: dontneed-before-mmap
>>    * Description: Mark BO as DONTNEED before mmap, verify mmap fails or
>> SIGBUS on access @@ -244,6 +304,80 @@ static void
>> test_dontneed_after_mmap(int fd, struct drm_xe_engine_class_instance
>>   	xe_vm_destroy(fd, vm);
>>   }
>>
>> +/**
>> + * SUBTEST: dontneed-before-exec
>> + * Description: Mark BO as DONTNEED before GPU exec, verify GPU
>> +behavior with SCRATCH_PAGE
>> + * Test category: functionality test
>> + */
>> +static void test_dontneed_before_exec(int fd, struct
>> +drm_xe_engine_class_instance *hwe) {
>> +	uint32_t vm, exec_queue, bo, batch_bo, bind_engine;
>> +	uint64_t data_addr = PURGEABLE_ADDR;
>> +	uint64_t batch_addr = PURGEABLE_BATCH_ADDR;
>> +	size_t data_size = PURGEABLE_BO_SIZE;
>> +	size_t batch_size = PURGEABLE_BO_SIZE;
>> +	struct drm_xe_sync sync[1] = {
>> +		{ .type = DRM_XE_SYNC_TYPE_USER_FENCE,
>> +		  .flags = DRM_XE_SYNC_FLAG_SIGNAL,
>> +		  .timeline_value = PURGEABLE_FENCE_VAL },
>> +	};
>> +	struct drm_xe_exec exec = {
>> +		.num_batch_buffer = 1,
>> +		.num_syncs = 1,
>> +		.syncs = to_user_pointer(sync),
>> +	};
>> +	uint32_t *data, *batch;
>> +	uint64_t vm_sync = 0;
>> +	int b, ret;
>> +
>> +	purgeable_setup_batch_and_data(fd, &vm, &bind_engine,
>> &batch_bo,
>> +				       &bo, &batch, &data, batch_addr,
>> +				       data_addr, batch_size, data_size);
>> +
>> +	/* Prepare batch */
>> +	b = 0;
>> +	batch[b++] = MI_STORE_DWORD_IMM_GEN4;
>> +	batch[b++] = data_addr;
>> +	batch[b++] = data_addr >> 32;
>> +	batch[b++] = PURGEABLE_DEAD_PATTERN;
>> +	batch[b++] = MI_BATCH_BUFFER_END;
>> +
>> +	/* Phase 1: Purge data BO, batch BO still valid */
>> +	igt_assert(purgeable_mark_and_verify_purged(fd, vm, data_addr,
>> +data_size));
Resource cleanup?
>> +
>> +	exec_queue = xe_exec_queue_create(fd, vm, hwe, 0);
>> +	exec.exec_queue_id = exec_queue;
>> +	exec.address = batch_addr;
>> +
>> +	vm_sync = 0;
>> +	sync[0].addr = to_user_pointer(&vm_sync);
>> +
>> +	/*
>> +	 * VM has SCRATCH_PAGE — exec may succeed with the GPU write
>> +	 * landing on scratch instead of the purged data BO.
>> +	 */
>> +	ret = __xe_exec(fd, &exec);
>> +	if (ret == 0) {
>> +		int64_t timeout = NSEC_PER_SEC;
>> +
>> +		__xe_wait_ufence(fd, &vm_sync, PURGEABLE_FENCE_VAL,
>> +				 exec_queue, &timeout);
>> +	}
>> +
>> +	/*
>> +	 * Don't purge the batch BO — GPU would fetch zeroed scratch
>> +	 * instructions and trigger an engine reset.
>> +	 */
>> +
>> +	munmap(data, data_size);
>> +	munmap(batch, batch_size);
>> +	gem_close(fd, bo);
>> +	gem_close(fd, batch_bo);
>> +	xe_exec_queue_destroy(fd, bind_engine);
>> +	xe_exec_queue_destroy(fd, exec_queue);
>> +	xe_vm_destroy(fd, vm);
>> +}
>> +
>>   int igt_main()
>>   {
>>   	struct drm_xe_engine_class_instance *hwe; @@ -266,6 +400,12 @@
>> int igt_main()
>>   			break;
>>   		}
>>
>> +	igt_subtest("dontneed-before-exec")
>> +		xe_for_each_engine(fd, hwe) {
>> +			test_dontneed_before_exec(fd, hwe);
>> +			break;
>> +		}
>> +
>>   	igt_fixture() {
>>   		xe_device_put(fd);
>>   		drm_close_driver(fd);
> Reviewed-by: Pravalika Gurram <pravalika.gurram@intel.com>
>> --
>> 2.43.0

Re: [PATCH i-g-t v3 6/8] tests/intel/xe_madvise: Add dontneed-after-exec subtest

[Sharma, Nishit]

On 2/23/2026 10:41 AM, Gurram, Pravalika wrote:
>
>> -----Original Message-----
>> From: Yadav, Arvind <arvind.yadav@intel.com>
>> Sent: Tuesday, 17 February, 2026 08:04 AM
>> To: igt-dev@lists.freedesktop.org
>> Cc: Brost, Matthew <matthew.brost@intel.com>; Ghimiray, Himal Prasad
>> <himal.prasad.ghimiray@intel.com>; thomas.hellstrom@linux.intel.com;
>> Sharma, Nishit <nishit.sharma@intel.com>; Gurram, Pravalika
>> <pravalika.gurram@intel.com>
>> Subject: [PATCH i-g-t v3 6/8] tests/intel/xe_madvise: Add dontneed-after-exec
>> subtest
>>
>> This test verifies that memory can be marked purgeable and reclaimed after
>> successful GPU execution. The test first executes a batch that writes to a data
>> BO and verifies the result. It then marks the BO as DONTNEED, triggers
>> memory pressure to purge it, and attempts a second execution. The second
>> execution may fail or succeed with scratch rebind, validating that the kernel
>> correctly handles purged BOs in GPU submissions.
>>
>> Cc: Nishit Sharma <nishit.sharma@intel.com>
>> Cc: Pravalika Gurram <pravalika.gurram@intel.com>
>> Cc: Matthew Brost <matthew.brost@intel.com>
>> Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
>> Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
>> Signed-off-by: Arvind Yadav <arvind.yadav@intel.com>
>> ---
>>   tests/intel/xe_madvise.c | 93
>> ++++++++++++++++++++++++++++++++++++++++
>>   1 file changed, 93 insertions(+)
>>
>> diff --git a/tests/intel/xe_madvise.c b/tests/intel/xe_madvise.c index
>> 42cf1b3e5..51ef4fad3 100644
>> --- a/tests/intel/xe_madvise.c
>> +++ b/tests/intel/xe_madvise.c
>> @@ -16,6 +16,7 @@
>>
>>   #include "xe/xe_ioctl.h"
>>   #include "xe/xe_query.h"
>> +#include "lib/igt_syncobj.h"
>>
>>   /* Purgeable test constants */
>>   #define PURGEABLE_ADDR		0x1a0000
>> @@ -378,6 +379,92 @@ static void test_dontneed_before_exec(int fd, struct
>> drm_xe_engine_class_instanc
>>   	xe_vm_destroy(fd, vm);
>>   }
>>
>> +/**
>> + * SUBTEST: dontneed-after-exec
>> + * Description: Mark BO as DONTNEED after GPU exec, verify memory
>> +becomes inaccessible
>> + * Test category: functionality test
>> + */
>> +static void test_dontneed_after_exec(int fd, struct
>> +drm_xe_engine_class_instance *hwe) {
>> +	uint32_t vm, exec_queue, bo, batch_bo, bind_engine;
>> +	uint64_t data_addr = PURGEABLE_ADDR;
>> +	uint64_t batch_addr = PURGEABLE_BATCH_ADDR;
>> +	size_t data_size = PURGEABLE_BO_SIZE;
>> +	size_t batch_size = PURGEABLE_BO_SIZE;
>> +	struct drm_xe_sync sync[2] = {
>> +		{ .type = DRM_XE_SYNC_TYPE_USER_FENCE,
>> +		  .flags = DRM_XE_SYNC_FLAG_SIGNAL,
>> +		  .timeline_value = PURGEABLE_FENCE_VAL },
>> +		{ .type = DRM_XE_SYNC_TYPE_SYNCOBJ,
>> +		  .flags = DRM_XE_SYNC_FLAG_SIGNAL },
>> +	};
>> +	struct drm_xe_exec exec = {
>> +		.num_batch_buffer = 1,
>> +		.num_syncs = 2,
>> +		.syncs = to_user_pointer(sync),
>> +	};
>> +	uint32_t *data, *batch;
>> +	uint32_t syncobj;
>> +	int b, ret;
>> +
>> +	purgeable_setup_batch_and_data(fd, &vm, &bind_engine,
>> &batch_bo,
>> +				       &bo, &batch, &data, batch_addr,
>> +				       data_addr, batch_size, data_size);
>> +	memset(data, 0, data_size);
>> +
>> +	syncobj = syncobj_create(fd, 0);
>> +
>> +	/* Prepare batch to write to data BO */
>> +	b = 0;
>> +	batch[b++] = MI_STORE_DWORD_IMM_GEN4;
>> +	batch[b++] = data_addr;
>> +	batch[b++] = data_addr >> 32;
>> +	batch[b++] = 0xfeed0001;
>> +	batch[b++] = MI_BATCH_BUFFER_END;
>> +
>> +	exec_queue = xe_exec_queue_create(fd, vm, hwe, 0);
>> +	exec.exec_queue_id = exec_queue;
>> +	exec.address = batch_addr;
>> +
>> +	/* Use only syncobj for exec (not USER_FENCE) */
>> +	sync[1].handle = syncobj;
>> +	exec.num_syncs = 1;
>> +	exec.syncs = to_user_pointer(&sync[1]);
when num_sync  = 1 then why assignment with &sync[1]. Although sync[0] 
is not used. Either you can have single sync for both xe_exec or use 
different syncs for each xe_exec
>> +
>> +	ret = __xe_exec(fd, &exec);
>> +	igt_assert_eq(ret, 0);
>> +
>> +	igt_assert(syncobj_wait(fd, &syncobj, 1, INT64_MAX, 0, NULL));
>> +	munmap(data, data_size);
>> +	data = xe_bo_map(fd, bo, data_size);
igt_assert(data != MAP_FAILED) before using below
>> +	igt_assert_eq(data[0], 0xfeed0001);
>> +
>> +	igt_assert(purgeable_mark_and_verify_purged(fd, vm, data_addr,
>> +data_size));

Resource cleanup? Although if BO is purged it will assert but is there 
any chance if BO is purged and it continue execution second xe_exec() which

can lead to undefined behavior?

>> +
>> +	/* Prepare second batch (different value) */
>> +	b = 0;
>> +	batch[b++] = MI_STORE_DWORD_IMM_GEN4;
>> +	batch[b++] = data_addr;
>> +	batch[b++] = data_addr >> 32;
>> +	batch[b++] = 0xfeed0002;
>> +	batch[b++] = MI_BATCH_BUFFER_END;
>> +
>> +	ret = __xe_exec(fd, &exec);
>> +	if (ret == 0) {
>> +		/* Exec succeeded, but wait may fail on purged BO (both
>> behaviors valid) */
>> +		syncobj_wait(fd, &syncobj, 1, INT64_MAX, 0, NULL);
>> +	}
We are not checking result in BO after second xe_exec(). Is it intentional?
>> +
>> +	munmap(data, data_size);
>> +	munmap(batch, batch_size);
>> +	gem_close(fd, bo);
>> +	gem_close(fd, batch_bo);
>> +	syncobj_destroy(fd, syncobj);
>> +	xe_exec_queue_destroy(fd, bind_engine);
>> +	xe_exec_queue_destroy(fd, exec_queue);
>> +	xe_vm_destroy(fd, vm);
>> +}
>> +
>>   int igt_main()
>>   {
>>   	struct drm_xe_engine_class_instance *hwe; @@ -406,6 +493,12 @@
>> int igt_main()
>>   			break;
>>   		}
>>
>> +	igt_subtest("dontneed-after-exec")
>> +		xe_for_each_engine(fd, hwe) {
>> +			test_dontneed_after_exec(fd, hwe);
>> +			break;
>> +		}
>> +
> Reviewed-by: Pravalika Gurram <pravalika.gurram@intel.com>
>>   	igt_fixture() {
>>   		xe_device_put(fd);
>>   		drm_close_driver(fd);
>> --
>> 2.43.0

Re: [PATCH i-g-t v3 7/8] tests/intel/xe_madvise: Add per-vma-tracking subtest

[Sharma, Nishit]

On 2/23/2026 10:41 AM, Gurram, Pravalika wrote:
>
>> -----Original Message-----
>> From: Yadav, Arvind <arvind.yadav@intel.com>
>> Sent: Tuesday, 17 February, 2026 08:04 AM
>> To: igt-dev@lists.freedesktop.org
>> Cc: Brost, Matthew <matthew.brost@intel.com>; Ghimiray, Himal Prasad
>> <himal.prasad.ghimiray@intel.com>; thomas.hellstrom@linux.intel.com;
>> Sharma, Nishit <nishit.sharma@intel.com>; Gurram, Pravalika
>> <pravalika.gurram@intel.com>
>> Subject: [PATCH i-g-t v3 7/8] tests/intel/xe_madvise: Add per-vma-tracking
>> subtest
>>
>> This test validates that purgeable state is tracked per-VMA when a single BO is
>> bound in multiple VMs. The test creates one BO shared across two VMs at
>> different virtual addresses. It verifies that marking only one VMA as
>> DONTNEED does not make the BO purgeable, but marking both VMAs as
>> DONTNEED allows the kernel to purge the shared BO. This ensures proper per-
>> VMA tracking for shared memory.
>>
>> Cc: Nishit Sharma <nishit.sharma@intel.com>
>> Cc: Pravalika Gurram <pravalika.gurram@intel.com>
>> Cc: Matthew Brost <matthew.brost@intel.com>
>> Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
>> Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
>> Signed-off-by: Arvind Yadav <arvind.yadav@intel.com>
>> ---
>>   tests/intel/xe_madvise.c | 109
>> +++++++++++++++++++++++++++++++++++++++
>>   1 file changed, 109 insertions(+)
>>
>> diff --git a/tests/intel/xe_madvise.c b/tests/intel/xe_madvise.c index
>> 51ef4fad3..4e7df54a7 100644
>> --- a/tests/intel/xe_madvise.c
>> +++ b/tests/intel/xe_madvise.c
>> @@ -20,6 +20,7 @@
>>
>>   /* Purgeable test constants */
>>   #define PURGEABLE_ADDR		0x1a0000
>> +#define PURGEABLE_ADDR2		0x2b0000
>>   #define PURGEABLE_BATCH_ADDR	0x3c0000
>>   #define PURGEABLE_BO_SIZE	4096
>>   #define PURGEABLE_FENCE_VAL	0xbeef
>> @@ -205,6 +206,58 @@ static void purgeable_setup_batch_and_data(int fd,
>> uint32_t *vm,
>>   	xe_wait_ufence(fd, &vm_sync, PURGEABLE_FENCE_VAL, 0,
>> NSEC_PER_SEC);  }
>>
>> +/**
>> + * purgeable_setup_two_vms_shared_bo - Setup two VMs with one shared
>> BO
>> + * @fd: DRM file descriptor
>> + * @vm1: Output first VM handle
>> + * @vm2: Output second VM handle
>> + * @bo: Output shared BO handle
>> + * @addr1: Virtual address in VM1
>> + * @addr2: Virtual address in VM2
>> + * @size: Size of the BO
>> + * @use_scratch: Whether to use scratch page flag for VMs
>> + *
>> + * Helper to create two VMs and bind one shared BO in both VMs.
>> + * Returns mapped pointer to the BO.
>> + */
>> +static void *purgeable_setup_two_vms_shared_bo(int fd, uint32_t *vm1,
>> uint32_t *vm2,
>> +					       uint32_t *bo, uint64_t addr1,
>> +					       uint64_t addr2, size_t size,
>> +					       bool use_scratch)
>> +{
>> +	struct drm_xe_sync sync = {
>> +		.type = DRM_XE_SYNC_TYPE_USER_FENCE,
>> +		.flags = DRM_XE_SYNC_FLAG_SIGNAL,
>> +		.timeline_value = 1,
>> +	};
>> +	uint64_t sync_val = 0;
>> +	void *map;
>> +
>> +	/* Create two VMs */
>> +	*vm1 = xe_vm_create(fd, use_scratch ?
>> DRM_XE_VM_CREATE_FLAG_SCRATCH_PAGE : 0, 0);
>> +	*vm2 = xe_vm_create(fd, use_scratch ?
>> +DRM_XE_VM_CREATE_FLAG_SCRATCH_PAGE : 0, 0);
>> +
>> +	/* Create shared BO */
>> +	*bo = xe_bo_create(fd, 0, size, vram_if_possible(fd, 0),
>> +
>> DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);
>> +
>> +	map = xe_bo_map(fd, *bo, size);
>> +	memset(map, 0xAB, size);
>> +
>> +	/* Bind BO in VM1 */
>> +	sync.addr = to_user_pointer(&sync_val);
>> +	sync_val = 0;
>> +	xe_vm_bind_async(fd, *vm1, 0, *bo, 0, addr1, size, &sync, 1);
>> +	xe_wait_ufence(fd, &sync_val, 1, 0, NSEC_PER_SEC);
>> +
>> +	/* Bind BO in VM2 */
>> +	sync_val = 0;
>> +	xe_vm_bind_async(fd, *vm2, 0, *bo, 0, addr2, size, &sync, 1);
>> +	xe_wait_ufence(fd, &sync_val, 1, 0, NSEC_PER_SEC);
>> +
>> +	return map;
>> +}
>> +
>>   /**
>>    * SUBTEST: dontneed-before-mmap
>>    * Description: Mark BO as DONTNEED before mmap, verify mmap fails or
>> SIGBUS on access @@ -465,6 +518,56 @@ static void
>> test_dontneed_after_exec(int fd, struct drm_xe_engine_class_instance
>>   	xe_vm_destroy(fd, vm);
>>   }
>>
>> +/**
>> + * SUBTEST: per-vma-tracking
>> + * Description: One BO in two VMs becomes purgeable only when both
>> VMAs
>> +are DONTNEED
>> + * Test category: functionality test
>> + */
>> +static void test_per_vma_tracking(int fd, struct
>> +drm_xe_engine_class_instance *hwe) {
>> +	uint32_t bo, vm1, vm2;
>> +	uint64_t addr1 = PURGEABLE_ADDR;
>> +	uint64_t addr2 = PURGEABLE_ADDR2;
>> +	size_t bo_size = PURGEABLE_BO_SIZE;
>> +	uint32_t retained;
>> +	void *map;
>> +
>> +	map = purgeable_setup_two_vms_shared_bo(fd, &vm1, &vm2, &bo,
>> +						addr1, addr2,
>> +						bo_size, false);
>> +
>> +	/* Mark VMA1 as DONTNEED */
>> +	retained = xe_vm_madvise_purgeable(fd, vm1, addr1, bo_size,
>> +
>> DRM_XE_VMA_PURGEABLE_STATE_DONTNEED);
>> +	igt_assert_eq(retained, 1);
>> +
>> +	/* Verify BO NOT purgeable (VMA2 still WILLNEED) */
>> +	retained = xe_vm_madvise_purgeable(fd, vm1, addr1, bo_size,
>> +
>> DRM_XE_VMA_PURGEABLE_STATE_WILLNEED);
>> +	igt_assert_eq(retained, 1);
>> +
>> +	/* Mark both VMAs as DONTNEED */
>> +	retained = xe_vm_madvise_purgeable(fd, vm1, addr1, bo_size,
>> +
>> DRM_XE_VMA_PURGEABLE_STATE_DONTNEED);
>> +	igt_assert_eq(retained, 1);
>> +
>> +	retained = xe_vm_madvise_purgeable(fd, vm2, addr2, bo_size,
>> +
>> DRM_XE_VMA_PURGEABLE_STATE_DONTNEED);
>> +	igt_assert_eq(retained, 1);
>> +
>> +	/* Trigger pressure and verify BO was purged */
>> +	trigger_memory_pressure(fd, vm1);
Triggering pressure on single VM is fine as both VMAs are DONTNEED. You 
can mention in comment otherwise fine.
>> +
>> +	retained = xe_vm_madvise_purgeable(fd, vm1, addr1, bo_size,
>> +
>> DRM_XE_VMA_PURGEABLE_STATE_WILLNEED);
>> +	igt_assert_eq(retained, 0);
>> +
>> +	munmap(map, bo_size);
>> +	gem_close(fd, bo);
>> +	xe_vm_destroy(fd, vm1);
>> +	xe_vm_destroy(fd, vm2);
>> +}
>> +
>>   int igt_main()
>>   {
>>   	struct drm_xe_engine_class_instance *hwe; @@ -499,6 +602,12 @@
>> int igt_main()
>>   			break;
>>   		}
>>
>> +	igt_subtest("per-vma-tracking")
>> +		xe_for_each_engine(fd, hwe) {
>> +			test_per_vma_tracking(fd, hwe);
>> +			break;
>> +		}
>> +
> Reviewed-by: Pravalika Gurram <pravalika.gurram@intel.com>
Reviewed-by: Nishit Sharma <nishit.sharma@intel.com>
>>   	igt_fixture() {
>>   		xe_device_put(fd);
>>   		drm_close_driver(fd);
>> --
>> 2.43.0

Re: [PATCH i-g-t v3 8/8] tests/intel/xe_madvise: Add per-vma-protection subtest

[Sharma, Nishit]

On 2/23/2026 10:42 AM, Gurram, Pravalika wrote:
>
>> -----Original Message-----
>> From: Yadav, Arvind <arvind.yadav@intel.com>
>> Sent: Tuesday, 17 February, 2026 08:04 AM
>> To: igt-dev@lists.freedesktop.org
>> Cc: Brost, Matthew <matthew.brost@intel.com>; Ghimiray, Himal Prasad
>> <himal.prasad.ghimiray@intel.com>; thomas.hellstrom@linux.intel.com;
>> Sharma, Nishit <nishit.sharma@intel.com>; Gurram, Pravalika
>> <pravalika.gurram@intel.com>
>> Subject: [PATCH i-g-t v3 8/8] tests/intel/xe_madvise: Add per-vma-protection
>> subtest
>>
>> This test validates that a WILLNEED VMA protects a shared BO from being
>> purged even when other VMAs are marked DONTNEED. The test creates a BO
>> shared across two VMs, marks VMA1 as DONTNEED while keeping VMA2 as
>> WILLNEED, then triggers memory pressure. The BO should survive and GPU
>> execution should succeed. After marking both VMAs as DONTNEED and
>> triggering pressure again, the BO should be purged, demonstrating that all
>> VMAs must be DONTNEED for the BO to be purgeable.
>>
>> Cc: Nishit Sharma <nishit.sharma@intel.com>
>> Cc: Pravalika Gurram <pravalika.gurram@intel.com>
>> Cc: Matthew Brost <matthew.brost@intel.com>
>> Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
>> Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
>> Signed-off-by: Arvind Yadav <arvind.yadav@intel.com>
>> ---
>>   tests/intel/xe_madvise.c | 116
>> +++++++++++++++++++++++++++++++++++++++
>>   1 file changed, 116 insertions(+)
>>
>> diff --git a/tests/intel/xe_madvise.c b/tests/intel/xe_madvise.c index
>> 4e7df54a7..2e512edc4 100644
>> --- a/tests/intel/xe_madvise.c
>> +++ b/tests/intel/xe_madvise.c
>> @@ -568,6 +568,116 @@ static void test_per_vma_tracking(int fd, struct
>> drm_xe_engine_class_instance *h
>>   	xe_vm_destroy(fd, vm2);
>>   }
>>
>> +/**
>> + * SUBTEST: per-vma-protection
>> + * Description: WILLNEED VMA protects BO from purging; both DONTNEED
>> +makes BO purgeable
>> + * Test category: functionality test
>> + */
>> +static void test_per_vma_protection(int fd, struct
>> +drm_xe_engine_class_instance *hwe) {
>> +	uint32_t vm1, vm2, exec_queue, bo, batch_bo, bind_engine;
>> +	uint64_t data_addr1 = PURGEABLE_ADDR;
>> +	uint64_t data_addr2 = PURGEABLE_ADDR2;
>> +	uint64_t batch_addr = PURGEABLE_BATCH_ADDR;
>> +	size_t data_size = PURGEABLE_BO_SIZE;
>> +	size_t batch_size = PURGEABLE_BO_SIZE;
>> +	struct drm_xe_sync sync[2] = {
>> +		{ .type = DRM_XE_SYNC_TYPE_USER_FENCE,
>> +		  .flags = DRM_XE_SYNC_FLAG_SIGNAL,
>> +		  .timeline_value = PURGEABLE_FENCE_VAL },
>> +		{ .type = DRM_XE_SYNC_TYPE_SYNCOBJ,
>> +		  .flags = DRM_XE_SYNC_FLAG_SIGNAL },
>> +	};
>> +	struct drm_xe_exec exec = {
>> +		.num_batch_buffer = 1,
>> +		.num_syncs = 1,
>> +		.syncs = to_user_pointer(&sync[1]),
>> +	};
>> +	uint32_t *data, *batch;
>> +	uint64_t vm_sync = 0;
>> +	uint32_t retained, syncobj;
>> +	int b, ret;
>> +
>> +	/* Create two VMs and bind shared data BO */
>> +	data = purgeable_setup_two_vms_shared_bo(fd, &vm1, &vm2, &bo,
>> +						 data_addr1, data_addr2,
>> +						 data_size, true);
>> +	memset(data, 0, data_size);
>> +	bind_engine = xe_bind_exec_queue_create(fd, vm2, 0);
>> +
>> +	/* Create and bind batch BO in VM2 */
>> +	batch_bo = xe_bo_create(fd, vm2, batch_size, vram_if_possible(fd, 0),
>> +
>> 	DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);
>> +	batch = xe_bo_map(fd, batch_bo, batch_size);
>> +
>> +	sync[0].addr = to_user_pointer(&vm_sync);
>> +	vm_sync = 0;
>> +	xe_vm_bind_async(fd, vm2, bind_engine, batch_bo, 0, batch_addr,
>> batch_size, sync, 1);
>> +	xe_wait_ufence(fd, &vm_sync, PURGEABLE_FENCE_VAL, 0,
>> NSEC_PER_SEC);
>> +
>> +	/* Mark VMA1 as DONTNEED, VMA2 stays WILLNEED */
>> +	retained = xe_vm_madvise_purgeable(fd, vm1, data_addr1, data_size,
>> +
>> DRM_XE_VMA_PURGEABLE_STATE_DONTNEED);
>> +	igt_assert_eq(retained, 1);
>> +
>> +	/* Trigger pressure - BO should survive (VMA2 protects) */
>> +	trigger_memory_pressure(fd, vm1);
>> +
>> +	retained = xe_vm_madvise_purgeable(fd, vm2, data_addr2, data_size,
>> +
>> DRM_XE_VMA_PURGEABLE_STATE_WILLNEED);
>> +	igt_assert_eq(retained, 1);
>> +
>> +	/* GPU workload - should succeed */
>> +	b = 0;
>> +	batch[b++] = MI_STORE_DWORD_IMM_GEN4;
>> +	batch[b++] = data_addr2;
>> +	batch[b++] = data_addr2 >> 32;
>> +	batch[b++] = PURGEABLE_TEST_PATTERN;
>> +	batch[b++] = MI_BATCH_BUFFER_END;
>> +
>> +	syncobj = syncobj_create(fd, 0);
>> +	sync[1].handle = syncobj;
>> +	exec_queue = xe_exec_queue_create(fd, vm2, hwe, 0);
>> +	exec.exec_queue_id = exec_queue;
>> +	exec.address = batch_addr;
>> +
>> +	ret = __xe_exec(fd, &exec);
>> +	igt_assert_eq(ret, 0);
>> +	igt_assert(syncobj_wait(fd, &syncobj, 1, INT64_MAX, 0, NULL));
>> +
>> +	munmap(data, data_size);
>> +	data = xe_bo_map(fd, bo, data_size);
>> +	igt_assert_eq(data[0], PURGEABLE_TEST_PATTERN);
>> +
>> +	/* Mark both VMAs DONTNEED */
>> +	retained = xe_vm_madvise_purgeable(fd, vm2, data_addr2, data_size,
>> +
>> DRM_XE_VMA_PURGEABLE_STATE_DONTNEED);
>> +	igt_assert_eq(retained, 1);
>> +
>> +	/* Trigger pressure - BO should be purged */
>> +	trigger_memory_pressure(fd, vm1);
>> +
>> +	retained = xe_vm_madvise_purgeable(fd, vm2, data_addr2, data_size,
>> +
>> DRM_XE_VMA_PURGEABLE_STATE_WILLNEED);
>> +	igt_assert_eq(retained, 0);
>> +
>> +	/* GPU workload - should fail or succeed with NULL rebind */
>> +	batch[3] = PURGEABLE_DEAD_PATTERN;
>> +
>> +	ret = __xe_exec(fd, &exec);
>> +	/* Exec on purged BO — may succeed (scratch rebind) or fail, both OK
>> +*/
no syncob_wait()? Otherwise LGTM
>> +
>> +	munmap(data, data_size);
>> +	munmap(batch, batch_size);
>> +	gem_close(fd, bo);
>> +	gem_close(fd, batch_bo);
>> +	syncobj_destroy(fd, syncobj);
>> +	xe_exec_queue_destroy(fd, bind_engine);
>> +	xe_exec_queue_destroy(fd, exec_queue);
>> +	xe_vm_destroy(fd, vm1);
>> +	xe_vm_destroy(fd, vm2);
>> +}
>> +
>>   int igt_main()
>>   {
>>   	struct drm_xe_engine_class_instance *hwe; @@ -608,6 +718,12 @@
>> int igt_main()
>>   			break;
>>   		}
>>
>> +	igt_subtest("per-vma-protection")
>> +		xe_for_each_engine(fd, hwe) {
>> +			test_per_vma_protection(fd, hwe);
>> +			break;
>> +		}
>> +
> Reviewed-by: Pravalika Gurram <pravalika.gurram@intel.com>
Reviewed-by: Nishit Sharma <nishit.sharma@intel.com>
>>   	igt_fixture() {
>>   		xe_device_put(fd);
>>   		drm_close_driver(fd);
>> --
>> 2.43.0

Re: [PATCH i-g-t v3 1/8] drm-uapi/xe_drm: Add UAPI support for purgeable buffer objects

[Yadav, Arvind]

On 23-02-2026 09:59, Gurram, Pravalika wrote:
>
>> -----Original Message-----
>> From: Yadav, Arvind <arvind.yadav@intel.com>
>> Sent: Tuesday, 17 February, 2026 08:04 AM
>> To: igt-dev@lists.freedesktop.org
>> Cc: Brost, Matthew <matthew.brost@intel.com>; Ghimiray, Himal Prasad
>> <himal.prasad.ghimiray@intel.com>; thomas.hellstrom@linux.intel.com;
>> Sharma, Nishit <nishit.sharma@intel.com>; Gurram, Pravalika
>> <pravalika.gurram@intel.com>
>> Subject: [PATCH i-g-t v3 1/8] drm-uapi/xe_drm: Add UAPI support for
>> purgeable buffer objects
>>
>> From: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
>>
>> Extend the DRM_XE_MADVISE ioctl to support purgeable buffer object
>> management by adding DRM_XE_VMA_ATTR_PURGEABLE_STATE attribute
>> type.
>>
>> This allows userspace applications to provide memory usage hints to the
>> kernel for better memory management under pressure:
>>
>> This allows userspace applications to provide memory usage hints to the
>> kernel for better memory management under pressure:
>>
>> - WILLNEED: Buffer is needed and should not be purged. If the BO was
>>    previously purged, retained field returns 0 indicating backing store
>>    was lost (once purged, always purged semantics matching i915).
>>
>> - DONTNEED: Buffer is not currently needed and may be purged by the
>>    kernel under memory pressure to free resources. Only applies to
>>    non-shared BOs.
>>
>> The implementation includes a 'retained' output field (matching i915's
>> drm_i915_gem_madvise.retained) that indicates whether the BO's backing
>> store still exists (1) or has been purged (0).
>>
>> v2:
>>    - Update UAPI documentation to clarify retained must be initialized
>>      to 0(Thomas)
>>
>> Cc: Nishit Sharma <nishit.sharma@intel.com>
>> Cc: Pravalika Gurram <pravalika.gurram@intel.com>
>> Cc: Matthew Brost <matthew.brost@intel.com>
>> Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
>> Signed-off-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
>> Signed-off-by: Arvind Yadav <arvind.yadav@intel.com>
>> ---
>>   include/drm-uapi/xe_drm.h | 44
>> +++++++++++++++++++++++++++++++++++++++
>>   1 file changed, 44 insertions(+)
>>
>> diff --git a/include/drm-uapi/xe_drm.h b/include/drm-uapi/xe_drm.h index
>> 077e66a68..3dd1ba875 100644
>> --- a/include/drm-uapi/xe_drm.h
>> +++ b/include/drm-uapi/xe_drm.h
>> @@ -2099,6 +2099,7 @@ struct drm_xe_madvise {
>>   #define DRM_XE_MEM_RANGE_ATTR_PREFERRED_LOC	0
>>   #define DRM_XE_MEM_RANGE_ATTR_ATOMIC		1
>>   #define DRM_XE_MEM_RANGE_ATTR_PAT		2
>> +#define DRM_XE_VMA_ATTR_PURGEABLE_STATE		3
>>   	/** @type: type of attribute */
>>   	__u32 type;
>>
>> @@ -2189,6 +2190,49 @@ struct drm_xe_madvise {
>>   			/** @pat_index.reserved: Reserved */
>>   			__u64 reserved;
>>   		} pat_index;
>> +
>> +		/**
>> +		 * @purge_state_val: Purgeable state configuration
>> +		 *
>> +		 * Used when @type ==
>> DRM_XE_VMA_ATTR_PURGEABLE_STATE.
>> +		 *
>> +		 * Configures the purgeable state of buffer objects in the
>> specified
>> +		 * virtual address range. This allows applications to hint to the
>> kernel
>> +		 * about bo's usage patterns for better memory management.
>> +		 *
>> +		 * Supported values for @purge_state_val.val:
>> +		 *  - DRM_XE_VMA_PURGEABLE_STATE_WILLNEED (0): Marks
>> BO as needed.
>> +		 *    If BO was purged, returns retained=0 (backing store lost).
>> +		 *
>> +		 *  - DRM_XE_VMA_PURGEABLE_STATE_DONTNEED (1): Hints
>> that BO is not
>> +		 *    currently needed. Kernel may purge it under memory
>> pressure.
>> +		 *    Only applies to non-shared BOs. Returns retained=1 if not
>> purged.
>> +		 */
>> +		struct {
>> +#define DRM_XE_VMA_PURGEABLE_STATE_WILLNEED	0
>> +#define DRM_XE_VMA_PURGEABLE_STATE_DONTNEED	1
>> +			/** @purge_state_val.val: value for
>> DRM_XE_VMA_ATTR_PURGEABLE_STATE */
>> +			__u32 val;
>> +
>> +			/* @purge_state_val.pad */
>> +			__u32 pad;
>> +			/**
>> +			 * @purge_state_val.retained: Pointer to output field
>> for backing
>> +			 * store status.
>> +			 *
>> +			 * Userspace must initialize this u32 field to 0 before
>> the
>> +			 * ioctl. Kernel writes to it after the operation:
>> +			 * - 1 if backing store exists (not purged)
>> +			 * - 0 if backing store was purged
>> +			 *
>> +			 * If userspace fails to initialize to 0, ioctl returns -
>> EINVAL.
>> +			 * This ensures a safe default (0 = assume purged) if
>> kernel
>> +			 * cannot write the result.
>> +			 *
>> +			 * Similar to i915's drm_i915_gem_madvise.retained
>> field.
>> +			 */
>> +			__u64 retained;
>> +		} purge_state_val;
>>   	};
> As kamil suggested please make sure that it’s a copy of kernel
> Reviewed-by: Pravalika Gurram <pravalika.gurram@intel.com>


Noted,
Thanks,
Arvind

>>   	/** @reserved: Reserved */
>> --
>> 2.43.0

Re: [PATCH i-g-t v3 3/8] tests/intel/xe_madvise: Add dontneed-before-mmap subtest

[Yadav, Arvind]

[-- Attachment #1: Type: text/plain, Size: 9343 bytes --]


On 23-02-2026 11:19, Sharma, Nishit wrote:
>
>
> On 2/23/2026 10:39 AM, Gurram, Pravalika wrote:
>>> -----Original Message-----
>>> From: Yadav, Arvind<arvind.yadav@intel.com>
>>> Sent: Tuesday, 17 February, 2026 08:04 AM
>>> To:igt-dev@lists.freedesktop.org
>>> Cc: Brost, Matthew<matthew.brost@intel.com>; Ghimiray, Himal Prasad
>>> <himal.prasad.ghimiray@intel.com>;thomas.hellstrom@linux.intel.com;
>>> Sharma, Nishit<nishit.sharma@intel.com>; Gurram, Pravalika
>>> <pravalika.gurram@intel.com>
>>> Subject: [PATCH i-g-t v3 3/8] tests/intel/xe_madvise: Add dontneed-before-
>>> mmap subtest
>>>
>>> This test validates kernel behavior when mapping a BO that was already
>>> marked as purgeable and purged before mmap. After purging the BO under
>>> memory pressure, the test attempts to mmap and access it. The kernel should
>>> trigger SIGBUS or SIGSEGV when accessing the purged mapping, confirming
>>> that purged memory is properly invalidated.
>>>
>>> Cc: Nishit Sharma<nishit.sharma@intel.com>
>>> Cc: Pravalika Gurram<pravalika.gurram@intel.com>
>>> Cc: Matthew Brost<matthew.brost@intel.com>
>>> Cc: Thomas Hellström<thomas.hellstrom@linux.intel.com>
>>> Cc: Himal Prasad Ghimiray<himal.prasad.ghimiray@intel.com>
>>> Signed-off-by: Arvind Yadav<arvind.yadav@intel.com>
>>> ---
>>>   tests/intel/xe_madvise.c | 219
>>> +++++++++++++++++++++++++++++++++++++++
>>>   tests/meson.build        |   1 +
>>>   2 files changed, 220 insertions(+)
>>>   create mode 100644 tests/intel/xe_madvise.c
>>>
>>> diff --git a/tests/intel/xe_madvise.c b/tests/intel/xe_madvise.c new file mode
>>> 100644 index 000000000..7dbe70f42
>>> --- /dev/null
>>> +++ b/tests/intel/xe_madvise.c
>>> @@ -0,0 +1,219 @@
>>> +// SPDX-License-Identifier: MIT
>>> +/*
>>> + * Copyright © 2025 Intel Corporation
>>> + */
>>> +
>>> +/**
>>> + * TEST: Validate purgeable BO madvise functionality
>>> + * Category: Core
>>> + * Mega feature: General Core features
>>> + * Sub-category: Memory management tests
>>> + * Functionality: madvise, purgeable
>>> + */
>>> +
>>> +#include "igt.h"
>>> +#include "xe_drm.h"
>>> +
>>> +#include "xe/xe_ioctl.h"
>>> +#include "xe/xe_query.h"
>>> +
>>> +/* Purgeable test constants */
>>> +#define PURGEABLE_ADDR		0x1a0000
>>> +#define PURGEABLE_BO_SIZE	4096
>>> +
>>> +/**
>>> + * trigger_memory_pressure - Fill VRAM + 25% to force purgeable reclaim
>>> + * @fd: DRM file descriptor
>>> + * @vm: VM handle (unused, kept for API compatibility)
>>> + *
>>> + * Allocates BOs in a temporary VM until VRAM is overcommitted,
>>> + * forcing the kernel to purge DONTNEED-marked BOs.
>>> + */
>>> +static void trigger_memory_pressure(int fd, uint32_t vm) {
>>> +	uint64_t vram_size, overpressure;
>>> +	const uint64_t chunk = 8ull << 20; /* 8 MiB */
>>> +	int max_objs, n = 0;
>>> +	uint32_t *handles;
>>> +	uint64_t total;
>>> +	void *p;
>>> +	uint32_t handle, temp_vm;
>>> +
>>> +	/* Use a separate VM so pressure BOs don't affect the test VM */
>>> +	temp_vm = xe_vm_create(fd, 0, 0);
>>> +
>>> +	vram_size = xe_visible_vram_size(fd, 0);
>>> +	/* Scale overpressure to 25% of VRAM, minimum 64MB */
>>> +	overpressure = vram_size / 4;
>>> +	if (overpressure < (64 << 20))
>>> +		overpressure = 64 << 20;
>>> +
>>> +	max_objs = (vram_size + overpressure) / chunk + 1;
>>> +	handles = malloc(max_objs * sizeof(*handles));
>>> +	igt_assert(handles);
>>> +
>>> +	total = 0;
>>> +	while (total < vram_size + overpressure && n < max_objs) {
>>> +		handle = xe_bo_create(fd, temp_vm, chunk,
>>> +				      vram_if_possible(fd, 0),
>>> +
>>> DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);
>>> +		handles[n++] = handle;
>>> +		total += chunk;
>>> +
>>> +		p = xe_bo_map(fd, handle, chunk);
>>> +		igt_assert(p != MAP_FAILED);
>>> +
>>> +		/* Fault in all pages so they actually consume VRAM */
>>> +		memset(p, 0xCD, chunk);
>>> +		munmap(p, chunk);
>>> +	}
>>> +
>>> +	/* Allow shrinker time to process pressure */
>>> +	usleep(100000);
>>> +
>>> +	for (int i = 0; i < n; i++)
>>> +		gem_close(fd, handles[i]);
>>> +
>>> +	free(handles);
>>> +
>>> +	xe_vm_destroy(fd, temp_vm);
>>> +}
>>> +
>>> +static jmp_buf jmp;
>>> +
>>> +__noreturn static void sigtrap(int sig) {
>>> +	siglongjmp(jmp, sig);
>>> +}
>>> +
>>> +/**
>>> + * purgeable_mark_and_verify_purged - Mark DONTNEED, pressure, check
>>> +purged
>>> + * @fd: DRM file descriptor
>>> + * @vm: VM handle
>>> + * @addr: Virtual address of the BO
>>> + * @size: Size of the BO
>>> + *
>>> + * Returns true if the BO was purged under memory pressure.
>>> + */
>>> +static bool purgeable_mark_and_verify_purged(int fd, uint32_t vm,
>>> +uint64_t addr, size_t size) {
>>> +	uint32_t retained;
>>> +
>>> +	/* Mark as DONTNEED */
>>> +	retained = xe_vm_madvise_purgeable(fd, vm, addr, size,
>>> +
>>> DRM_XE_VMA_PURGEABLE_STATE_DONTNEED);
>>> +	if (retained != 1)
>>> +		return false;
>>> +
>>> +	/* Trigger memory pressure */
>>> +	trigger_memory_pressure(fd, vm);
>>> +
>>> +	/* Verify purged */
>>> +	retained = xe_vm_madvise_purgeable(fd, vm, addr, size,
>>> +
>>> DRM_XE_VMA_PURGEABLE_STATE_WILLNEED);
>>> +	return retained == 0;
>>> +}
>>> +
>>> +/**
>>> + * purgeable_setup_simple_bo - Setup VM and bind a single BO
>>> + * @fd: DRM file descriptor
>>> + * @vm: Output VM handle
>>> + * @bo: Output BO handle
>>> + * @addr: Virtual address to bind at
>>> + * @size: Size of the BO
>>> + * @use_scratch: Whether to use scratch page flag
>>> + *
>>> + * Helper to create VM, BO, and bind it at the specified address.
>>> + */
>>> +static void purgeable_setup_simple_bo(int fd, uint32_t *vm, uint32_t *bo,
>>> +				      uint64_t addr, size_t size, bool
>>> use_scratch) {
>>> +	struct drm_xe_sync sync = {
>>> +		.type = DRM_XE_SYNC_TYPE_USER_FENCE,
>>> +		.flags = DRM_XE_SYNC_FLAG_SIGNAL,
>>> +		.timeline_value = 1,
>>> +	};
>>> +	uint64_t sync_val = 0;
>>> +
>>> +	*vm = xe_vm_create(fd, use_scratch ?
>>> DRM_XE_VM_CREATE_FLAG_SCRATCH_PAGE : 0, 0);
>>> +	*bo = xe_bo_create(fd, *vm, size, vram_if_possible(fd, 0),
>>> +
>>> DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);
>>> +
>>> +	sync.addr = to_user_pointer(&sync_val);
>>> +	xe_vm_bind_async(fd, *vm, 0, *bo, 0, addr, size, &sync, 1);
>>> +	xe_wait_ufence(fd, &sync_val, 1, 0, NSEC_PER_SEC); }
>>> +
>>> +/**
>>> + * SUBTEST: dontneed-before-mmap
>>> + * Description: Mark BO as DONTNEED before mmap, verify mmap fails or
>>> +SIGBUS on access
>>> + * Test category: functionality test
>>> + */
>>> +static void test_dontneed_before_mmap(int fd, struct
>>> +drm_xe_engine_class_instance *hwe) {
>>> +	uint32_t bo, vm;
>>> +	uint64_t addr = PURGEABLE_ADDR;
>>> +	size_t bo_size = PURGEABLE_BO_SIZE;
>>> +	void *map;
>>> +
>>> +	purgeable_setup_simple_bo(fd, &vm, &bo, addr, bo_size, false);
>>> +	if (!purgeable_mark_and_verify_purged(fd, vm, addr, bo_size))
>>> +		igt_skip("Unable to induce purge on this platform/config");
> No cleanup before igt_skip() or it's handled somewhere. gem_close(fd, 
> bo) and xe_vm_destroy(fd, vm);


Noted,

>>> +
>>> +	/* mmap the purged BO - access should trigger SIGBUS */
>>> +	map = xe_bo_map(fd, bo, bo_size);
> Should check igt_assert(map != MAP_FAILED) before using it below.


Noted,

>>> +
>>> +	{
>>> +		sighandler_t old_sigsegv, old_sigbus;
>>> +		char *ptr = (char *)map;
>>> +		int sig;
>>> +
>>> +		old_sigsegv = signal(SIGSEGV, (__sighandler_t)sigtrap);
>>> +		old_sigbus = signal(SIGBUS, (__sighandler_t)sigtrap);
>>> +
>>> +		sig = sigsetjmp(jmp, SIGBUS | SIGSEGV);
>>> +		switch (sig) {
>>> +		case SIGBUS:
>>> +		case SIGSEGV:
>>> +			/* Expected - purged BO access failed */
>>> +			break;
>>> +		case 0:
>>> +			*ptr = 0;
>>> +			__attribute__ ((fallthrough));
>
> why this __attribute__? Any compiler warning? Can't it be handled like
>
> case 0:
>
> default:
>
>     *ptr = 0;
>
> igt_assert_f(false, "Access to purged mmap should trigger SIGBUS, got 
> sig=%d\n", sig);
>
> break;
>
> as you are doing intentional fallout from case 0 to default?
>

You're absolutely right! The __attribute__ ((fallthrough)) is 
unnecessary here. Your suggested approach is cleaner and more 
straightforward.
*ptr = 0 should be part of case 0:

Thanks,
Arvind

>>> +		default:
>>> +			igt_assert_f(false,
>>> +				     "Access to purged mmap should trigger
>>> SIGBUS, got sig=%d\n",
>>> +				     sig);
>>> +			break;
>>> +		}
>>> +
>>> +		signal(SIGBUS, old_sigbus);
>>> +		signal(SIGSEGV, old_sigsegv);
>>> +		munmap(map, bo_size);
>>> +	}
>>> +
>>> +	gem_close(fd, bo);
>>> +	xe_vm_destroy(fd, vm);
>>> +}
>>> +
>>> +int igt_main()
>>> +{
>>> +	struct drm_xe_engine_class_instance *hwe;
>>> +	int fd;
>>> +
>>> +	igt_fixture() {
>>> +		fd = drm_open_driver(DRIVER_XE);
>>> +		xe_device_get(fd);
>>> +	}
>>> +
>>> +	igt_subtest("dontneed-before-mmap")
>>> +		xe_for_each_engine(fd, hwe) {
>>> +			test_dontneed_before_mmap(fd, hwe);
>>> +			break;
>>> +		}
>>> +
>>> +	igt_fixture() {
>>> +		xe_device_put(fd);
>>> +		drm_close_driver(fd);
>>> +	}
>>> +}
>> Reviewed-by: Pravalika Gurram<pravalika.gurram@intel.com>
>>> diff --git a/tests/meson.build b/tests/meson.build index
>>> 0ad728b87..9d41d7de6 100644
>>> --- a/tests/meson.build
>>> +++ b/tests/meson.build
>>> @@ -313,6 +313,7 @@ intel_xe_progs = [
>>>   	'xe_huc_copy',
>>>   	'xe_intel_bb',
>>>   	'xe_live_ktest',
>>> +	'xe_madvise',
>>>   	'xe_media_fill',
>>>   	'xe_mmap',
>>>           'xe_module_load',
>>> --
>>> 2.43.0

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Re: [PATCH i-g-t v3 4/8] tests/intel/xe_madvise: Add dontneed-after-mmap subtest

[Yadav, Arvind]

On 23-02-2026 11:22, Sharma, Nishit wrote:
>
> On 2/23/2026 10:40 AM, Gurram, Pravalika wrote:
>>
>>> -----Original Message-----
>>> From: Yadav, Arvind <arvind.yadav@intel.com>
>>> Sent: Tuesday, 17 February, 2026 08:04 AM
>>> To: igt-dev@lists.freedesktop.org
>>> Cc: Brost, Matthew <matthew.brost@intel.com>; Ghimiray, Himal Prasad
>>> <himal.prasad.ghimiray@intel.com>; thomas.hellstrom@linux.intel.com;
>>> Sharma, Nishit <nishit.sharma@intel.com>; Gurram, Pravalika
>>> <pravalika.gurram@intel.com>
>>> Subject: [PATCH i-g-t v3 4/8] tests/intel/xe_madvise: Add 
>>> dontneed-after-
>>> mmap subtest
>>>
>>> This test verifies that an existing mmap becomes invalid after the 
>>> BO is marked
>>> as purgeable and purged. The test creates a BO, maps it, writes 
>>> data, then
>>> marks it DONTNEED and triggers memory pressure.
>>> Accessing the previously valid mapping should now trigger SIGBUS or 
>>> SIGSEGV,
>>> confirming that existing mappings are correctly invalidated when the 
>>> backing
>>> store is purged.
>>>
>>> Cc: Nishit Sharma <nishit.sharma@intel.com>
>>> Cc: Pravalika Gurram <pravalika.gurram@intel.com>
>>> Cc: Matthew Brost <matthew.brost@intel.com>
>>> Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
>>> Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
>>> Signed-off-by: Arvind Yadav <arvind.yadav@intel.com>
>>> ---
>>>   tests/intel/xe_madvise.c | 54
>>> ++++++++++++++++++++++++++++++++++++++++
>>>   1 file changed, 54 insertions(+)
>>>
>>> diff --git a/tests/intel/xe_madvise.c b/tests/intel/xe_madvise.c index
>>> 7dbe70f42..5c6a24553 100644
>>> --- a/tests/intel/xe_madvise.c
>>> +++ b/tests/intel/xe_madvise.c
>>> @@ -196,6 +196,54 @@ static void test_dontneed_before_mmap(int fd,
>>> struct drm_xe_engine_class_instanc
>>>       xe_vm_destroy(fd, vm);
>>>   }
>>>
>>> +/**
>>> + * SUBTEST: dontneed-after-mmap
>>> + * Description: Mark BO as DONTNEED after mmap, verify SIGBUS on
>>> +accessing purged mapping
>>> + * Test category: functionality test
>>> + */
>>> +static void test_dontneed_after_mmap(int fd, struct
>>> +drm_xe_engine_class_instance *hwe) {
>>> +    uint32_t bo, vm;
>>> +    uint64_t addr = PURGEABLE_ADDR;
>>> +    size_t bo_size = PURGEABLE_BO_SIZE;
>>> +    void *map;
>>> +
>>> +    purgeable_setup_simple_bo(fd, &vm, &bo, addr, bo_size, true);
>>> +
>>> +    map = xe_bo_map(fd, bo, bo_size);
>>> +    memset(map, 0xAB, bo_size);
>>> +
>>> +    if (!purgeable_mark_and_verify_purged(fd, vm, addr, bo_size))
>>> +        igt_skip("Unable to induce purge on this platform/config");
> Same comment as in [Patch- 3/8]


Noted,

>>> +
>>> +    /* Access purged mapping - should trigger SIGBUS/SIGSEGV */
>>> +    {
>>> +        sighandler_t old_sigsegv, old_sigbus;
>>> +        char *ptr = (char *)map;
>>> +        int sig;
>>> +
>>> +        old_sigsegv = signal(SIGSEGV, (__sighandler_t)sigtrap);
>>> +        old_sigbus = signal(SIGBUS, (__sighandler_t)sigtrap);
>>> +
>>> +        sig = sigsetjmp(jmp, SIGBUS | SIGSEGV);
>>> +        if (sig == SIGBUS || sig == SIGSEGV) {
>>> +            /* Expected - purged mapping access failed */
>>> +        } else if (sig == 0) {
>>> +            *ptr = 0;
>>> +            igt_assert_f(false, "Access to purged mapping should
>>> trigger signal\n");
>>> +        } else {
>>> +            igt_assert_f(false, "unexpected signal %d\n", sig);
>>> +        }
> same comment as in [Patch-3/8]


Noted,

Thanks,
Arvind

>>> +
>>> +        signal(SIGBUS, old_sigbus);
>>> +        signal(SIGSEGV, old_sigsegv);
>>> +    }
>>> +
>>> +    munmap(map, bo_size);
>>> +    gem_close(fd, bo);
>>> +    xe_vm_destroy(fd, vm);
>>> +}
>>> +
>> Reviewed-by: Pravalika Gurram <pravalika.gurram@intel.com>
>>>   int igt_main()
>>>   {
>>>       struct drm_xe_engine_class_instance *hwe; @@ -212,6 +260,12 @@
>>> int igt_main()
>>>               break;
>>>           }
>>>
>>> +    igt_subtest("dontneed-after-mmap")
>>> +        xe_for_each_engine(fd, hwe) {
>>> +            test_dontneed_after_mmap(fd, hwe);
>>> +            break;
>>> +        }
>>> +
>>>       igt_fixture() {
>>>           xe_device_put(fd);
>>>           drm_close_driver(fd);
>>> -- 
>>> 2.43.0

Re: [PATCH i-g-t v3 5/8] tests/intel/xe_madvise: Add dontneed-before-exec subtest

[Yadav, Arvind]

On 23-02-2026 11:36, Sharma, Nishit wrote:
>
> On 2/23/2026 10:40 AM, Gurram, Pravalika wrote:
>>
>>> -----Original Message-----
>>> From: Yadav, Arvind <arvind.yadav@intel.com>
>>> Sent: Tuesday, 17 February, 2026 08:04 AM
>>> To: igt-dev@lists.freedesktop.org
>>> Cc: Brost, Matthew <matthew.brost@intel.com>; Ghimiray, Himal Prasad
>>> <himal.prasad.ghimiray@intel.com>; thomas.hellstrom@linux.intel.com;
>>> Sharma, Nishit <nishit.sharma@intel.com>; Gurram, Pravalika
>>> <pravalika.gurram@intel.com>
>>> Subject: [PATCH i-g-t v3 5/8] tests/intel/xe_madvise: Add 
>>> dontneed-before-
>>> exec subtest
>>>
>>> This test validates GPU execution behavior when a data BO is purged 
>>> before
>>> submission. The test creates a batch that writes to a data BO, 
>>> purges the data
>>> BO (while keeping the batch BO valid to avoid GPU reset), then 
>>> submits for
>>> execution. With VM_CREATE_FLAG_SCRATCH_PAGE, the GPU write may
>>> succeed by landing on scratch memory instead of the purged BO,
>>> demonstrating graceful handling of purged memory during GPU operations.
>>>
>>> Cc: Nishit Sharma <nishit.sharma@intel.com>
>>> Cc: Pravalika Gurram <pravalika.gurram@intel.com>
>>> Cc: Matthew Brost <matthew.brost@intel.com>
>>> Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
>>> Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
>>> Signed-off-by: Arvind Yadav <arvind.yadav@intel.com>
>>> ---
>>>   tests/intel/xe_madvise.c | 140
>>> +++++++++++++++++++++++++++++++++++++++
>>>   1 file changed, 140 insertions(+)
>>>
>>> diff --git a/tests/intel/xe_madvise.c b/tests/intel/xe_madvise.c index
>>> 5c6a24553..42cf1b3e5 100644
>>> --- a/tests/intel/xe_madvise.c
>>> +++ b/tests/intel/xe_madvise.c
>>> @@ -19,7 +19,11 @@
>>>
>>>   /* Purgeable test constants */
>>>   #define PURGEABLE_ADDR        0x1a0000
>>> +#define PURGEABLE_BATCH_ADDR    0x3c0000
>>>   #define PURGEABLE_BO_SIZE    4096
>>> +#define PURGEABLE_FENCE_VAL    0xbeef
>>> +#define PURGEABLE_TEST_PATTERN    0xc0ffee
>>> +#define PURGEABLE_DEAD_PATTERN    0xdead
>>>
>>>   /**
>>>    * trigger_memory_pressure - Fill VRAM + 25% to force purgeable 
>>> reclaim @@
>>> -144,6 +148,62 @@ static void purgeable_setup_simple_bo(int fd, 
>>> uint32_t
>>> *vm, uint32_t *bo,
>>>       xe_wait_ufence(fd, &sync_val, 1, 0, NSEC_PER_SEC); }
>>>
>>> +/**
>>> + * purgeable_setup_batch_and_data - Setup VM with batch and data BOs
>>> +for GPU exec
>>> + * @fd: DRM file descriptor
>>> + * @vm: Output VM handle
>>> + * @bind_engine: Output bind engine handle
>>> + * @batch_bo: Output batch BO handle
>>> + * @data_bo: Output data BO handle
>>> + * @batch: Output batch buffer pointer
>>> + * @data: Output data buffer pointer
>>> + * @batch_addr: Batch virtual address
>>> + * @data_addr: Data virtual address
>>> + * @batch_size: Batch buffer size
>>> + * @data_size: Data buffer size
>>> + *
>>> + * Helper to create VM, bind engine, batch and data BOs, and bind 
>>> them.
>>> + */
>>> +static void purgeable_setup_batch_and_data(int fd, uint32_t *vm,
>>> +                       uint32_t *bind_engine,
>>> +                       uint32_t *batch_bo,
>>> +                       uint32_t *data_bo,
>>> +                       uint32_t **batch,
>>> +                       uint32_t **data,
>>> +                       uint64_t batch_addr,
>>> +                       uint64_t data_addr,
>>> +                       size_t batch_size,
>>> +                       size_t data_size)
>>> +{
>>> +    struct drm_xe_sync sync = {
>>> +        .type = DRM_XE_SYNC_TYPE_USER_FENCE,
>>> +        .flags = DRM_XE_SYNC_FLAG_SIGNAL,
>>> +        .timeline_value = PURGEABLE_FENCE_VAL,
>>> +    };
>>> +    uint64_t vm_sync = 0;
>>> +
>>> +    *vm = xe_vm_create(fd, DRM_XE_VM_CREATE_FLAG_SCRATCH_PAGE,
>>> 0);
>>> +    *bind_engine = xe_bind_exec_queue_create(fd, *vm, 0);
>>> +
>>> +    /* Create and bind batch BO */
>>> +    *batch_bo = xe_bo_create(fd, *vm, batch_size, vram_if_possible(fd,
>>> 0),
>>> +
>>> DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);
>>> +    *batch = xe_bo_map(fd, *batch_bo, batch_size);
>>> +
>>> +    sync.addr = to_user_pointer(&vm_sync);
>>> +    xe_vm_bind_async(fd, *vm, *bind_engine, *batch_bo, 0, batch_addr,
>>> batch_size, &sync, 1);
>>> +    xe_wait_ufence(fd, &vm_sync, PURGEABLE_FENCE_VAL, 0,
>>> NSEC_PER_SEC);
>>> +
>>> +    /* Create and bind data BO */
>>> +    *data_bo = xe_bo_create(fd, *vm, data_size, 
>>> vram_if_possible(fd, 0),
>>> +
>>>     DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);
>>> +    *data = xe_bo_map(fd, *data_bo, data_size);
>>> +
>>> +    vm_sync = 0;
>>> +    xe_vm_bind_async(fd, *vm, *bind_engine, *data_bo, 0, data_addr,
>>> data_size, &sync, 1);
>>> +    xe_wait_ufence(fd, &vm_sync, PURGEABLE_FENCE_VAL, 0,
>>> NSEC_PER_SEC); }
>>> +
>>>   /**
>>>    * SUBTEST: dontneed-before-mmap
>>>    * Description: Mark BO as DONTNEED before mmap, verify mmap fails or
>>> SIGBUS on access @@ -244,6 +304,80 @@ static void
>>> test_dontneed_after_mmap(int fd, struct drm_xe_engine_class_instance
>>>       xe_vm_destroy(fd, vm);
>>>   }
>>>
>>> +/**
>>> + * SUBTEST: dontneed-before-exec
>>> + * Description: Mark BO as DONTNEED before GPU exec, verify GPU
>>> +behavior with SCRATCH_PAGE
>>> + * Test category: functionality test
>>> + */
>>> +static void test_dontneed_before_exec(int fd, struct
>>> +drm_xe_engine_class_instance *hwe) {
>>> +    uint32_t vm, exec_queue, bo, batch_bo, bind_engine;
>>> +    uint64_t data_addr = PURGEABLE_ADDR;
>>> +    uint64_t batch_addr = PURGEABLE_BATCH_ADDR;
>>> +    size_t data_size = PURGEABLE_BO_SIZE;
>>> +    size_t batch_size = PURGEABLE_BO_SIZE;
>>> +    struct drm_xe_sync sync[1] = {
>>> +        { .type = DRM_XE_SYNC_TYPE_USER_FENCE,
>>> +          .flags = DRM_XE_SYNC_FLAG_SIGNAL,
>>> +          .timeline_value = PURGEABLE_FENCE_VAL },
>>> +    };
>>> +    struct drm_xe_exec exec = {
>>> +        .num_batch_buffer = 1,
>>> +        .num_syncs = 1,
>>> +        .syncs = to_user_pointer(sync),
>>> +    };
>>> +    uint32_t *data, *batch;
>>> +    uint64_t vm_sync = 0;
>>> +    int b, ret;
>>> +
>>> +    purgeable_setup_batch_and_data(fd, &vm, &bind_engine,
>>> &batch_bo,
>>> +                       &bo, &batch, &data, batch_addr,
>>> +                       data_addr, batch_size, data_size);
>>> +
>>> +    /* Prepare batch */
>>> +    b = 0;
>>> +    batch[b++] = MI_STORE_DWORD_IMM_GEN4;
>>> +    batch[b++] = data_addr;
>>> +    batch[b++] = data_addr >> 32;
>>> +    batch[b++] = PURGEABLE_DEAD_PATTERN;
>>> +    batch[b++] = MI_BATCH_BUFFER_END;
>>> +
>>> +    /* Phase 1: Purge data BO, batch BO still valid */
>>> +    igt_assert(purgeable_mark_and_verify_purged(fd, vm, data_addr,
>>> +data_size));
> Resource cleanup?


Noted,

>>> +
>>> +    exec_queue = xe_exec_queue_create(fd, vm, hwe, 0);
>>> +    exec.exec_queue_id = exec_queue;
>>> +    exec.address = batch_addr;
>>> +
>>> +    vm_sync = 0;
>>> +    sync[0].addr = to_user_pointer(&vm_sync);
>>> +
>>> +    /*
>>> +     * VM has SCRATCH_PAGE — exec may succeed with the GPU write
>>> +     * landing on scratch instead of the purged data BO.
>>> +     */
>>> +    ret = __xe_exec(fd, &exec);
>>> +    if (ret == 0) {
>>> +        int64_t timeout = NSEC_PER_SEC;
>>> +
>>> +        __xe_wait_ufence(fd, &vm_sync, PURGEABLE_FENCE_VAL,
>>> +                 exec_queue, &timeout);
>>> +    }
>>> +
>>> +    /*
>>> +     * Don't purge the batch BO — GPU would fetch zeroed scratch
>>> +     * instructions and trigger an engine reset.
>>> +     */
>>> +
>>> +    munmap(data, data_size);
>>> +    munmap(batch, batch_size);
>>> +    gem_close(fd, bo);
>>> +    gem_close(fd, batch_bo);
>>> +    xe_exec_queue_destroy(fd, bind_engine);
>>> +    xe_exec_queue_destroy(fd, exec_queue);
>>> +    xe_vm_destroy(fd, vm);
>>> +}
>>> +
>>>   int igt_main()
>>>   {
>>>       struct drm_xe_engine_class_instance *hwe; @@ -266,6 +400,12 @@
>>> int igt_main()
>>>               break;
>>>           }
>>>
>>> +    igt_subtest("dontneed-before-exec")
>>> +        xe_for_each_engine(fd, hwe) {
>>> +            test_dontneed_before_exec(fd, hwe);
>>> +            break;
>>> +        }
>>> +
>>>       igt_fixture() {
>>>           xe_device_put(fd);
>>>           drm_close_driver(fd);
>> Reviewed-by: Pravalika Gurram <pravalika.gurram@intel.com>
>>> -- 
>>> 2.43.0

Re: [PATCH i-g-t v3 6/8] tests/intel/xe_madvise: Add dontneed-after-exec subtest

[Yadav, Arvind]

On 23-02-2026 12:34, Sharma, Nishit wrote:
>
> On 2/23/2026 10:41 AM, Gurram, Pravalika wrote:
>>
>>> -----Original Message-----
>>> From: Yadav, Arvind <arvind.yadav@intel.com>
>>> Sent: Tuesday, 17 February, 2026 08:04 AM
>>> To: igt-dev@lists.freedesktop.org
>>> Cc: Brost, Matthew <matthew.brost@intel.com>; Ghimiray, Himal Prasad
>>> <himal.prasad.ghimiray@intel.com>; thomas.hellstrom@linux.intel.com;
>>> Sharma, Nishit <nishit.sharma@intel.com>; Gurram, Pravalika
>>> <pravalika.gurram@intel.com>
>>> Subject: [PATCH i-g-t v3 6/8] tests/intel/xe_madvise: Add 
>>> dontneed-after-exec
>>> subtest
>>>
>>> This test verifies that memory can be marked purgeable and reclaimed 
>>> after
>>> successful GPU execution. The test first executes a batch that 
>>> writes to a data
>>> BO and verifies the result. It then marks the BO as DONTNEED, triggers
>>> memory pressure to purge it, and attempts a second execution. The 
>>> second
>>> execution may fail or succeed with scratch rebind, validating that 
>>> the kernel
>>> correctly handles purged BOs in GPU submissions.
>>>
>>> Cc: Nishit Sharma <nishit.sharma@intel.com>
>>> Cc: Pravalika Gurram <pravalika.gurram@intel.com>
>>> Cc: Matthew Brost <matthew.brost@intel.com>
>>> Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
>>> Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
>>> Signed-off-by: Arvind Yadav <arvind.yadav@intel.com>
>>> ---
>>>   tests/intel/xe_madvise.c | 93
>>> ++++++++++++++++++++++++++++++++++++++++
>>>   1 file changed, 93 insertions(+)
>>>
>>> diff --git a/tests/intel/xe_madvise.c b/tests/intel/xe_madvise.c index
>>> 42cf1b3e5..51ef4fad3 100644
>>> --- a/tests/intel/xe_madvise.c
>>> +++ b/tests/intel/xe_madvise.c
>>> @@ -16,6 +16,7 @@
>>>
>>>   #include "xe/xe_ioctl.h"
>>>   #include "xe/xe_query.h"
>>> +#include "lib/igt_syncobj.h"
>>>
>>>   /* Purgeable test constants */
>>>   #define PURGEABLE_ADDR        0x1a0000
>>> @@ -378,6 +379,92 @@ static void test_dontneed_before_exec(int fd, 
>>> struct
>>> drm_xe_engine_class_instanc
>>>       xe_vm_destroy(fd, vm);
>>>   }
>>>
>>> +/**
>>> + * SUBTEST: dontneed-after-exec
>>> + * Description: Mark BO as DONTNEED after GPU exec, verify memory
>>> +becomes inaccessible
>>> + * Test category: functionality test
>>> + */
>>> +static void test_dontneed_after_exec(int fd, struct
>>> +drm_xe_engine_class_instance *hwe) {
>>> +    uint32_t vm, exec_queue, bo, batch_bo, bind_engine;
>>> +    uint64_t data_addr = PURGEABLE_ADDR;
>>> +    uint64_t batch_addr = PURGEABLE_BATCH_ADDR;
>>> +    size_t data_size = PURGEABLE_BO_SIZE;
>>> +    size_t batch_size = PURGEABLE_BO_SIZE;
>>> +    struct drm_xe_sync sync[2] = {
>>> +        { .type = DRM_XE_SYNC_TYPE_USER_FENCE,
>>> +          .flags = DRM_XE_SYNC_FLAG_SIGNAL,
>>> +          .timeline_value = PURGEABLE_FENCE_VAL },
>>> +        { .type = DRM_XE_SYNC_TYPE_SYNCOBJ,
>>> +          .flags = DRM_XE_SYNC_FLAG_SIGNAL },
>>> +    };
>>> +    struct drm_xe_exec exec = {
>>> +        .num_batch_buffer = 1,
>>> +        .num_syncs = 2,
>>> +        .syncs = to_user_pointer(sync),
>>> +    };
>>> +    uint32_t *data, *batch;
>>> +    uint32_t syncobj;
>>> +    int b, ret;
>>> +
>>> +    purgeable_setup_batch_and_data(fd, &vm, &bind_engine,
>>> &batch_bo,
>>> +                       &bo, &batch, &data, batch_addr,
>>> +                       data_addr, batch_size, data_size);
>>> +    memset(data, 0, data_size);
>>> +
>>> +    syncobj = syncobj_create(fd, 0);
>>> +
>>> +    /* Prepare batch to write to data BO */
>>> +    b = 0;
>>> +    batch[b++] = MI_STORE_DWORD_IMM_GEN4;
>>> +    batch[b++] = data_addr;
>>> +    batch[b++] = data_addr >> 32;
>>> +    batch[b++] = 0xfeed0001;
>>> +    batch[b++] = MI_BATCH_BUFFER_END;
>>> +
>>> +    exec_queue = xe_exec_queue_create(fd, vm, hwe, 0);
>>> +    exec.exec_queue_id = exec_queue;
>>> +    exec.address = batch_addr;
>>> +
>>> +    /* Use only syncobj for exec (not USER_FENCE) */
>>> +    sync[1].handle = syncobj;
>>> +    exec.num_syncs = 1;
>>> +    exec.syncs = to_user_pointer(&sync[1]);
> when num_sync  = 1 then why assignment with &sync[1]. Although sync[0] 
> is not used. Either you can have single sync for both xe_exec or use 
> different syncs for each xe_exec


Noted, will be using sync[0] consistently.

>>> +
>>> +    ret = __xe_exec(fd, &exec);
>>> +    igt_assert_eq(ret, 0);
>>> +
>>> +    igt_assert(syncobj_wait(fd, &syncobj, 1, INT64_MAX, 0, NULL));
>>> +    munmap(data, data_size);
>>> +    data = xe_bo_map(fd, bo, data_size);
> igt_assert(data != MAP_FAILED) before using below
>>> +    igt_assert_eq(data[0], 0xfeed0001);
>>> +
>>> +    igt_assert(purgeable_mark_and_verify_purged(fd, vm, data_addr,
>>> +data_size));
>
> Resource cleanup? Although if BO is purged it will assert but is there 
> any chance if BO is purged and it continue execution second xe_exec() 
> which
>
> can lead to undefined behavior?


Noted,

>
>>> +
>>> +    /* Prepare second batch (different value) */
>>> +    b = 0;
>>> +    batch[b++] = MI_STORE_DWORD_IMM_GEN4;
>>> +    batch[b++] = data_addr;
>>> +    batch[b++] = data_addr >> 32;
>>> +    batch[b++] = 0xfeed0002;
>>> +    batch[b++] = MI_BATCH_BUFFER_END;
>>> +
>>> +    ret = __xe_exec(fd, &exec);
>>> +    if (ret == 0) {
>>> +        /* Exec succeeded, but wait may fail on purged BO (both
>>> behaviors valid) */
>>> +        syncobj_wait(fd, &syncobj, 1, INT64_MAX, 0, NULL);
>>> +    }
> We are not checking result in BO after second xe_exec(). Is it 
> intentional?


Yes, intentional because After the data BO is purged, the second exec 
has undefined behavior. With SCRATCH_PAGE, the GPU may write to scratch 
memory (meaningless data) or the exec may fail. The test validates that 
the kernel handles this gracefully without crashing, not that a specific 
value is written.


Thanks,
Arvind

>>> +
>>> +    munmap(data, data_size);
>>> +    munmap(batch, batch_size);
>>> +    gem_close(fd, bo);
>>> +    gem_close(fd, batch_bo);
>>> +    syncobj_destroy(fd, syncobj);
>>> +    xe_exec_queue_destroy(fd, bind_engine);
>>> +    xe_exec_queue_destroy(fd, exec_queue);
>>> +    xe_vm_destroy(fd, vm);
>>> +}
>>> +
>>>   int igt_main()
>>>   {
>>>       struct drm_xe_engine_class_instance *hwe; @@ -406,6 +493,12 @@
>>> int igt_main()
>>>               break;
>>>           }
>>>
>>> +    igt_subtest("dontneed-after-exec")
>>> +        xe_for_each_engine(fd, hwe) {
>>> +            test_dontneed_after_exec(fd, hwe);
>>> +            break;
>>> +        }
>>> +
>> Reviewed-by: Pravalika Gurram <pravalika.gurram@intel.com>
>>>       igt_fixture() {
>>>           xe_device_put(fd);
>>>           drm_close_driver(fd);
>>> -- 
>>> 2.43.0

Re: [PATCH i-g-t v3 7/8] tests/intel/xe_madvise: Add per-vma-tracking subtest

[Yadav, Arvind]

On 23-02-2026 12:47, Sharma, Nishit wrote:
>
> On 2/23/2026 10:41 AM, Gurram, Pravalika wrote:
>>
>>> -----Original Message-----
>>> From: Yadav, Arvind <arvind.yadav@intel.com>
>>> Sent: Tuesday, 17 February, 2026 08:04 AM
>>> To: igt-dev@lists.freedesktop.org
>>> Cc: Brost, Matthew <matthew.brost@intel.com>; Ghimiray, Himal Prasad
>>> <himal.prasad.ghimiray@intel.com>; thomas.hellstrom@linux.intel.com;
>>> Sharma, Nishit <nishit.sharma@intel.com>; Gurram, Pravalika
>>> <pravalika.gurram@intel.com>
>>> Subject: [PATCH i-g-t v3 7/8] tests/intel/xe_madvise: Add 
>>> per-vma-tracking
>>> subtest
>>>
>>> This test validates that purgeable state is tracked per-VMA when a 
>>> single BO is
>>> bound in multiple VMs. The test creates one BO shared across two VMs at
>>> different virtual addresses. It verifies that marking only one VMA as
>>> DONTNEED does not make the BO purgeable, but marking both VMAs as
>>> DONTNEED allows the kernel to purge the shared BO. This ensures 
>>> proper per-
>>> VMA tracking for shared memory.
>>>
>>> Cc: Nishit Sharma <nishit.sharma@intel.com>
>>> Cc: Pravalika Gurram <pravalika.gurram@intel.com>
>>> Cc: Matthew Brost <matthew.brost@intel.com>
>>> Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
>>> Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
>>> Signed-off-by: Arvind Yadav <arvind.yadav@intel.com>
>>> ---
>>>   tests/intel/xe_madvise.c | 109
>>> +++++++++++++++++++++++++++++++++++++++
>>>   1 file changed, 109 insertions(+)
>>>
>>> diff --git a/tests/intel/xe_madvise.c b/tests/intel/xe_madvise.c index
>>> 51ef4fad3..4e7df54a7 100644
>>> --- a/tests/intel/xe_madvise.c
>>> +++ b/tests/intel/xe_madvise.c
>>> @@ -20,6 +20,7 @@
>>>
>>>   /* Purgeable test constants */
>>>   #define PURGEABLE_ADDR        0x1a0000
>>> +#define PURGEABLE_ADDR2        0x2b0000
>>>   #define PURGEABLE_BATCH_ADDR    0x3c0000
>>>   #define PURGEABLE_BO_SIZE    4096
>>>   #define PURGEABLE_FENCE_VAL    0xbeef
>>> @@ -205,6 +206,58 @@ static void purgeable_setup_batch_and_data(int fd,
>>> uint32_t *vm,
>>>       xe_wait_ufence(fd, &vm_sync, PURGEABLE_FENCE_VAL, 0,
>>> NSEC_PER_SEC);  }
>>>
>>> +/**
>>> + * purgeable_setup_two_vms_shared_bo - Setup two VMs with one shared
>>> BO
>>> + * @fd: DRM file descriptor
>>> + * @vm1: Output first VM handle
>>> + * @vm2: Output second VM handle
>>> + * @bo: Output shared BO handle
>>> + * @addr1: Virtual address in VM1
>>> + * @addr2: Virtual address in VM2
>>> + * @size: Size of the BO
>>> + * @use_scratch: Whether to use scratch page flag for VMs
>>> + *
>>> + * Helper to create two VMs and bind one shared BO in both VMs.
>>> + * Returns mapped pointer to the BO.
>>> + */
>>> +static void *purgeable_setup_two_vms_shared_bo(int fd, uint32_t *vm1,
>>> uint32_t *vm2,
>>> +                           uint32_t *bo, uint64_t addr1,
>>> +                           uint64_t addr2, size_t size,
>>> +                           bool use_scratch)
>>> +{
>>> +    struct drm_xe_sync sync = {
>>> +        .type = DRM_XE_SYNC_TYPE_USER_FENCE,
>>> +        .flags = DRM_XE_SYNC_FLAG_SIGNAL,
>>> +        .timeline_value = 1,
>>> +    };
>>> +    uint64_t sync_val = 0;
>>> +    void *map;
>>> +
>>> +    /* Create two VMs */
>>> +    *vm1 = xe_vm_create(fd, use_scratch ?
>>> DRM_XE_VM_CREATE_FLAG_SCRATCH_PAGE : 0, 0);
>>> +    *vm2 = xe_vm_create(fd, use_scratch ?
>>> +DRM_XE_VM_CREATE_FLAG_SCRATCH_PAGE : 0, 0);
>>> +
>>> +    /* Create shared BO */
>>> +    *bo = xe_bo_create(fd, 0, size, vram_if_possible(fd, 0),
>>> +
>>> DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);
>>> +
>>> +    map = xe_bo_map(fd, *bo, size);
>>> +    memset(map, 0xAB, size);
>>> +
>>> +    /* Bind BO in VM1 */
>>> +    sync.addr = to_user_pointer(&sync_val);
>>> +    sync_val = 0;
>>> +    xe_vm_bind_async(fd, *vm1, 0, *bo, 0, addr1, size, &sync, 1);
>>> +    xe_wait_ufence(fd, &sync_val, 1, 0, NSEC_PER_SEC);
>>> +
>>> +    /* Bind BO in VM2 */
>>> +    sync_val = 0;
>>> +    xe_vm_bind_async(fd, *vm2, 0, *bo, 0, addr2, size, &sync, 1);
>>> +    xe_wait_ufence(fd, &sync_val, 1, 0, NSEC_PER_SEC);
>>> +
>>> +    return map;
>>> +}
>>> +
>>>   /**
>>>    * SUBTEST: dontneed-before-mmap
>>>    * Description: Mark BO as DONTNEED before mmap, verify mmap fails or
>>> SIGBUS on access @@ -465,6 +518,56 @@ static void
>>> test_dontneed_after_exec(int fd, struct drm_xe_engine_class_instance
>>>       xe_vm_destroy(fd, vm);
>>>   }
>>>
>>> +/**
>>> + * SUBTEST: per-vma-tracking
>>> + * Description: One BO in two VMs becomes purgeable only when both
>>> VMAs
>>> +are DONTNEED
>>> + * Test category: functionality test
>>> + */
>>> +static void test_per_vma_tracking(int fd, struct
>>> +drm_xe_engine_class_instance *hwe) {
>>> +    uint32_t bo, vm1, vm2;
>>> +    uint64_t addr1 = PURGEABLE_ADDR;
>>> +    uint64_t addr2 = PURGEABLE_ADDR2;
>>> +    size_t bo_size = PURGEABLE_BO_SIZE;
>>> +    uint32_t retained;
>>> +    void *map;
>>> +
>>> +    map = purgeable_setup_two_vms_shared_bo(fd, &vm1, &vm2, &bo,
>>> +                        addr1, addr2,
>>> +                        bo_size, false);
>>> +
>>> +    /* Mark VMA1 as DONTNEED */
>>> +    retained = xe_vm_madvise_purgeable(fd, vm1, addr1, bo_size,
>>> +
>>> DRM_XE_VMA_PURGEABLE_STATE_DONTNEED);
>>> +    igt_assert_eq(retained, 1);
>>> +
>>> +    /* Verify BO NOT purgeable (VMA2 still WILLNEED) */
>>> +    retained = xe_vm_madvise_purgeable(fd, vm1, addr1, bo_size,
>>> +
>>> DRM_XE_VMA_PURGEABLE_STATE_WILLNEED);
>>> +    igt_assert_eq(retained, 1);
>>> +
>>> +    /* Mark both VMAs as DONTNEED */
>>> +    retained = xe_vm_madvise_purgeable(fd, vm1, addr1, bo_size,
>>> +
>>> DRM_XE_VMA_PURGEABLE_STATE_DONTNEED);
>>> +    igt_assert_eq(retained, 1);
>>> +
>>> +    retained = xe_vm_madvise_purgeable(fd, vm2, addr2, bo_size,
>>> +
>>> DRM_XE_VMA_PURGEABLE_STATE_DONTNEED);
>>> +    igt_assert_eq(retained, 1);
>>> +
>>> +    /* Trigger pressure and verify BO was purged */
>>> +    trigger_memory_pressure(fd, vm1);
> Triggering pressure on single VM is fine as both VMAs are DONTNEED. 
> You can mention in comment otherwise fine.


Noted,

Thanks
Arvind

>>> +
>>> +    retained = xe_vm_madvise_purgeable(fd, vm1, addr1, bo_size,
>>> +
>>> DRM_XE_VMA_PURGEABLE_STATE_WILLNEED);
>>> +    igt_assert_eq(retained, 0);
>>> +
>>> +    munmap(map, bo_size);
>>> +    gem_close(fd, bo);
>>> +    xe_vm_destroy(fd, vm1);
>>> +    xe_vm_destroy(fd, vm2);
>>> +}
>>> +
>>>   int igt_main()
>>>   {
>>>       struct drm_xe_engine_class_instance *hwe; @@ -499,6 +602,12 @@
>>> int igt_main()
>>>               break;
>>>           }
>>>
>>> +    igt_subtest("per-vma-tracking")
>>> +        xe_for_each_engine(fd, hwe) {
>>> +            test_per_vma_tracking(fd, hwe);
>>> +            break;
>>> +        }
>>> +
>> Reviewed-by: Pravalika Gurram <pravalika.gurram@intel.com>
> Reviewed-by: Nishit Sharma <nishit.sharma@intel.com>
>>>       igt_fixture() {
>>>           xe_device_put(fd);
>>>           drm_close_driver(fd);
>>> -- 
>>> 2.43.0