Re: [PATCH i-g-t v3 6/8] tests/intel/xe_madvise: Add dontneed-after-exec subtest

["Yadav, Arvind" <arvind.yadav@intel.com>]

On 23-02-2026 12:34, Sharma, Nishit wrote:
>
> On 2/23/2026 10:41 AM, Gurram, Pravalika wrote:
>>
>>> -----Original Message-----
>>> From: Yadav, Arvind <arvind.yadav@intel.com>
>>> Sent: Tuesday, 17 February, 2026 08:04 AM
>>> To: igt-dev@lists.freedesktop.org
>>> Cc: Brost, Matthew <matthew.brost@intel.com>; Ghimiray, Himal Prasad
>>> <himal.prasad.ghimiray@intel.com>; thomas.hellstrom@linux.intel.com;
>>> Sharma, Nishit <nishit.sharma@intel.com>; Gurram, Pravalika
>>> <pravalika.gurram@intel.com>
>>> Subject: [PATCH i-g-t v3 6/8] tests/intel/xe_madvise: Add 
>>> dontneed-after-exec
>>> subtest
>>>
>>> This test verifies that memory can be marked purgeable and reclaimed 
>>> after
>>> successful GPU execution. The test first executes a batch that 
>>> writes to a data
>>> BO and verifies the result. It then marks the BO as DONTNEED, triggers
>>> memory pressure to purge it, and attempts a second execution. The 
>>> second
>>> execution may fail or succeed with scratch rebind, validating that 
>>> the kernel
>>> correctly handles purged BOs in GPU submissions.
>>>
>>> Cc: Nishit Sharma <nishit.sharma@intel.com>
>>> Cc: Pravalika Gurram <pravalika.gurram@intel.com>
>>> Cc: Matthew Brost <matthew.brost@intel.com>
>>> Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
>>> Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
>>> Signed-off-by: Arvind Yadav <arvind.yadav@intel.com>
>>> ---
>>>   tests/intel/xe_madvise.c | 93
>>> ++++++++++++++++++++++++++++++++++++++++
>>>   1 file changed, 93 insertions(+)
>>>
>>> diff --git a/tests/intel/xe_madvise.c b/tests/intel/xe_madvise.c index
>>> 42cf1b3e5..51ef4fad3 100644
>>> --- a/tests/intel/xe_madvise.c
>>> +++ b/tests/intel/xe_madvise.c
>>> @@ -16,6 +16,7 @@
>>>
>>>   #include "xe/xe_ioctl.h"
>>>   #include "xe/xe_query.h"
>>> +#include "lib/igt_syncobj.h"
>>>
>>>   /* Purgeable test constants */
>>>   #define PURGEABLE_ADDR        0x1a0000
>>> @@ -378,6 +379,92 @@ static void test_dontneed_before_exec(int fd, 
>>> struct
>>> drm_xe_engine_class_instanc
>>>       xe_vm_destroy(fd, vm);
>>>   }
>>>
>>> +/**
>>> + * SUBTEST: dontneed-after-exec
>>> + * Description: Mark BO as DONTNEED after GPU exec, verify memory
>>> +becomes inaccessible
>>> + * Test category: functionality test
>>> + */
>>> +static void test_dontneed_after_exec(int fd, struct
>>> +drm_xe_engine_class_instance *hwe) {
>>> +    uint32_t vm, exec_queue, bo, batch_bo, bind_engine;
>>> +    uint64_t data_addr = PURGEABLE_ADDR;
>>> +    uint64_t batch_addr = PURGEABLE_BATCH_ADDR;
>>> +    size_t data_size = PURGEABLE_BO_SIZE;
>>> +    size_t batch_size = PURGEABLE_BO_SIZE;
>>> +    struct drm_xe_sync sync[2] = {
>>> +        { .type = DRM_XE_SYNC_TYPE_USER_FENCE,
>>> +          .flags = DRM_XE_SYNC_FLAG_SIGNAL,
>>> +          .timeline_value = PURGEABLE_FENCE_VAL },
>>> +        { .type = DRM_XE_SYNC_TYPE_SYNCOBJ,
>>> +          .flags = DRM_XE_SYNC_FLAG_SIGNAL },
>>> +    };
>>> +    struct drm_xe_exec exec = {
>>> +        .num_batch_buffer = 1,
>>> +        .num_syncs = 2,
>>> +        .syncs = to_user_pointer(sync),
>>> +    };
>>> +    uint32_t *data, *batch;
>>> +    uint32_t syncobj;
>>> +    int b, ret;
>>> +
>>> +    purgeable_setup_batch_and_data(fd, &vm, &bind_engine,
>>> &batch_bo,
>>> +                       &bo, &batch, &data, batch_addr,
>>> +                       data_addr, batch_size, data_size);
>>> +    memset(data, 0, data_size);
>>> +
>>> +    syncobj = syncobj_create(fd, 0);
>>> +
>>> +    /* Prepare batch to write to data BO */
>>> +    b = 0;
>>> +    batch[b++] = MI_STORE_DWORD_IMM_GEN4;
>>> +    batch[b++] = data_addr;
>>> +    batch[b++] = data_addr >> 32;
>>> +    batch[b++] = 0xfeed0001;
>>> +    batch[b++] = MI_BATCH_BUFFER_END;
>>> +
>>> +    exec_queue = xe_exec_queue_create(fd, vm, hwe, 0);
>>> +    exec.exec_queue_id = exec_queue;
>>> +    exec.address = batch_addr;
>>> +
>>> +    /* Use only syncobj for exec (not USER_FENCE) */
>>> +    sync[1].handle = syncobj;
>>> +    exec.num_syncs = 1;
>>> +    exec.syncs = to_user_pointer(&sync[1]);
> when num_sync  = 1 then why assignment with &sync[1]. Although sync[0] 
> is not used. Either you can have single sync for both xe_exec or use 
> different syncs for each xe_exec


Noted, will be using sync[0] consistently.

>>> +
>>> +    ret = __xe_exec(fd, &exec);
>>> +    igt_assert_eq(ret, 0);
>>> +
>>> +    igt_assert(syncobj_wait(fd, &syncobj, 1, INT64_MAX, 0, NULL));
>>> +    munmap(data, data_size);
>>> +    data = xe_bo_map(fd, bo, data_size);
> igt_assert(data != MAP_FAILED) before using below
>>> +    igt_assert_eq(data[0], 0xfeed0001);
>>> +
>>> +    igt_assert(purgeable_mark_and_verify_purged(fd, vm, data_addr,
>>> +data_size));
>
> Resource cleanup? Although if BO is purged it will assert but is there 
> any chance if BO is purged and it continue execution second xe_exec() 
> which
>
> can lead to undefined behavior?


Noted,

>
>>> +
>>> +    /* Prepare second batch (different value) */
>>> +    b = 0;
>>> +    batch[b++] = MI_STORE_DWORD_IMM_GEN4;
>>> +    batch[b++] = data_addr;
>>> +    batch[b++] = data_addr >> 32;
>>> +    batch[b++] = 0xfeed0002;
>>> +    batch[b++] = MI_BATCH_BUFFER_END;
>>> +
>>> +    ret = __xe_exec(fd, &exec);
>>> +    if (ret == 0) {
>>> +        /* Exec succeeded, but wait may fail on purged BO (both
>>> behaviors valid) */
>>> +        syncobj_wait(fd, &syncobj, 1, INT64_MAX, 0, NULL);
>>> +    }
> We are not checking result in BO after second xe_exec(). Is it 
> intentional?


Yes, intentional because After the data BO is purged, the second exec 
has undefined behavior. With SCRATCH_PAGE, the GPU may write to scratch 
memory (meaningless data) or the exec may fail. The test validates that 
the kernel handles this gracefully without crashing, not that a specific 
value is written.


Thanks,
Arvind

>>> +
>>> +    munmap(data, data_size);
>>> +    munmap(batch, batch_size);
>>> +    gem_close(fd, bo);
>>> +    gem_close(fd, batch_bo);
>>> +    syncobj_destroy(fd, syncobj);
>>> +    xe_exec_queue_destroy(fd, bind_engine);
>>> +    xe_exec_queue_destroy(fd, exec_queue);
>>> +    xe_vm_destroy(fd, vm);
>>> +}
>>> +
>>>   int igt_main()
>>>   {
>>>       struct drm_xe_engine_class_instance *hwe; @@ -406,6 +493,12 @@
>>> int igt_main()
>>>               break;
>>>           }
>>>
>>> +    igt_subtest("dontneed-after-exec")
>>> +        xe_for_each_engine(fd, hwe) {
>>> +            test_dontneed_after_exec(fd, hwe);
>>> +            break;
>>> +        }
>>> +
>> Reviewed-by: Pravalika Gurram <pravalika.gurram@intel.com>
>>>       igt_fixture() {
>>>           xe_device_put(fd);
>>>           drm_close_driver(fd);
>>> -- 
>>> 2.43.0