Re: [i-g-t] tests/intel/xe_ccs: split block-multicopy into 3 submissions

["Randhawa, Jagmeet" <jagmeet.randhawa@intel.com>]

On 1/7/2026 3:30 PM, Matt Roper wrote:
> On Thu, Jan 08, 2026 at 03:43:29AM +0800, Jagmeet Randhawa wrote:
>> Split the block multicopy test into separate batch buffer
>> submissions. Submitting multiple block copies within a
>> single submission can  result in incorrect ordering between
>> stages. Run each copy as it's own submission then wait for
>> completion between stages to ensure proper sequencing
>> to prevent the read-after-write hazards.
> I mentioned this in an offline chat, but wouldn't it be cleaner and more
> accurate to insert MI_FLUSH instructions to trigger the necessary stalls
> between copies to enforce ordering and clear the RAW hazards?  Breaking
> the work into three separate submissions probably winds up working
> because we get implicit stalls due to the preamble and postamble
> instructions that the KMD inserts into the ring between submissions, but
> when there are dependencies and hazards between instructions within a
> single context, I think userspace should be able to clear them on its
> own by requesting the stalls explicitly.
>
>
> Matt


Right, We can disregard this patch in that case. I will work on 
inserting the MI_FLUSH instructions to trigger the stalls instead of 
splitting the submissions. Thank you for the review.

Jagmeet

>
>> Signed-off-by: Jagmeet Randhawa <jagmeet.randhawa@intel.com>
>> ---
>>   tests/intel/xe_ccs.c | 14 ++++++++------
>>   1 file changed, 8 insertions(+), 6 deletions(-)
>>
>> diff --git a/tests/intel/xe_ccs.c b/tests/intel/xe_ccs.c
>> index a21922ee5..33dde0c1f 100644
>> --- a/tests/intel/xe_ccs.c
>> +++ b/tests/intel/xe_ccs.c
>> @@ -281,8 +281,6 @@ static int blt_block_copy3(int xe,
>>   	struct blt_copy_data blt0;
>>   	struct blt_block_copy_data_ext ext0;
>>   	uint64_t bb_offset, alignment;
>> -	uint64_t bb_pos = 0;
>> -	int ret;
>>   
>>   	igt_assert_f(ahnd, "block-copy3 supports softpin only\n");
>>   	igt_assert_f(blt3, "block-copy3 requires data to do blit\n");
>> @@ -303,7 +301,9 @@ static int blt_block_copy3(int xe,
>>   	blt0.print_bb = blt3->print_bb;
>>   	ext0.src = ext3->src;
>>   	ext0.dst = ext3->mid;
>> -	bb_pos = emit_blt_block_copy(xe, ahnd, &blt0, &ext0, bb_pos, false);
>> +	emit_blt_block_copy(xe, ahnd, &blt0, &ext0, 0, true);
>> +	intel_ctx_xe_exec(ctx, ahnd, bb_offset);
>> +	intel_ctx_xe_sync((intel_ctx_t *)ctx, true);
>>   
>>   	/* Second blit mid -> dst */
>>   	blt_copy_init(xe, &blt0);
>> @@ -314,7 +314,9 @@ static int blt_block_copy3(int xe,
>>   	blt0.print_bb = blt3->print_bb;
>>   	ext0.src = ext3->mid;
>>   	ext0.dst = ext3->dst;
>> -	bb_pos = emit_blt_block_copy(xe, ahnd, &blt0, &ext0, bb_pos, false);
>> +	emit_blt_block_copy(xe, ahnd, &blt0, &ext0, 0, true);
>> +	intel_ctx_xe_exec(ctx, ahnd, bb_offset);
>> +	intel_ctx_xe_sync((intel_ctx_t *)ctx, true);
>>   
>>   	/* Third blit dst -> final */
>>   	blt_copy_init(xe, &blt0);
>> @@ -325,11 +327,11 @@ static int blt_block_copy3(int xe,
>>   	blt0.print_bb = blt3->print_bb;
>>   	ext0.src = ext3->dst;
>>   	ext0.dst = ext3->final;
>> -	bb_pos = emit_blt_block_copy(xe, ahnd, &blt0, &ext0, bb_pos, true);
>> +	emit_blt_block_copy(xe, ahnd, &blt0, &ext0, 0, true);
>>   
>>   	intel_ctx_xe_exec(ctx, ahnd, bb_offset);
>>   
>> -	return ret;
>> +	return 0;
>>   }
>>   
>>   #define CHECK_MIN_WIDTH 2
>> -- 
>> 2.52.0
>>