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From: "B, Jeevan" <jeevan.b@intel.com>
To: "Kempczynski, Zbigniew" <zbigniew.kempczynski@intel.com>
Date: Fri, 25 Feb 2022 06:33:43 +0000
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Subject: Re: [igt-dev] [PATCH i-g-t 02/10] include/drm-uapi: Introduce new
 Tile 4 format
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Cc: "igt-dev@lists.freedesktop.org" <igt-dev@lists.freedesktop.org>, "Heikkila,
 Juha-pekka" <juha-pekka.heikkila@intel.com>, "Latvala,
 Petri" <petri.latvala@intel.com>
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>-----Original Message-----
>From: Kempczynski, Zbigniew <zbigniew.kempczynski@intel.com>
>Sent: Friday, February 25, 2022 11:48 AM
>To: B, Jeevan <jeevan.b@intel.com>
>Cc: igt-dev@lists.freedesktop.org; Heikkila, Juha-pekka <juha-
>pekka.heikkila@intel.com>; Latvala, Petri <petri.latvala@intel.com>; Lisov=
skiy,
>Stanislav <stanislav.lisovskiy@intel.com>
>Subject: Re: [PATCH i-g-t 02/10] include/drm-uapi: Introduce new Tile 4 fo=
rmat
>
>On Fri, Feb 25, 2022 at 10:38:45AM +0530, Jeevan B wrote:
>> This tiling layout uses 4KB tiles in a row-major layout. It has the
>> same shape as Tile Y at two granularities: 4KB (128B x 32) and 64B
>> (16B x 4). It only differs from Tile Y at the 256B granularity in
>> between. At this granularity, Tile Y has a shape of 16B x 32 rows, but
>> this tiling has a shape of 64B x 8 rows.
>>
>> Reference:
>> https://cgit.freedesktop.org/drm/drm-tip/commit/?id=3Dc6e7deb0f092616bd8
>> cb19e8c436b212c64daaab
>>
>> Signed-off-by: Jeevan B <jeevan.b@intel.com>
>> ---
>>  include/drm-uapi/drm_fourcc.h | 11 +++++++++++
>>  1 file changed, 11 insertions(+)
>>
>> diff --git a/include/drm-uapi/drm_fourcc.h
>> b/include/drm-uapi/drm_fourcc.h index 91b6a0fd..318b50fa 100644
>> --- a/include/drm-uapi/drm_fourcc.h
>> +++ b/include/drm-uapi/drm_fourcc.h
>> @@ -559,6 +559,17 @@ extern "C" {
>>   */
>>  #define I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC
>> fourcc_mod_code(INTEL, 8)
>>
>> +/*
>> + * Intel Tile 4 layout
>> + *
>> + * This is a tiled layout using 4KB tiles in a row-major layout. It
>> +has the same
>> + * shape as Tile Y at two granularities: 4KB (128B x 32) and 64B (16B
>> +x 4). It
>> + * only differs from Tile Y at the 256B granularity in between. At
>> +this
>> + * granularity, Tile Y has a shape of 16B x 32 rows, but this tiling
>> +has a shape
>> + * of 64B x 8 rows.
>> + */
>> +#define I915_FORMAT_MOD_4_TILED         fourcc_mod_code(INTEL, 9)
>> +
>>  /*
>>   * Tiled, NV12MT, grouped in 64 (pixels) x 32 (lines) -sized macroblock=
s
>>   *
>> --
>> 2.17.1
>>
>
>I think you should sync this file, not only apply this change.
Sure will do this.=20

Thanks=20
Jeevan B
>
>--
>Zbigniew