From: Daniel Charles <daniel.charles@intel.com>
To: Xin Wang <x.wang@intel.com>, <igt-dev@lists.freedesktop.org>
Cc: Niranjana Vishwanathapura <niranjana.vishwanathapura@intel.com>,
"Matthew Brost" <matthew.brost@intel.com>
Subject: Re: [v2,4/4] tests/intel: skip or adjust tests for non-multi-LRC engine classes
Date: Mon, 6 Apr 2026 15:35:14 -0700 [thread overview]
Message-ID: <7cb15d68-2893-44b3-9785-215b9b4fbd61@intel.com> (raw)
In-Reply-To: <20260403071322.366766-5-x.wang@intel.com>
On 4/3/2026 12:13 AM, Xin Wang wrote:
> Use xe_engine_class_supports_multi_lrc() to guard multi-LRC test paths:
>
> - xe_exec_balancer: skip tests requiring multi-LRC if the engine class
> does not support it
> - xe_exec_reset: same guard for the balancer subtest
> - xe_drm_fdinfo: skip utilization_multi() for non-multi-LRC classes
> - xe_exec_threads: assert multi-LRC support before test_balancer()
> - xe_exec_multi_queue: only validate parallel-queue rejection (-EINVAL)
> for engine classes that support multi-LRC; non-multi-LRC classes do
> not accept the MULTI_GROUP flag at all so the check is irrelevant
>
> Cc: Niranjana Vishwanathapura <niranjana.vishwanathapura@intel.com>
> Cc: Matthew Brost <matthew.brost@intel.com>
> Signed-off-by: Xin Wang <x.wang@intel.com>
> ---
> tests/intel/xe_drm_fdinfo.c | 2 +-
> tests/intel/xe_exec_balancer.c | 6 +++---
> tests/intel/xe_exec_multi_queue.c | 2 +-
> tests/intel/xe_exec_reset.c | 2 +-
> tests/intel/xe_exec_threads.c | 1 +
> 5 files changed, 7 insertions(+), 6 deletions(-)
>
> diff --git a/tests/intel/xe_drm_fdinfo.c b/tests/intel/xe_drm_fdinfo.c
> index 411ca6ec4..3c113ed5d 100644
> --- a/tests/intel/xe_drm_fdinfo.c
> +++ b/tests/intel/xe_drm_fdinfo.c
> @@ -673,7 +673,7 @@ utilization_multi(int fd, int gt, int class, unsigned int flags)
> igt_assert(virtual ^ parallel);
>
> num_placements = xe_gt_fill_engines_by_class(fd, gt, class, eci);
> - if (num_placements < 2)
> + if (num_placements < 2 || !xe_engine_class_supports_multi_lrc(fd, class))
> return;
>
> igt_debug("Target class: %s\n", engine_map[class]);
> diff --git a/tests/intel/xe_exec_balancer.c b/tests/intel/xe_exec_balancer.c
> index 9cd641b4e..3c6ec45f1 100644
> --- a/tests/intel/xe_exec_balancer.c
> +++ b/tests/intel/xe_exec_balancer.c
> @@ -57,7 +57,7 @@ static bool test_all_active(int fd, int gt, int class)
> int i, num_placements;
>
> num_placements = xe_gt_fill_engines_by_class(fd, gt, class, eci);
> - if (num_placements < 2)
> + if (num_placements < 2 || !xe_engine_class_supports_multi_lrc(fd, class))
> return false;
>
> vm = xe_vm_create(fd, 0, 0);
> @@ -187,7 +187,7 @@ test_exec(int fd, int gt, int class, int n_exec_queues, int n_execs,
> igt_assert_lte(n_exec_queues, MAX_N_EXEC_QUEUES);
>
> num_placements = xe_gt_fill_engines_by_class(fd, gt, class, eci);
> - if (num_placements < 2)
> + if (num_placements < 2 || !xe_engine_class_supports_multi_lrc(fd, class))
> return false;
>
> vm = xe_vm_create(fd, 0, 0);
> @@ -402,7 +402,7 @@ test_cm(int fd, int gt, int class, int n_exec_queues, int n_execs,
> igt_assert_lte(n_exec_queues, MAX_N_EXEC_QUEUES);
>
> num_placements = xe_gt_fill_engines_by_class(fd, gt, class, eci);
> - if (num_placements < 2)
> + if (num_placements < 2 || !xe_engine_class_supports_multi_lrc(fd, class))
> return false;
>
> vm = xe_vm_create(fd, DRM_XE_VM_CREATE_FLAG_LR_MODE, 0);
> diff --git a/tests/intel/xe_exec_multi_queue.c b/tests/intel/xe_exec_multi_queue.c
> index b5ded0633..ca96099d3 100644
> --- a/tests/intel/xe_exec_multi_queue.c
> +++ b/tests/intel/xe_exec_multi_queue.c
> @@ -112,7 +112,7 @@ __test_sanity(int fd, int gt, int class, bool preempt_mode)
>
> /* Multi-Queue can't be a parallel queue */
> multi_queue.value = DRM_XE_MULTI_GROUP_CREATE;
> - if (n > 1)
> + if (n > 1 && xe_engine_class_supports_multi_lrc(fd, class))
> igt_assert_eq(__xe_exec_queue_create(fd, vm, 2, 1, eci, ext, &val), -EINVAL);
>
> /* Specifying multiple MULTI_GROUP property is invalid */
> diff --git a/tests/intel/xe_exec_reset.c b/tests/intel/xe_exec_reset.c
> index 7aaee31dd..95191139d 100644
> --- a/tests/intel/xe_exec_reset.c
> +++ b/tests/intel/xe_exec_reset.c
> @@ -184,7 +184,7 @@ test_balancer(int fd, int gt, int class, int n_exec_queues, int n_execs,
> fd = drm_open_driver(DRIVER_XE);
>
> num_placements = xe_gt_fill_engines_by_class(fd, gt, class, eci);
> - if (num_placements < 2)
> + if (num_placements < 2 || !xe_engine_class_supports_multi_lrc(fd, class))
> return;
>
> vm = xe_vm_create(fd, 0, 0);
> diff --git a/tests/intel/xe_exec_threads.c b/tests/intel/xe_exec_threads.c
> index ab9565beb..7b8100c5b 100644
> --- a/tests/intel/xe_exec_threads.c
> +++ b/tests/intel/xe_exec_threads.c
> @@ -85,6 +85,7 @@ test_balancer(int fd, int gt, uint32_t vm, uint64_t addr, uint64_t userptr,
>
> num_placements = xe_gt_fill_engines_by_class(fd, gt, class, eci);
> igt_assert_lt(1, num_placements);
> + igt_assert(xe_engine_class_supports_multi_lrc(fd, class));
>
> bo_size = sizeof(*data) * n_execs;
> bo_size = xe_bb_size(fd, bo_size);
Reviewed-by:Daniel Charles <daniel.charles@intel.com>
next prev parent reply other threads:[~2026-04-06 22:35 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-03 7:13 [PATCH v2 0/4] lib/xe: query engine class capabilities from debugfs info Xin Wang
2026-04-03 7:13 ` [PATCH v2 1/4] lib/xe: cache engine class masks " Xin Wang
2026-04-06 22:25 ` [v2,1/4] " Daniel Charles
2026-04-03 7:13 ` [PATCH v2 2/4] lib/xe: add xe_engine_class_supports_multi_lrc() Xin Wang
2026-04-06 22:32 ` [v2,2/4] " Daniel Charles
2026-04-03 7:13 ` [PATCH v2 3/4] lib/xe: use debugfs info to implement xe_engine_class_supports_multi_queue() Xin Wang
2026-04-06 22:34 ` [v2,3/4] " Daniel Charles
2026-04-03 7:13 ` [PATCH v2 4/4] tests/intel: skip or adjust tests for non-multi-LRC engine classes Xin Wang
2026-04-06 22:35 ` Daniel Charles [this message]
2026-04-03 8:03 ` ✓ i915.CI.BAT: success for lib/xe: query engine class capabilities from debugfs info (rev2) Patchwork
2026-04-03 8:06 ` ✓ Xe.CI.BAT: " Patchwork
2026-04-03 13:37 ` ✓ Xe.CI.FULL: " Patchwork
2026-04-03 23:35 ` ✗ i915.CI.Full: failure " Patchwork
2026-04-08 2:15 ` Wang, X
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