From: Matthew Auld <matthew.auld@intel.com>
To: "Zbigniew Kempczyński" <zbigniew.kempczynski@intel.com>,
igt-dev@lists.freedesktop.org
Subject: Re: [PATCH i-g-t 2/2] tests/xe_pat: Verify PTA PAT entries contain expected values
Date: Thu, 26 Mar 2026 15:52:38 +0000 [thread overview]
Message-ID: <822d4aef-ea23-4c91-9e9f-bd3a52baa364@intel.com> (raw)
In-Reply-To: <20260326113425.520545-6-zbigniew.kempczynski@intel.com>
On 26/03/2026 11:34, Zbigniew Kempczyński wrote:
> Debugfs exposes PTA PAT entries for different GTs so verify they
> contain expected values. Verify they are correct also in reset
> and suspend scenarios.
Is this just validating the sw angle? i.e that the debugfs interface
still reports the correct thing?
If this is hw angle then this might be tricky to validate, since the
debugfs dump is just the static array of indices, AFAIK. Not what is
actually programmed in each PAT register. For example, if we somehow
forget to reprogram the PTA registers after suspend/reset, I don't think
this test would catch this, right?
>
> Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
> Cc: Matthew Auld <matthew.auld@intel.com>
> ---
> tests/intel/xe_pat.c | 97 ++++++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 97 insertions(+)
>
> diff --git a/tests/intel/xe_pat.c b/tests/intel/xe_pat.c
> index 2e2d7e01e7..7e5dc9f44f 100644
> --- a/tests/intel/xe_pat.c
> +++ b/tests/intel/xe_pat.c
> @@ -2115,6 +2115,93 @@ static void pt_caching_test(int xe, enum pt_test_opts opts)
> pt_destroy_objects(xe, objs2, num_objs);
> }
>
> +enum pt_pta_test_opts {
> + PT_PTA_CHECK = 1,
> + PT_PTA_RESET_GT = 2,
> + PT_PTA_SUSPEND = 3,
> +};
> +
> +#define XE2_PAT(no_promote, comp_en, l3clos, l3_policy, l4_policy, __coh_mode) \
> + ((no_promote << 10) | \
> + (comp_en << 9) | \
> + (l3clos << 6) | \
> + (l3_policy << 4) | \
> + (l4_policy << 2) | \
> + (__coh_mode))
> +
> +
> +#define NUMGT 2
> +static uint32_t xe2_pta[NUMGT] = {
> + XE2_PAT( 0, 0, 0, 0, 3, 0 ),
> + XE2_PAT( 0, 0, 0, 0, 3, 0 )
> +};
> +
> +static uint32_t xe3p_pta[NUMGT] = {
> + XE2_PAT( 0, 0, 0, 0, 0, 3 ),
> + XE2_PAT( 0, 0, 0, 0, 0, 2 )
> +};
> +
> +static uint32_t xe3p_xpc_pta[NUMGT] = {
> + XE2_PAT( 0, 0, 0, 0, 0, 0 ),
> + XE2_PAT( 0, 0, 0, 0, 0, 0 )
> +};
> +
> +static uint32_t get_expected_pta(int fd, int gt)
> +{
> + uint32_t devid = intel_get_drm_devid(fd);
> + uint32_t ip_ver = intel_graphics_ver(devid);
> + int ver = intel_gen(devid);
> + uint32_t pta = 0;
> +
> + igt_assert_lt(gt, NUMGT);
> +
> + if (ip_ver == IP_VER(35, 11))
> + pta = xe3p_xpc_pta[gt];
> + else if (ver == 35 && !xe_has_vram(fd))
> + pta = xe3p_pta[gt];
> + else if ((ver == 30 || ver == 20) && xe_has_vram(fd))
> + pta = xe2_pta[gt];
> +
> + return pta;
> +}
> +
> +static void pt_check_pta_for_gts(int fd)
> +{
> + struct intel_pat_cache pat_sw_config = {};
> + int gt;
> +
> + xe_for_each_gt(fd, gt) {
> + xe_get_pat_sw_config(fd, &pat_sw_config, gt);
> + igt_debug("gt: %d, pta: %x, pta expected: %x\n",
> + gt, pat_sw_config.pta_mode, get_expected_pta(fd, gt));
> + igt_assert_eq(pat_sw_config.pta_mode, get_expected_pta(fd, gt));
> + }
> +}
> +
> +/**
> + * SUBTEST: pt-pta-check
> + * Description: verify pta value is expected
> + *
> + * SUBTEST: pt-pta-reset-gt
> + * Description: verify pta value is expected before and after gt reset
> + *
> + * SUBTEST: pt-pta-suspend
> + * Description: verify pta value is expected before and after suspend/resume
> + */
> +static void pt_pta_check(int fd, enum pt_pta_test_opts opts)
> +{
> + pt_check_pta_for_gts(fd);
> +
> + if (opts == PT_PTA_RESET_GT) {
> + xe_force_gt_reset_all(fd);
> + sleep(1);
> + pt_check_pta_for_gts(fd);
> + } else if (opts == PT_PTA_SUSPEND) {
> + igt_system_suspend_autoresume(SUSPEND_STATE_STANDBY, SUSPEND_TEST_NONE);
> + pt_check_pta_for_gts(fd);
> + }
> +}
> +
> static int opt_handler(int opt, int opt_index, void *data)
> {
> switch (opt) {
> @@ -2253,6 +2340,16 @@ int igt_main_args("V", NULL, help_str, opt_handler, NULL)
> igt_subtest("pt-caching-update-pat-and-pte")
> pt_caching_test(fd, PT_UPDATE_PAT_AND_PTE);
>
> + igt_subtest("pt-pta-check")
> + pt_pta_check(fd, PT_PTA_CHECK);
> +
> + igt_subtest("pt-pta-reset-gt")
> + pt_pta_check(fd, PT_PTA_RESET_GT);
> +
> + igt_subtest("pt-pta-suspend")
> + pt_pta_check(fd, PT_PTA_SUSPEND);
> +
> +
> igt_fixture()
> drm_close_driver(fd);
> }
next prev parent reply other threads:[~2026-03-26 15:52 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-26 11:34 [PATCH i-g-t 0/2] Verify PTA entries contains expected values Zbigniew Kempczyński
2026-03-26 11:34 ` [PATCH i-g-t 1/2] lib/intel_pat: Support other than gt0 during parsing debugfs PAT Zbigniew Kempczyński
2026-03-26 15:56 ` Matthew Auld
2026-03-26 11:34 ` [PATCH i-g-t 2/2] tests/xe_pat: Verify PTA PAT entries contain expected values Zbigniew Kempczyński
2026-03-26 15:52 ` Matthew Auld [this message]
2026-03-27 5:36 ` Zbigniew Kempczyński
2026-03-27 5:41 ` Zbigniew Kempczyński
2026-03-26 21:46 ` ✓ Xe.CI.BAT: success for Verify PTA entries contains " Patchwork
2026-03-26 21:50 ` ✓ i915.CI.BAT: " Patchwork
2026-03-27 14:06 ` ✓ Xe.CI.FULL: " Patchwork
2026-03-27 21:32 ` ✓ i915.CI.Full: " Patchwork
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