From: Jani Nikula <jani.nikula@linux.intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>,
igt-dev@lists.freedesktop.org
Subject: Re: [igt-dev] [PATCH i-g-t 01/14] tools/intel_vbt_decode: Simplify fast link training lane count
Date: Thu, 04 Aug 2022 13:03:14 +0300 [thread overview]
Message-ID: <874jyspbq5.fsf@intel.com> (raw)
In-Reply-To: <20220715202520.23677-2-ville.syrjala@linux.intel.com>
On Fri, 15 Jul 2022, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Get rid of the pointless switch statement and decode the
> fast link training lane count as just <val>+1. We already
> do the same for the DSI lane count.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
> ---
> tools/intel_vbt_decode.c | 18 ++----------------
> 1 file changed, 2 insertions(+), 16 deletions(-)
>
> diff --git a/tools/intel_vbt_decode.c b/tools/intel_vbt_decode.c
> index 5494a34bdca3..1ed03745bd05 100644
> --- a/tools/intel_vbt_decode.c
> +++ b/tools/intel_vbt_decode.c
> @@ -1420,22 +1420,8 @@ static void dump_edp(struct context *context,
> edp->fast_link_params[i].rate);
> break;
> }
> - printf("\t\t\tlanes: ");
> - switch (edp->fast_link_params[i].lanes) {
> - case EDP_LANE_1:
> - printf("x1 mode\n");
> - break;
> - case EDP_LANE_2:
> - printf("x2 mode\n");
> - break;
> - case EDP_LANE_4:
> - printf("x4 mode\n");
> - break;
> - default:
> - printf("(unknown value %d)\n",
> - edp->fast_link_params[i].lanes);
> - break;
> - }
> + printf("\t\t\tlanes: X%d",
> + edp->fast_link_params[i].lanes + 1);
> printf("\t\t\tpre-emphasis: ");
> switch (edp->fast_link_params[i].preemphasis) {
> case EDP_PREEMPHASIS_NONE:
--
Jani Nikula, Intel Open Source Graphics Center
next prev parent reply other threads:[~2022-08-04 10:03 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-15 20:25 [igt-dev] [PATCH i-g-t 00/14] tools/intel_vbt_decode: Improve VBT decoder Ville Syrjala
2022-07-15 20:25 ` [igt-dev] [PATCH i-g-t 01/14] tools/intel_vbt_decode: Simplify fast link training lane count Ville Syrjala
2022-08-04 10:03 ` Jani Nikula [this message]
2022-07-15 20:25 ` [igt-dev] [PATCH i-g-t 02/14] tools/intel_vbt_decode: Extract dp_vswing()/dp_preemph() Ville Syrjala
2022-08-04 10:05 ` Jani Nikula
2022-07-15 20:25 ` [igt-dev] [PATCH i-g-t 03/14] tools/intel_vbt_decode: update vbt defs from kernel Ville Syrjala
2022-07-15 20:25 ` [igt-dev] [PATCH i-g-t 04/14] tools/intel_vbt_decode: Introduce panel_bits()/panel_bool() Ville Syrjala
2022-07-15 20:25 ` [igt-dev] [PATCH i-g-t 05/14] tools/intel_vbt_decode: Remove pointless variables Ville Syrjala
2022-07-15 20:25 ` [igt-dev] [PATCH i-g-t 06/14] tools/intel_vbt_decode: Extract lvds_config[] Ville Syrjala
2022-07-15 20:25 ` [igt-dev] [PATCH i-g-t 07/14] tools/intel_vbt_decode: Extract panel_fitting[] Ville Syrjala
2022-07-15 20:25 ` [igt-dev] [PATCH i-g-t 08/14] tools/intel_vbt_decode: Parse HDMI FRL rate Ville Syrjala
2022-07-15 20:25 ` [igt-dev] [PATCH i-g-t 09/14] tools/intel_vbt_decode: Decode the "use VBT vswing tables" flag Ville Syrjala
2022-07-15 20:25 ` [igt-dev] [PATCH i-g-t 10/14] tools/intel_vbt_decode: Decode eDP/DP max lane count Ville Syrjala
2022-07-15 20:25 ` [igt-dev] [PATCH i-g-t 11/14] tools/intel_vbt_decode: Clean up driver features block decoding Ville Syrjala
2022-07-15 20:25 ` [igt-dev] [PATCH i-g-t 12/14] tools/intel_vbt_decode: Decode AUX CH Ville Syrjala
2022-07-15 20:25 ` [igt-dev] [PATCH i-g-t 13/14] tools/intel_vbt_decode: Adjust DVO port printing Ville Syrjala
2022-07-15 20:25 ` [igt-dev] [PATCH i-g-t 14/14] tools/intel_vbt_decode: Dump the compression structure index as decimal Ville Syrjala
2022-07-16 17:08 ` [igt-dev] ✓ Fi.CI.BAT: success for tools/intel_vbt_decode: Improve VBT decoder Patchwork
2022-07-16 19:57 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork
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