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From: Gustavo Sousa <gustavo.sousa@intel.com>
To: <nishit.sharma@intel.com>, <igt-dev@lists.freedesktop.org>,
	<arvind.yadav@intel.com>
Cc: <kamil.konieczny@linux.intel.com>
Subject: Re: [PATCH] tests/intel/xe_exec_system_allocator: Skip reserved PAT madvise indices
Date: Fri, 30 Oct 2026 20:04:19 -0300	[thread overview]
Message-ID: <877biyu6x8.fsf@intel.com> (raw)
In-Reply-To: <20261029063620.1540187-1-nishit.sharma@intel.com>

<nishit.sharma@intel.com> writes:

> From: Nishit Sharma <nishit.sharma@intel.com>
>
> With Wa_14026539277 active, KMD marks the 2-way-coherent PAT entries as
> reserved in the debugfs pat_sw_config dump and they must not be used.
> Skip the PAT-index madvise subtests when the selected PAT index is
> reserved instead of decoding the coherency bits of the PAT entry.
>
> Signed-off-by: Nishit Sharma <nishit.sharma@intel.com>
> ---
>  tests/intel/xe_exec_system_allocator.c | 22 ++++++++++++++++++++++
>  1 file changed, 22 insertions(+)
>
> diff --git a/tests/intel/xe_exec_system_allocator.c b/tests/intel/xe_exec_system_allocator.c
> index 45ec62813..38e550896 100644
> --- a/tests/intel/xe_exec_system_allocator.c
> +++ b/tests/intel/xe_exec_system_allocator.c
> @@ -26,6 +26,7 @@
>  #include "xe/xe_gt.h"
>  #include "xe/xe_ioctl.h"
>  #include "xe/xe_query.h"
> +#include "xe/xe_wa.h"
>  #include <string.h>
>  
>  #define USER_FENCE_VALUE	0xdeadbeefdeadbeefull
> @@ -1216,6 +1217,24 @@ xe_vm_madvixe_pat_attr(int fd, uint32_t vm, uint64_t addr, uint64_t range,
>  		      DRM_XE_MEM_RANGE_ATTR_PAT, pat_index, 0, 0);
>  }
>  
> +static bool pat_idx_is_reserved(int fd, uint8_t pat_idx)
> +{
> +	struct intel_pat_cache pat_sw_config = {};
> +	int32_t num_pat_entries;
> +
> +	if (!xe_wa(fd, "14026539277"))
> +		return false;
> +
> +	num_pat_entries = xe_get_pat_sw_config(fd, &pat_sw_config, 0);

We are parsing the PAT sw config debugfs node on each call to this
function here.

Maybe it would be better to parse just once?  We could call
xe_get_pat_sw_config() once outside this function and pass the pointer
to the struct intel_pat_cache as argument to pat_idx_is_reserved().

--
Gustavo Sousa

> +	igt_assert_f(num_pat_entries > 0,
> +		     "Couldn't get Xe PAT software configuration\n");
> +
> +	if (pat_idx >= num_pat_entries)
> +		return false;
> +
> +	return pat_sw_config.entries[pat_idx].rsvd;
> +}
> +
>  static void
>  xe_vm_madvise_atomic_attr(int fd, uint32_t vm, uint64_t addr, uint64_t range,
>  			  int mem_attr)
> @@ -2887,6 +2906,9 @@ int igt_main()
>  			if (IS_PONTEVECCHIO(dev_id) &&
>  			    strstr(s->name, "madvise-pat-idx-uc-comp-"))
>  				igt_skip("Skipping compression-related PAT index on PVC\n");
> +
> +			igt_skip_on_f(pat_idx_is_reserved(fd, s->fn(fd)),
> +				      "PAT index reserved by Wa_14026539277\n");
>  			xe_for_each_engine(fd, hwe)
>  				test_exec(fd, hwe, 1, 1, SZ_4M, 0, 0, NULL, NULL, s->flags, s->fn);
>  		}
> -- 
> 2.43.0

      parent reply	other threads:[~2026-10-30 23:05 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-29  6:36 [PATCH] tests/intel/xe_exec_system_allocator: Skip reserved PAT madvise indices nishit.sharma
2026-10-29  7:52 ` ✓ Xe.CI.BAT: success for " Patchwork
2026-10-29  8:13 ` ✓ i915.CI.BAT: " Patchwork
2026-10-29 18:22 ` ✗ i915.CI.Full: failure " Patchwork
2026-10-29 18:34 ` ✓ Xe.CI.FULL: success " Patchwork
2026-10-30 23:04 ` Gustavo Sousa [this message]

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