From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by gabe.freedesktop.org (Postfix) with ESMTPS id C1B6B6E03A for ; Thu, 17 Jun 2021 05:22:01 +0000 (UTC) Date: Wed, 16 Jun 2021 22:22:00 -0700 Message-ID: <87a6np2hhj.wl-ashutosh.dixit@intel.com> From: "Dixit, Ashutosh" In-Reply-To: <20210614163704.365989-28-jason@jlekstrand.net> References: <20210614163704.365989-1-jason@jlekstrand.net> <20210614163704.365989-28-jason@jlekstrand.net> MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Subject: Re: [igt-dev] [PATCH i-g-t 27/77] tests/i915/gem_ctx_shared: Convert to intel_ctx_t List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: igt-dev-bounces@lists.freedesktop.org Sender: "igt-dev" To: Jason Ekstrand Cc: igt-dev@lists.freedesktop.org List-ID: On Mon, 14 Jun 2021 09:36:42 -0700, Jason Ekstrand wrote: > > @@ -347,11 +368,12 @@ static void single_timeline(int i915) > * to, it reports the same timeline name and fence context. However, > * the fence context is not reported through the sync_fence_info. > */ > - spin->execbuf.rsvd1 = > - gem_context_clone(i915, 0, 0, > - I915_CONTEXT_CREATE_FLAGS_SINGLE_TIMELINE); > + st_cfg = *cfg; > + st_cfg.flags |= I915_CONTEXT_CREATE_FLAGS_SINGLE_TIMELINE; > + ctx = intel_ctx_create(i915, &st_cfg); > + spin->execbuf.rsvd1 = ctx->id; It's probably the same but could've passed ctx into igt_spin_new just above. > @@ -403,27 +428,29 @@ static void exec_single_timeline(int i915, unsigned int engine) > igt_require(spin); > igt_assert_eq(nop_sync(i915, ctx, engine, NSEC_PER_SEC), 0); > igt_spin_free(i915, spin); > + intel_ctx_destroy(i915, ctx); > > /* > * But if we create a context with just a single shared timeline, > * then it will block waiting for the earlier requests on the > * other engines. > */ > - ctx = gem_context_clone(i915, 0, 0, > - I915_CONTEXT_CREATE_FLAGS_SINGLE_TIMELINE); > + st_cfg = *cfg; > + st_cfg.flags |= I915_CONTEXT_CREATE_FLAGS_SINGLE_TIMELINE; > + ctx = intel_ctx_create(i915, &st_cfg); > spin = NULL; > - __for_each_physical_engine(i915, e) { > + for_each_ctx_cfg_engine(i915, cfg, e) { Preferably &st_cfg, ok otherwise too. > @@ -592,22 +620,19 @@ static void independent(int i915, > igt_require_f(mmio_base, "mmio base not known\n"); > > for (int n = 0; n < ARRAY_SIZE(spin); n++) { > - const struct igt_spin_factory opts = { > - .ctx_id = create_highest_priority(i915), > - .engine = e->flags, > - }; > - spin[n] = __igt_spin_factory(i915, &opts); > - gem_context_destroy(i915, opts.ctx_id); > + const intel_ctx_t *ctx = create_highest_priority(i915, cfg); > + spin[n] = __igt_spin_new(i915, .ctx = ctx, .engine = e->flags); > + intel_ctx_destroy(i915, ctx); > } > > fence = igt_cork_plug(&cork, i915); > for (int i = 0; i < ARRAY_SIZE(priorities); i++) { > - uint32_t ctx = gem_queue_create(i915); > - gem_context_set_priority(i915, ctx, priorities[i]); > + const intel_ctx_t *ctx = create_highest_priority(i915, cfg); Don't we need gem_queue_create equivalent here (I915_CONTEXT_CLONE_VM and I915_CONTEXT_CREATE_FLAGS_SINGLE_TIMELINE)? > -static void reorder(int i915, unsigned ring, unsigned flags) > +static void reorder(int i915, const intel_ctx_cfg_t *cfg, > + unsigned ring, unsigned flags) > #define EQUAL 1 > { > IGT_CORK_HANDLE(cork); > uint32_t scratch; > uint32_t *ptr; > - uint32_t ctx[2]; > + const intel_ctx_t *ctx[2]; > uint32_t plug; > > - ctx[LO] = gem_queue_create(i915); > - gem_context_set_priority(i915, ctx[LO], MIN_PRIO); > + ctx[LO] = intel_ctx_create(i915, cfg); > + gem_context_set_priority(i915, ctx[LO]->id, MIN_PRIO); > > - ctx[HI] = gem_queue_create(i915); > - gem_context_set_priority(i915, ctx[HI], flags & EQUAL ? MIN_PRIO : 0); > + ctx[HI] = intel_ctx_create(i915, cfg); > + gem_context_set_priority(i915, ctx[HI]->id, flags & EQUAL ? MIN_PRIO : 0); Again, don't we need gem_queue_create equivalent here? > -static void promotion(int i915, unsigned ring) > +static void promotion(int i915, const intel_ctx_cfg_t *cfg, unsigned ring) > { > IGT_CORK_HANDLE(cork); > uint32_t result, dep; > uint32_t *ptr; > - uint32_t ctx[3]; > + const intel_ctx_t *ctx[3]; > uint32_t plug; > > - ctx[LO] = gem_queue_create(i915); > - gem_context_set_priority(i915, ctx[LO], MIN_PRIO); > + ctx[LO] = intel_ctx_create(i915, cfg); > + gem_context_set_priority(i915, ctx[LO]->id, MIN_PRIO); > > - ctx[HI] = gem_queue_create(i915); > - gem_context_set_priority(i915, ctx[HI], 0); > + ctx[HI] = intel_ctx_create(i915, cfg); > + gem_context_set_priority(i915, ctx[HI]->id, 0); > > - ctx[NOISE] = gem_queue_create(i915); > - gem_context_set_priority(i915, ctx[NOISE], MIN_PRIO/2); > + ctx[NOISE] = intel_ctx_create(i915, cfg); > + gem_context_set_priority(i915, ctx[NOISE]->id, MIN_PRIO/2); Again, don't we need gem_queue_create equivalent here? > @@ -761,16 +788,16 @@ static void smoketest(int i915, unsigned ring, unsigned timeout) > scratch = gem_create(i915, 4096); > igt_fork(child, ncpus) { > unsigned long count = 0; > - uint32_t ctx; > + const intel_ctx_t *ctx; > > hars_petruska_f54_1_random_perturb(child); > > - ctx = gem_queue_create(i915); > + ctx = intel_ctx_create(i915, cfg); Again, don't we need gem_queue_create equivalent here? _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev