From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BC42AF33A61 for ; Thu, 5 Mar 2026 13:48:18 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 5130C10EB99; Thu, 5 Mar 2026 13:48:18 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="E6Ov+AN1"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.11]) by gabe.freedesktop.org (Postfix) with ESMTPS id 8913110EB99 for ; Thu, 5 Mar 2026 13:48:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1772718497; x=1804254497; h=date:message-id:from:to:cc:subject:in-reply-to: references:mime-version; bh=hLJ7pL8iXE8eqLERpYVo/68sSmYA1meAKCe2eC0hmi0=; b=E6Ov+AN1RXQ++Geoo8V+A4gyxLbS1oJUfbcdMyxn1q8SCLHEqO9FJMPQ EAxJZHoio+Iq5VQYDEe9slF/AB4bsSmO7t0q2q6mMzIVJTCeHqKqoTPtS /RYqxHrA6+rSSMvYtgIcfBInmgfgYKAN3GTjv1TxUs0psvQ/x9oVjdU2i sIxn/hsFVei84LXGrA27fcZyXs2pMyCfdoD35bbsSXriW7NMUYuUJ/UpX OhHNAOR/pUupYbUpSCiVXJ/sJBYgrBKXyRyvGVj5lHVo06561BCaaCA7r WnXBx5BZv9QDLq7KSB1hVuBW10Yy/RlT4w3jxtDeNQMsii0xCaunkYDNb g==; X-CSE-ConnectionGUID: qqsJGrn0TbyJe8+ps6AmJA== X-CSE-MsgGUID: 3CjFeieqSIKJJdApjl688Q== X-IronPort-AV: E=McAfee;i="6800,10657,11720"; a="84439745" X-IronPort-AV: E=Sophos;i="6.23,103,1770624000"; d="scan'208";a="84439745" Received: from orviesa008.jf.intel.com ([10.64.159.148]) by fmvoesa105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Mar 2026 05:48:15 -0800 X-CSE-ConnectionGUID: InOZsDrYSGa/vUJL2PiuvA== X-CSE-MsgGUID: Z89AA6CDQH6iFH1nV+O3bg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,103,1770624000"; d="scan'208";a="218683532" Received: from cohendav-mobl1.ger.corp.intel.com (HELO adixit-MOBL3.intel.com) ([10.125.161.186]) by orviesa008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Mar 2026 05:48:14 -0800 Date: Thu, 05 Mar 2026 05:48:13 -0800 Message-ID: <87o6l25qw2.wl-ashutosh.dixit@intel.com> From: "Dixit, Ashutosh" To: Cc: , , , , Zbigniew Kempczynski Subject: Re: [PATCH v2 i-g-t] lib/intel_pat: Cache PAT config for unprivileged processes In-Reply-To: <20260305122548.28328-1-himanshu.girotra@intel.com> References: <20260305122548.28328-1-himanshu.girotra@intel.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?ISO-8859-4?Q?Goj=F2?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/30.2 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-BeenThere: igt-dev@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Development mailing list for IGT GPU Tools List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: igt-dev-bounces@lists.freedesktop.org Sender: "igt-dev" On Thu, 05 Mar 2026 04:25:48 -0800, wrote: > > diff --git a/lib/xe/xe_query.c b/lib/xe/xe_query.c > index 981d76948..256ec1d4d 100644 > --- a/lib/xe/xe_query.c > +++ b/lib/xe/xe_query.c > @@ -22,6 +22,7 @@ > #include "ioctl_wrappers.h" > #include "igt_map.h" > > +#include "intel_pat.h" > #include "xe_query.h" > #include "xe_ioctl.h" > > @@ -299,6 +300,15 @@ struct xe_device *xe_device_get(int fd) > xe_dev->default_alignment = __mem_default_alignment(xe_dev->mem_regions); > xe_dev->has_vram = __mem_has_vram(xe_dev->mem_regions); > > + /* > + * Populate the PAT cache while we still have sufficient privileges > + * to read debugfs. Forked children that inherit this xe_device > + * (via fork()) will be able to use the cached values even after > + * dropping root with igt_drop_root(). > + */ > + if (xe_get_pat_sw_config(xe_dev->fd, &xe_dev->pat_cache) > 0) > + xe_dev->pat_cached = true; > + x> /* We may get here from multiple threads, use first cached xe_dev */ > pthread_mutex_lock(&cache.cache_mutex); > prev = find_in_cache_unlocked(fd); > diff --git a/lib/xe/xe_query.h b/lib/xe/xe_query.h > index d7a9f95f9..97bcf0d32 100644 > --- a/lib/xe/xe_query.h > +++ b/lib/xe/xe_query.h > @@ -9,6 +9,8 @@ > #ifndef XE_QUERY_H > #define XE_QUERY_H > > +#include "intel_pat.h" > + > #include > #include > > @@ -74,6 +76,12 @@ struct xe_device { > > /** @dev_id: Device id of xe device */ > uint16_t dev_id; > + > + /** @pat_cache: cached PAT index configuration */ > + struct intel_pat_cache pat_cache; This should just be "struct intel_pat_cache *pat_cache"; > + > + /** @pat_cached: true once @pat_cache has been populated */ > + bool pat_cached; And then we don't need this, we can just check for NULL pointer, like has been done for other members of 'struct xe_device'. > }; > > #define xe_for_each_engine(__fd, __hwe) \ > diff --git a/tests/intel/xe_oa.c b/tests/intel/xe_oa.c > index 927f3f4f2..9ce828619 100644 > --- a/tests/intel/xe_oa.c > +++ b/tests/intel/xe_oa.c > @@ -3453,6 +3453,14 @@ test_single_ctx_render_target_writes_a_counter(const struct drm_xe_oa_unit *oau) > /* A local device for local resources. */ > drm_fd = drm_reopen_driver(drm_fd); > > + /* > + * Populate the xe_device cache (including PAT) for > + * the new fd while we still have root privileges. > + * intel_get_pat_idx_*() reads PAT from xe_device, > + * so this must happen before igt_drop_root(). > + */ > + xe_device_get(drm_fd); This is not needed, this is done in igt_main() in xe_oa.c. Also you have done a xe_device_get() in lib/intel_pat.c in this patch itself. > + > igt_drop_root(); > > single_ctx_helper(oau); > -- > 2.50.1 >