From: Shekhar Chauhan <shekhar.chauhan@intel.com>
To: Kamil Konieczny <kamil.konieczny@linux.intel.com>,
<igt-dev@lists.freedesktop.org>
Cc: Matt Roper <matthew.d.roper@intel.com>,
Gustavo Sousa <gustavo.sousa@intel.com>,
Jani Nikula <jani.nikula@intel.com>,
"Lucas De Marchi" <lucas.demarchi@intel.com>
Subject: Re: [PATCH i-g-t v2 1/1] lib/pciids: Add NVL-S and split out BMG-G21
Date: Tue, 28 Oct 2025 17:34:03 +0530 [thread overview]
Message-ID: <9556c7af-8b2e-4cd3-a575-1fbb44fd6c6f@intel.com> (raw)
In-Reply-To: <20251028104234.14745-2-kamil.konieczny@linux.intel.com>
On 10/28/2025 16:12, Kamil Konieczny wrote:
> Sync with drm-next kernel commit c002b1764e7b ("drm/xe/nvl: Define NVL-S platform")
> Link: https://lore.kernel.org/r/20251016-xe3p-v3-11-3dd173a3097a@intel.com
>
> This adds NovaLake-S PCI ids, and with it there are two more PCI
> ids commits, one for splitting BMG-G21 out of BMG for workarounds
> and the other adds a kernel macro.
>
> 78de8f876683 ("drm/xe: Handle Wa_22010954014 and Wa_14022085890 as device workarounds")
> Link: https://lore.kernel.org/r/20251013200944.2499947-40-matthew.d.roper@intel.com
>
> edb660ad79ff ("drm/intel/pciids: Add match on vendor/id only")
> Link: https://lore.kernel.org/r/20250808-intel-pci-device-v1-1-ce3545d86502@intel.com
>
> v2: squashed into one commit (Lucas)
>
> Cc: Matt Roper <matthew.d.roper@intel.com>
> Cc: Gustavo Sousa <gustavo.sousa@intel.com>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Cc: Shekhar Chauhan <shekhar.chauhan@intel.com>
> Cc: Lucas De Marchi <lucas.demarchi@intel.com>
> Signed-off-by: Kamil Konieczny <kamil.konieczny@linux.intel.com>
> ---
> lib/pciids.h | 21 +++++++++++++++++++--
> 1 file changed, 19 insertions(+), 2 deletions(-)
>
> diff --git a/lib/pciids.h b/lib/pciids.h
> index 76f8d26f9..9f095a99d 100644
> --- a/lib/pciids.h
> +++ b/lib/pciids.h
> @@ -26,6 +26,11 @@
> #define __PCIIDS_H__
>
> #ifdef __KERNEL__
> +#define INTEL_PCI_DEVICE(_id, _info) { \
> + PCI_DEVICE(PCI_VENDOR_ID_INTEL, (_id)), \
> + .driver_data = (kernel_ulong_t)(_info), \
> +}
> +
> #define INTEL_VGA_DEVICE(_id, _info) { \
> PCI_DEVICE(PCI_VENDOR_ID_INTEL, (_id)), \
> .class = PCI_BASE_CLASS_DISPLAY << 16, .class_mask = 0xff << 16, \
> @@ -844,7 +849,7 @@
> MACRO__(0x64B0, ## __VA_ARGS__)
>
> /* BMG */
> -#define INTEL_BMG_IDS(MACRO__, ...) \
> +#define INTEL_BMG_G21_IDS(MACRO__, ...) \
> MACRO__(0xE202, ## __VA_ARGS__), \
> MACRO__(0xE209, ## __VA_ARGS__), \
> MACRO__(0xE20B, ## __VA_ARGS__), \
> @@ -853,7 +858,10 @@
> MACRO__(0xE210, ## __VA_ARGS__), \
> MACRO__(0xE211, ## __VA_ARGS__), \
> MACRO__(0xE212, ## __VA_ARGS__), \
> - MACRO__(0xE216, ## __VA_ARGS__), \
> + MACRO__(0xE216, ## __VA_ARGS__)
> +
> +#define INTEL_BMG_IDS(MACRO__, ...) \
Um, I'm not sure. I think what Lucas meant was to ask why separate out
BMG_IDS and BMG_G21_IDS. Regarding NVL-S, I think they can be in a
different commit. Comments, Lucas?
-shekhar
> + INTEL_BMG_G21_IDS(MACRO__, __VA_ARGS__), \
> MACRO__(0xE220, ## __VA_ARGS__), \
> MACRO__(0xE221, ## __VA_ARGS__), \
> MACRO__(0xE222, ## __VA_ARGS__), \
> @@ -876,4 +884,13 @@
> MACRO__(0xFD80, ## __VA_ARGS__), \
> MACRO__(0xFD81, ## __VA_ARGS__)
>
> +/* NVL-S */
> +#define INTEL_NVLS_IDS(MACRO__, ...) \
> + MACRO__(0xD740, ## __VA_ARGS__), \
> + MACRO__(0xD741, ## __VA_ARGS__), \
> + MACRO__(0xD742, ## __VA_ARGS__), \
> + MACRO__(0xD743, ## __VA_ARGS__), \
> + MACRO__(0xD744, ## __VA_ARGS__), \
> + MACRO__(0xD745, ## __VA_ARGS__)
> +
> #endif /* __PCIIDS_H__ */
next prev parent reply other threads:[~2025-10-28 12:04 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-28 10:42 [PATCH i-g-t v2 0/1] Sync PCI ids with kernel: split BMG to BMG-G21 and add NVL-S Kamil Konieczny
2025-10-28 10:42 ` [PATCH i-g-t v2 1/1] lib/pciids: Add NVL-S and split out BMG-G21 Kamil Konieczny
2025-10-28 12:04 ` Shekhar Chauhan [this message]
2025-10-28 13:26 ` Lucas De Marchi
2025-10-28 13:53 ` Lucas De Marchi
2025-10-28 14:35 ` Jani Nikula
2025-10-28 14:36 ` Jani Nikula
2025-10-28 14:41 ` Jani Nikula
2025-10-28 16:59 ` Kamil Konieczny
2025-10-28 20:19 ` Jani Nikula
2025-10-28 16:35 ` Kamil Konieczny
2025-10-28 11:56 ` ✓ Xe.CI.BAT: success for Sync PCI ids with kernel: split BMG to BMG-G21 and add NVL-S (rev2) Patchwork
2025-10-28 12:14 ` ✓ i915.CI.BAT: " Patchwork
2025-10-28 16:42 ` ✗ Xe.CI.Full: failure " Patchwork
2025-10-28 17:55 ` Kamil Konieczny
2025-10-28 20:27 ` ✗ i915.CI.Full: " Patchwork
2025-10-29 17:17 ` Kamil Konieczny
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