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From: Matthew Auld <matthew.auld@intel.com>
To: "Zbigniew Kempczyński" <zbigniew.kempczynski@intel.com>
Cc: igt-dev@lists.freedesktop.org
Subject: Re: [PATCH i-g-t 1/2] tests/intel/xe_copy_basic: account for prefetch
Date: Wed, 24 Jan 2024 08:42:44 +0000	[thread overview]
Message-ID: <9ea179cc-7a18-4bbb-b1a5-5569ee405809@intel.com> (raw)
In-Reply-To: <20240124044845.sm6tumjvtuorszj4@zkempczy-mobl2>

On 24/01/2024 04:48, Zbigniew Kempczyński wrote:
> On Tue, Jan 23, 2024 at 06:33:22PM +0000, Matthew Auld wrote:
>> Xe2 expects an extra page after the batch to avoid prefetch hitting an
>> invalid page. Not doing so can result in CAT errors.
>>
>> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
>> Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
>> ---
>>   tests/intel/xe_copy_basic.c | 8 ++++++--
>>   1 file changed, 6 insertions(+), 2 deletions(-)
>>
>> diff --git a/tests/intel/xe_copy_basic.c b/tests/intel/xe_copy_basic.c
>> index 1bde876cd..3ae5a7291 100644
>> --- a/tests/intel/xe_copy_basic.c
>> +++ b/tests/intel/xe_copy_basic.c
>> @@ -44,7 +44,7 @@ mem_copy(int fd, uint32_t src_handle, uint32_t dst_handle, const intel_ctx_t *ct
>>   	 uint32_t size, uint32_t width, uint32_t height, uint32_t region)
>>   {
>>   	struct blt_mem_data mem = {};
>> -	uint64_t bb_size = xe_get_default_alignment(fd);
>> +	uint64_t bb_size;
>>   	uint64_t ahnd = intel_allocator_open_full(fd, ctx->vm, 0, 0,
>>   						  INTEL_ALLOCATOR_SIMPLE,
>>   						  ALLOC_STRATEGY_LOW_TO_HIGH, 0);
>> @@ -53,6 +53,8 @@ mem_copy(int fd, uint32_t src_handle, uint32_t dst_handle, const intel_ctx_t *ct
>>   	uint32_t bb;
>>   	int result;
>>   
>> +	bb_size = ALIGN(SZ_4K + xe_cs_prefetch_size(fd),
>> +			xe_get_default_alignment(fd));
>>   	bb = xe_bo_create(fd, 0, bb_size, region, 0);
>>   
>>   	blt_mem_init(fd, &mem);
>> @@ -97,7 +99,7 @@ mem_set(int fd, uint32_t dst_handle, const intel_ctx_t *ctx, uint32_t size,
>>   	uint32_t width, uint32_t height, uint8_t fill_data, uint32_t region)
>>   {
>>   	struct blt_mem_data mem = {};
>> -	uint64_t bb_size = xe_get_default_alignment(fd);
>> +	uint64_t bb_size;
>>   	uint64_t ahnd = intel_allocator_open_full(fd, ctx->vm, 0, 0,
>>   						  INTEL_ALLOCATOR_SIMPLE,
>>   						  ALLOC_STRATEGY_LOW_TO_HIGH, 0);
>> @@ -105,6 +107,8 @@ mem_set(int fd, uint32_t dst_handle, const intel_ctx_t *ctx, uint32_t size,
>>   	uint32_t bb;
>>   	uint8_t *result;
>>   
>> +	bb_size = ALIGN(SZ_4K + xe_cs_prefetch_size(fd),
>> +			xe_get_default_alignment(fd));
>>   	bb = xe_bo_create(fd, 0, bb_size, region, 0);
>>   	blt_mem_init(fd, &mem);
>>   	blt_set_mem_object(&mem.dst, dst_handle, size, 0, width, height, region,
>> -- 
>> 2.43.0
>>
> 
> Maybe we should create helper like:
> 
> uint64_t xe_bb_size(int fd, uint64_t reqsize)
> {
> 	return ALIGN(reqsize + xe_cs_prefetch_size(fd),
> 	             xe_get_default_alignment(fd));
> }
> 
> as adding prefetch size will likely stay with us forever.

Yeah, I think adding a helper for this at some point makes a lot of 
sense. Also probably need to do a full audit at the same time as rolling 
that out in case we are still missing it in some places.

> 
> Anyway, green light from me for the above change:
> 
> Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>

Thanks.

> --
> Zbigniew

      reply	other threads:[~2024-01-24  8:42 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-01-23 18:33 [PATCH i-g-t 1/2] tests/intel/xe_copy_basic: account for prefetch Matthew Auld
2024-01-23 18:33 ` [PATCH i-g-t 2/2] lib/intel_blt: use BYTE_COPY mode on xe2 Matthew Auld
2024-01-24  4:56   ` Zbigniew Kempczyński
2024-01-24  8:37     ` Matthew Auld
2024-01-25  6:04       ` Zbigniew Kempczyński
2024-01-23 19:30 ` ✓ Fi.CI.BAT: success for series starting with [i-g-t,1/2] tests/intel/xe_copy_basic: account for prefetch Patchwork
2024-01-23 19:55 ` ✓ CI.xeBAT: " Patchwork
2024-01-24  4:45 ` ✗ Fi.CI.IGT: failure " Patchwork
2024-01-24  4:48 ` [PATCH i-g-t 1/2] " Zbigniew Kempczyński
2024-01-24  8:42   ` Matthew Auld [this message]

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