From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Content-Type: multipart/alternative; boundary="===============7427122597503366646==" MIME-Version: 1.0 From: Patchwork To: "Umesh Nerlige Ramappa" Date: Sat, 23 Sep 2023 00:04:45 -0000 Message-ID: <169542748576.3504.5958271472281764778@emeril.freedesktop.org> References: <20230922215233.2438200-1-umesh.nerlige.ramappa@intel.com> In-Reply-To: <20230922215233.2438200-1-umesh.nerlige.ramappa@intel.com> Subject: [igt-dev] =?utf-8?q?=E2=9C=93_CI=2ExeBAT=3A_success_for_Update_I?= =?utf-8?q?GT_tests_to_support_new_engine_busyness_interface?= List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: igt-dev@lists.freedesktop.org Cc: igt-dev@lists.freedesktop.org Errors-To: igt-dev-bounces@lists.freedesktop.org Sender: "igt-dev" List-ID: --===============7427122597503366646== Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit == Series Details == Series: Update IGT tests to support new engine busyness interface URL : https://patchwork.freedesktop.org/series/124147/ State : success == Summary == CI Bug Log - changes from XEIGT_7499_BAT -> XEIGTPW_9858_BAT ==================================================== Summary ------- **SUCCESS** No regressions found. Participating hosts (4 -> 4) ------------------------------ No changes in participating hosts Known issues ------------ Here are the changes found in XEIGTPW_9858_BAT that come from known issues: ### IGT changes ### #### Possible fixes #### * {igt@xe_create@create-execqueues-noleak}: - bat-atsm-2: [FAIL][1] ([Intel XE#524]) -> [PASS][2] [1]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7499/bat-atsm-2/igt@xe_create@create-execqueues-noleak.html [2]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_9858/bat-atsm-2/igt@xe_create@create-execqueues-noleak.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [Intel XE#524]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/524 Build changes ------------- * IGT: IGT_7499 -> IGTPW_9858 * Linux: xe-390-6149acb947f2f8b65ee1a058982a5d6fce3124ec -> xe-392-16e2c940ef53f81b2c68e16ec39cf5772894a625 IGTPW_9858: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9858/index.html IGT_7499: d991240f6c6751e9480456c20de785cfc6e6ff15 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git xe-390-6149acb947f2f8b65ee1a058982a5d6fce3124ec: 6149acb947f2f8b65ee1a058982a5d6fce3124ec xe-392-16e2c940ef53f81b2c68e16ec39cf5772894a625: 16e2c940ef53f81b2c68e16ec39cf5772894a625 == Logs == For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_9858/index.html --===============7427122597503366646== Content-Type: text/html; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Project List - Patchwork Patch Details

Series:	Update IGT tests to support new engine busyness interface
URL:	https://patchwork.freedesktop.org/series/124147/
State:	success
Details:	https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_9858/index.html

CI Bug Log - changes from XEIGT_7499_BAT -> XEIGTPW_9858_BAT

Summary

SUCCESS

No regressions found.

Participating hosts (4 -> 4)

No changes in participating hosts

Known issues

Here are the changes found in XEIGTPW_9858_BAT that come from known issues:

IGT changes

Possible fixes

{igt@xe_create@create-execqueues-noleak}:
- bat-atsm-2: FAIL (Intel XE#524) -> PASS

{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).

Build changes

IGT: IGT_7499 -> IGTPW_9858
Linux: xe-390-6149acb947f2f8b65ee1a058982a5d6fce3124ec -> xe-392-16e2c940ef53f81b2c68e16ec39cf5772894a625

IGTPW_9858: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9858/index.html
IGT_7499: d991240f6c6751e9480456c20de785cfc6e6ff15 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-390-6149acb947f2f8b65ee1a058982a5d6fce3124ec: 6149acb947f2f8b65ee1a058982a5d6fce3124ec
xe-392-16e2c940ef53f81b2c68e16ec39cf5772894a625: 16e2c940ef53f81b2c68e16ec39cf5772894a625

--===============7427122597503366646==-- From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.100]) by gabe.freedesktop.org (Postfix) with ESMTPS id 6082910E705 for ; Fri, 22 Sep 2023 21:52:40 +0000 (UTC) From: Umesh Nerlige Ramappa To: igt-dev@lists.freedesktop.org Date: Fri, 22 Sep 2023 14:52:30 -0700 Message-Id: <20230922215233.2438200-3-umesh.nerlige.ramappa@intel.com> In-Reply-To: <20230922215233.2438200-1-umesh.nerlige.ramappa@intel.com> References: <20230922215233.2438200-1-umesh.nerlige.ramappa@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [igt-dev] [PATCH i-g-t 2/5] i915/pmu: Pass config directly to the init test List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: igt-dev-bounces@lists.freedesktop.org Sender: "igt-dev" List-ID: The busy config may need to be modified across the tests for a new busyness interface. In preparation for that, pass the config directly to the init test. Signed-off-by: Umesh Nerlige Ramappa --- tests/intel/perf_pmu.c | 17 ++++++++--------- 1 file changed, 8 insertions(+), 9 deletions(-) diff --git a/tests/intel/perf_pmu.c b/tests/intel/perf_pmu.c index 87078ad38..eafa3d988 100644 --- a/tests/intel/perf_pmu.c +++ b/tests/intel/perf_pmu.c @@ -356,22 +356,21 @@ static int open_group(int i915, uint64_t config, int group) return fd; } -static void -init(int gem_fd, const intel_ctx_t *ctx, - const struct intel_execution_engine2 *e, uint8_t sample) +static void init(int gem_fd, const intel_ctx_t *ctx, + const struct intel_execution_engine2 *e, uint64_t config) { int fd, err = 0; bool exists; errno = 0; - fd = perf_i915_open(gem_fd, - __I915_PMU_ENGINE(e->class, e->instance, sample)); + fd = perf_i915_open(gem_fd, config); + if (fd < 0) err = errno; exists = gem_context_has_engine(gem_fd, ctx->id, e->flags); if (intel_gen(intel_get_drm_devid(gem_fd)) < 6 && - sample == I915_SAMPLE_SEMA) + config == I915_PMU_ENGINE_SEMA(e->class, e->instance)) exists = false; if (exists) { @@ -2581,13 +2580,13 @@ igt_main * is correctly rejected. */ test_each_engine("init-busy", fd, ctx, e) - init(fd, ctx, e, I915_SAMPLE_BUSY); + init(fd, ctx, e, I915_PMU_ENGINE_BUSY(e->class, e->instance)); test_each_engine("init-wait", fd, ctx, e) - init(fd, ctx, e, I915_SAMPLE_WAIT); + init(fd, ctx, e, I915_PMU_ENGINE_WAIT(e->class, e->instance)); test_each_engine("init-sema", fd, ctx, e) - init(fd, ctx, e, I915_SAMPLE_SEMA); + init(fd, ctx, e, I915_PMU_ENGINE_SEMA(e->class, e->instance)); /** * Test that engines show no load when idle. -- 2.38.1 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.100]) by gabe.freedesktop.org (Postfix) with ESMTPS id 17B4610E19F for ; Fri, 22 Sep 2023 21:52:40 +0000 (UTC) From: Umesh Nerlige Ramappa To: igt-dev@lists.freedesktop.org Date: Fri, 22 Sep 2023 14:52:29 -0700 Message-Id: <20230922215233.2438200-2-umesh.nerlige.ramappa@intel.com> In-Reply-To: <20230922215233.2438200-1-umesh.nerlige.ramappa@intel.com> References: <20230922215233.2438200-1-umesh.nerlige.ramappa@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [igt-dev] [PATCH i-g-t 1/5] i915/pmu: Add helpers to convert ticks to ns List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: igt-dev-bounces@lists.freedesktop.org Sender: "igt-dev" List-ID: MTL is introducing a 2 new counters to read busyness in ticks rather than nanoseconds: (1) A counter that returns engine busyness in ticks (xxxx-busy-ticks) (2) A counter that returns gt active time in ticks (total-active-ticks) Busyness % = (delta-xxxx-busy-ticks * 100) / delta-total-active-ticks At the same time it is deprecating the old busyness counter that would require the kernel to convert the ticks to ns. Current IGT modifications are not using total-active-ticks since that is a larger change and more thought needs to go into incorporating that into the tests. That will be part of a follow up series. For now, add some helpers to the IGT tests to convert the ticks to ns. Signed-off-by: Umesh Nerlige Ramappa --- tests/intel/perf_pmu.c | 69 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 69 insertions(+) diff --git a/tests/intel/perf_pmu.c b/tests/intel/perf_pmu.c index c6e6a8b77..87078ad38 100644 --- a/tests/intel/perf_pmu.c +++ b/tests/intel/perf_pmu.c @@ -255,6 +255,72 @@ IGT_TEST_DESCRIPTION("Test the i915 pmu perf interface"); const double tolerance = 0.05f; const unsigned long batch_duration_ns = 500e6; +static bool busy_ticks_only; +static uint32_t cs_ts_freq; + +static bool strendswith(const char *str, const char *endswith) +{ + unsigned int endlen = strlen(endswith); + unsigned int str_len = strlen(str); + + if (str_len < endlen) + return false; + + return strcmp(str + (str_len - endlen), endswith) == 0; +} + +static bool pmu_supports_event(int i915, const char *event_end) +{ + struct dirent *dent; + bool found = false; + int pmu_fd; + DIR *d; + + pmu_fd = igt_perf_events_dir(i915); + igt_require(pmu_fd >= 0); + + d = fdopendir(dup(pmu_fd)); + igt_assert(d); + rewinddir(d); + + while ((dent = readdir(d)) != NULL) { + if (dent->d_type != DT_REG) + continue; + + if (strendswith(dent->d_name, event_end)) { + found = true; + break; + } + } + + closedir(d); + close(pmu_fd); + + return found; +} + +static bool pmu_supports_only_busy_ticks(int i915) +{ + return pmu_supports_event(i915, "-busy-ticks") && + !pmu_supports_event(i915, "-busy"); +} + +static uint32_t +cs_timestamp_frequency(int fd) +{ + struct drm_i915_getparam gp = {}; + static uint32_t value; + + if (value) + return value; + + gp.param = I915_PARAM_CS_TIMESTAMP_FREQUENCY; + gp.value = (int *)(&value); + + igt_assert_eq(igt_ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp), 0); + + return value; +} char *drpc; const char *no_debug_data = "\0"; @@ -2482,6 +2548,9 @@ igt_main i915_for_each_gt(fd, tmp, gt) num_gt++; + + busy_ticks_only = pmu_supports_only_busy_ticks(fd); + cs_ts_freq = cs_timestamp_frequency(fd); } igt_describe("Verify i915 pmu dir exists and read all events"); -- 2.38.1 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.100]) by gabe.freedesktop.org (Postfix) with ESMTPS id B7A7710E19F for ; Fri, 22 Sep 2023 21:52:40 +0000 (UTC) From: Umesh Nerlige Ramappa To: igt-dev@lists.freedesktop.org Date: Fri, 22 Sep 2023 14:52:33 -0700 Message-Id: <20230922215233.2438200-6-umesh.nerlige.ramappa@intel.com> In-Reply-To: <20230922215233.2438200-1-umesh.nerlige.ramappa@intel.com> References: <20230922215233.2438200-1-umesh.nerlige.ramappa@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [igt-dev] [PATCH i-g-t 5/5] i915/pmu: Add a new test to use total_active_ticks for busyness List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: igt-dev-bounces@lists.freedesktop.org Sender: "igt-dev" List-ID: Busyness percentage can be calculated using the total-active-ticks counter as follows: % busyness = ((delta of xxxx-busy-ticks) * 100) / delta total-active-ticks Add a test to check busyness using this method. Note that total-active-ticks is updated only every 100 ms, so granularity of the busy-idle test is affected. To account for this, the test duration is set to a larger value for the new busyness interface. Signed-off-by: Umesh Nerlige Ramappa --- tests/intel/perf_pmu.c | 77 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 77 insertions(+) diff --git a/tests/intel/perf_pmu.c b/tests/intel/perf_pmu.c index 5999d1e22..80182dbfa 100644 --- a/tests/intel/perf_pmu.c +++ b/tests/intel/perf_pmu.c @@ -249,6 +249,16 @@ * Description: Test the i915 pmu perf interface * Feature: i915 pmu perf interface, pmu * Test category: Perf + * + * SUBTEST: busy-ticks + * Description: Test the i915 v2 engine active busyness interface + * Feature: i915 pmu perf interface, pmu + * Test category: Perf + * + * SUBTEST: busy-idle-ticks + * Description: Test the i915 v2 engine idle busyness interface + * Feature: i915 pmu perf interface, pmu + * Test category: Perf */ IGT_TEST_DESCRIPTION("Test the i915 pmu perf interface"); @@ -2547,6 +2557,63 @@ static void pmu_read(int i915) close(pmu_fd); } +static void +single_ticks(int gem_fd, const intel_ctx_t *ctx, + const struct intel_execution_engine2 *e, unsigned int flags) +{ + igt_spin_t *spin; + uint64_t before[2], after[2]; + uint64_t busy_ticks, total_active_ticks; + int fd[2]; + uint64_t ahnd = get_reloc_ahnd(gem_fd, ctx->id); + struct i915_engine_class_instance ci = { + e->class, + e->instance, + }; + int gt = gem_engine_to_gt_map(gem_fd, &ci); + double busy_percent; + const unsigned long batch_long_duration_ns = 2000e6; + + fd[0] = open_group(gem_fd, __I915_PMU_ENGINE_BUSY(e->class, e->instance), -1); + fd[1] = open_group(gem_fd, __I915_PMU_TOTAL_ACTIVE_TICKS(gt), fd[0]); + + if (flags & TEST_BUSY) { + spin = igt_sync_spin(gem_fd, ahnd, ctx, e); + } else { + spin = NULL; + gem_quiescent_gpu(gem_fd); + } + + pmu_read_multi(fd[0], 2, before); + measured_usleep(batch_long_duration_ns / 1000); + if (flags & TEST_TRAILING_IDLE) + end_spin(gem_fd, spin, flags); + pmu_read_multi(fd[0], 2, after); + + end_spin(gem_fd, spin, FLAG_SYNC); + + busy_ticks = after[0] - before[0]; + total_active_ticks = after[1] - before[1]; + + igt_info("BUSY: after %ld, before %ld\n", after[0], before[0]); + igt_info("TOTAL: after %ld, before %ld\n", after[1], before[1]); + igt_info("BUSY: delta %ld\n", busy_ticks); + igt_info("TOTAL: delta %ld\n", total_active_ticks); + + busy_percent = (double)(busy_ticks * 100) / (double)total_active_ticks; + + igt_info("LOCAL: percent %f\n", busy_percent); + + igt_assert(busy_percent >= 95); + + igt_spin_free(gem_fd, spin); + close(fd[0]); + close(fd[1]); + put_ahnd(ahnd); + + gem_quiescent_gpu(gem_fd); +} + #define test_each_engine(T, i915, ctx, e) \ igt_subtest_with_dynamic(T) for_each_ctx_engine(i915, ctx, e) \ igt_dynamic_f("%s", e->name) @@ -2639,6 +2706,16 @@ igt_main test_each_engine("busy-idle", fd, ctx, e) single(fd, ctx, e, TEST_BUSY | TEST_TRAILING_IDLE); + igt_subtest_group { + igt_fixture igt_require(busy_ticks_only); + + test_each_engine("busy-ticks", fd, ctx, e) + single_ticks(fd, ctx, e, TEST_BUSY); + + test_each_engine("busy-idle-ticks", fd, ctx, e) + single_ticks(fd, ctx, e, TEST_BUSY | TEST_TRAILING_IDLE); + } + /** * Test that when one engine is loaded other report no * load. -- 2.38.1 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.100]) by gabe.freedesktop.org (Postfix) with ESMTPS id AEC2210E19B for ; Fri, 22 Sep 2023 21:52:40 +0000 (UTC) From: Umesh Nerlige Ramappa To: igt-dev@lists.freedesktop.org Date: Fri, 22 Sep 2023 14:52:32 -0700 Message-Id: <20230922215233.2438200-5-umesh.nerlige.ramappa@intel.com> In-Reply-To: <20230922215233.2438200-1-umesh.nerlige.ramappa@intel.com> References: <20230922215233.2438200-1-umesh.nerlige.ramappa@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [igt-dev] [PATCH i-g-t 4/5] lib/i915: Export engine to gt mapping List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: igt-dev-bounces@lists.freedesktop.org Sender: "igt-dev" List-ID: Some tests benefit from this helper. Export it. Signed-off-by: Umesh Nerlige Ramappa --- lib/i915/gem_engine_topology.c | 2 +- lib/i915/gem_engine_topology.h | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/lib/i915/gem_engine_topology.c b/lib/i915/gem_engine_topology.c index 7c6cd9ba9..a823e47a1 100644 --- a/lib/i915/gem_engine_topology.c +++ b/lib/i915/gem_engine_topology.c @@ -370,7 +370,7 @@ mtl_engine_to_gt_map(const struct i915_engine_class_instance *e) } } -static int gem_engine_to_gt_map(int i915, const struct i915_engine_class_instance *engine) +int gem_engine_to_gt_map(int i915, const struct i915_engine_class_instance *engine) { uint32_t devid = intel_get_drm_devid(i915); diff --git a/lib/i915/gem_engine_topology.h b/lib/i915/gem_engine_topology.h index 89642c317..8964ce5f7 100644 --- a/lib/i915/gem_engine_topology.h +++ b/lib/i915/gem_engine_topology.h @@ -61,6 +61,7 @@ intel_get_current_physical_engine(struct intel_engine_data *ed); void intel_next_engine(struct intel_engine_data *ed); +int gem_engine_to_gt_map(int i915, const struct i915_engine_class_instance *engine); struct i915_engine_class_instance * gem_list_engines(int i915, uint32_t gt_mask, -- 2.38.1 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.100]) by gabe.freedesktop.org (Postfix) with ESMTPS id B583C10E19B for ; Fri, 22 Sep 2023 21:52:38 +0000 (UTC) From: Umesh Nerlige Ramappa To: igt-dev@lists.freedesktop.org Date: Fri, 22 Sep 2023 14:52:28 -0700 Message-Id: <20230922215233.2438200-1-umesh.nerlige.ramappa@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [igt-dev] [PATCH i-g-t 0/5] Update IGT tests to support new engine busyness interface List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: igt-dev-bounces@lists.freedesktop.org Sender: "igt-dev" List-ID: MTL introduces a new mechanism to query engine busyness from GuC that is less error prone and does not need the KMD to extend counters to 64 bits. This means KMD can get rid of the worker that regularly updates counters to 64 bits and is a simpler implementation. GuC provides 2 counters to calculate busyness: (1) xxxx-busy-ticks that provides engine busyness in ticks (2) total-active-ticks[-gtN] that provides how long the gt has been active The 2 values enable user to calculate the busyness % as follows: busyness % = (delta xxxx-busy-ticks * 100) / (delta total-active-ticks) Update IGT tests to use this new interface. While this simplifies the implemantation and reduces a bunch of races that existed with current upstream version, the granularity for the active busyness of an engine is now 100 ms. Any higher granularity will add overhead to GuC since GuC is periodically updating this busyness. Signed-off-by: Umesh Nerlige Ramappa Umesh Nerlige Ramappa (5): i915/pmu: Add helpers to convert ticks to ns i915/pmu: Pass config directly to the init test i915/pmu: Switch to new busyness counter if old one is unavailable lib/i915: Export engine to gt mapping i915/pmu: Add a new test to use total_active_ticks for busyness lib/i915/gem_engine_topology.c | 2 +- lib/i915/gem_engine_topology.h | 1 + lib/i915/i915_drm_local.h | 10 ++ tests/intel/perf_pmu.c | 276 +++++++++++++++++++++++++++------ 4 files changed, 241 insertions(+), 48 deletions(-) -- 2.38.1 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.100]) by gabe.freedesktop.org (Postfix) with ESMTPS id 6A6B710E718 for ; Fri, 22 Sep 2023 21:52:40 +0000 (UTC) From: Umesh Nerlige Ramappa To: igt-dev@lists.freedesktop.org Date: Fri, 22 Sep 2023 14:52:31 -0700 Message-Id: <20230922215233.2438200-4-umesh.nerlige.ramappa@intel.com> In-Reply-To: <20230922215233.2438200-1-umesh.nerlige.ramappa@intel.com> References: <20230922215233.2438200-1-umesh.nerlige.ramappa@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [igt-dev] [PATCH i-g-t 3/5] i915/pmu: Switch to new busyness counter if old one is unavailable List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: igt-dev-bounces@lists.freedesktop.org Sender: "igt-dev" List-ID: MTL onwards, the old busyness counter is deprecated and users must use the busyness ticks counter. Add support in IGT tests to switch to new counter as needed. Signed-off-by: Umesh Nerlige Ramappa --- lib/i915/i915_drm_local.h | 10 ++++ tests/intel/perf_pmu.c | 115 +++++++++++++++++++++++++------------- 2 files changed, 86 insertions(+), 39 deletions(-) diff --git a/lib/i915/i915_drm_local.h b/lib/i915/i915_drm_local.h index 0f47578c6..b94b88de3 100644 --- a/lib/i915/i915_drm_local.h +++ b/lib/i915/i915_drm_local.h @@ -26,6 +26,13 @@ extern "C" { #define DRM_I915_PERF_PROP_OA_ENGINE_CLASS 9 #define DRM_I915_PERF_PROP_OA_ENGINE_INSTANCE 10 +#define I915_SAMPLE_BUSY_TICKS (I915_SAMPLE_SEMA + 1) + +#define I915_PMU_ENGINE_BUSY_TICKS(class, instance) \ + __I915_PMU_ENGINE(class, instance, I915_SAMPLE_BUSY_TICKS) + +#define I915_PMU_TOTAL_ACTIVE_TICKS __I915_PMU_OTHER(5) + /* * Top 4 bits of every non-engine counter are GT id. */ @@ -40,6 +47,9 @@ extern "C" { #define __I915_PMU_INTERRUPTS(gt) ___I915_PMU_OTHER(gt, 2) #define __I915_PMU_RC6_RESIDENCY(gt) ___I915_PMU_OTHER(gt, 3) #define __I915_PMU_SOFTWARE_GT_AWAKE_TIME(gt) ___I915_PMU_OTHER(gt, 4) +#define __I915_PMU_TOTAL_ACTIVE_TICKS(gt) ___I915_PMU_OTHER(gt, 5) + +#define I915_SCHEDULER_CAP_ENGINE_BUSY_TICKS_STATS (1ul << 5) #define I915_GEM_CREATE_EXT_SET_PAT 2 diff --git a/tests/intel/perf_pmu.c b/tests/intel/perf_pmu.c index eafa3d988..5999d1e22 100644 --- a/tests/intel/perf_pmu.c +++ b/tests/intel/perf_pmu.c @@ -334,6 +334,35 @@ static char *get_drpc(int i915, int gt_id) return igt_sysfs_get(gt_dir, "drpc"); } +static uint64_t __to_ns(uint64_t val) +{ + return busy_ticks_only ? + (val * NSEC_PER_SEC) / cs_ts_freq : + val; +} + +#define __batch_duration_ns \ +({ \ + unsigned long __delay_ns = busy_ticks_only ? \ + 2000e6 : \ + batch_duration_ns; \ + __delay_ns; \ +}) + +#define __I915_PMU_ENGINE_BUSY(c, i) \ +({ \ + uint64_t __config; \ + typeof(c) __c = c; \ + typeof(i) __i = i; \ + \ + if (busy_ticks_only) \ + __config = I915_PMU_ENGINE_BUSY_TICKS(__c, __i); \ + else \ + __config = I915_PMU_ENGINE_BUSY(__c, __i); \ + \ + __config; \ +}) + static int open_pmu(int i915, uint64_t config) { int fd; @@ -506,10 +535,11 @@ single(int gem_fd, const intel_ctx_t *ctx, spin = NULL; val = pmu_read_single(fd); - slept = measured_usleep(batch_duration_ns / 1000); + slept = measured_usleep(__batch_duration_ns / 1000); if (flags & TEST_TRAILING_IDLE) end_spin(gem_fd, spin, flags); val = pmu_read_single(fd) - val; + val = __to_ns(val); if (flags & FLAG_HANG) igt_force_gpu_reset(gem_fd); @@ -555,11 +585,12 @@ busy_start(int gem_fd, const intel_ctx_t *ctx, spin = __igt_sync_spin(gem_fd, ahnd, ctx, e); - fd = open_pmu(gem_fd, I915_PMU_ENGINE_BUSY(e->class, e->instance)); + fd = open_pmu(gem_fd, __I915_PMU_ENGINE_BUSY(e->class, e->instance)); val = __pmu_read_single(fd, &ts[0]); - slept = measured_usleep(batch_duration_ns / 1000); + slept = measured_usleep(__batch_duration_ns / 1000); val = __pmu_read_single(fd, &ts[1]) - val; + val = __to_ns(val); igt_debug("slept=%lu perf=%"PRIu64"\n", slept, ts[1] - ts[0]); igt_spin_free(gem_fd, spin); @@ -611,11 +642,12 @@ busy_double_start(int gem_fd, const intel_ctx_t *ctx, * Open PMU as fast as possible after the second spin batch in attempt * to be faster than the driver handling lite-restore. */ - fd = open_pmu(gem_fd, I915_PMU_ENGINE_BUSY(e->class, e->instance)); + fd = open_pmu(gem_fd, __I915_PMU_ENGINE_BUSY(e->class, e->instance)); val = __pmu_read_single(fd, &ts[0]); - slept = measured_usleep(batch_duration_ns / 1000); + slept = measured_usleep(__batch_duration_ns / 1000); val = __pmu_read_single(fd, &ts[1]) - val; + val = __to_ns(val); igt_debug("slept=%lu perf=%"PRIu64"\n", slept, ts[1] - ts[0]); igt_spin_end(spin[0]); @@ -685,8 +717,8 @@ busy_check_all(int gem_fd, const intel_ctx_t *ctx, busy_idx = i; fd[i++] = open_group(gem_fd, - I915_PMU_ENGINE_BUSY(e_->class, - e_->instance), + __I915_PMU_ENGINE_BUSY(e_->class, + e_->instance), fd[0]); } @@ -694,7 +726,7 @@ busy_check_all(int gem_fd, const intel_ctx_t *ctx, spin = igt_sync_spin(gem_fd, ahnd, ctx, e); pmu_read_multi(fd[0], num_engines, tval[0]); - slept = measured_usleep(batch_duration_ns / 1000); + slept = measured_usleep(__batch_duration_ns / 1000); if (flags & TEST_TRAILING_IDLE) end_spin(gem_fd, spin, flags); pmu_read_multi(fd[0], num_engines, tval[1]); @@ -706,7 +738,7 @@ busy_check_all(int gem_fd, const intel_ctx_t *ctx, put_ahnd(ahnd); for (i = 0; i < num_engines; i++) - val[i] = tval[1][i] - tval[0][i]; + val[i] = __to_ns(tval[1][i] - tval[0][i]); log_busy(num_engines, val); @@ -756,7 +788,7 @@ most_busy_check_all(int gem_fd, const intel_ctx_t *ctx, else spin = __igt_sync_spin_poll(gem_fd, ahnd, ctx, e_); - val[i++] = I915_PMU_ENGINE_BUSY(e_->class, e_->instance); + val[i++] = __I915_PMU_ENGINE_BUSY(e_->class, e_->instance); } igt_assert(i == num_engines); igt_require(spin); /* at least one busy engine */ @@ -769,7 +801,7 @@ most_busy_check_all(int gem_fd, const intel_ctx_t *ctx, usleep(__igt_sync_spin_wait(gem_fd, spin) * num_engines / 1e3); pmu_read_multi(fd[0], num_engines, tval[0]); - slept = measured_usleep(batch_duration_ns / 1000); + slept = measured_usleep(__batch_duration_ns / 1000); if (flags & TEST_TRAILING_IDLE) end_spin(gem_fd, spin, flags); pmu_read_multi(fd[0], num_engines, tval[1]); @@ -781,7 +813,7 @@ most_busy_check_all(int gem_fd, const intel_ctx_t *ctx, put_ahnd(ahnd); for (i = 0; i < num_engines; i++) - val[i] = tval[1][i] - tval[0][i]; + val[i] = __to_ns(tval[1][i] - tval[0][i]); log_busy(num_engines, val); @@ -815,7 +847,7 @@ all_busy_check_all(int gem_fd, const intel_ctx_t *ctx, else spin = __igt_sync_spin_poll(gem_fd, ahnd, ctx, e); - val[i++] = I915_PMU_ENGINE_BUSY(e->class, e->instance); + val[i++] = __I915_PMU_ENGINE_BUSY(e->class, e->instance); } igt_assert(i == num_engines); @@ -827,7 +859,7 @@ all_busy_check_all(int gem_fd, const intel_ctx_t *ctx, usleep(__igt_sync_spin_wait(gem_fd, spin) * num_engines / 1e3); pmu_read_multi(fd[0], num_engines, tval[0]); - slept = measured_usleep(batch_duration_ns / 1000); + slept = measured_usleep(__batch_duration_ns / 1000); if (flags & TEST_TRAILING_IDLE) end_spin(gem_fd, spin, flags); pmu_read_multi(fd[0], num_engines, tval[1]); @@ -839,7 +871,7 @@ all_busy_check_all(int gem_fd, const intel_ctx_t *ctx, put_ahnd(ahnd); for (i = 0; i < num_engines; i++) - val[i] = tval[1][i] - tval[0][i]; + val[i] = __to_ns(tval[1][i] - tval[0][i]); log_busy(num_engines, val); @@ -870,7 +902,7 @@ no_sema(int gem_fd, const intel_ctx_t *ctx, spin = NULL; pmu_read_multi(fd[0], 2, val[0]); - measured_usleep(batch_duration_ns / 1000); + measured_usleep(__batch_duration_ns / 1000); if (flags & TEST_TRAILING_IDLE) end_spin(gem_fd, spin, flags); pmu_read_multi(fd[0], 2, val[1]); @@ -983,7 +1015,7 @@ sema_wait(int gem_fd, const intel_ctx_t *ctx, "sampling failed to start withing 10ms\n"); val[0] = __pmu_read_single(fd, &ts[0]); - slept = measured_usleep(batch_duration_ns / 1000); + slept = measured_usleep(__batch_duration_ns / 1000); if (flags & TEST_TRAILING_IDLE) obj_ptr[0] = 1; val[1] = __pmu_read_single(fd, &ts[1]); @@ -1104,11 +1136,11 @@ __sema_busy(int gem_fd, uint64_t ahnd, int pmu, const intel_ctx_t *ctx, total = pmu_read_multi(pmu, 2, start); - sema = measured_usleep(batch_duration_ns * sema_pct / 100 / 1000); + sema = measured_usleep(__batch_duration_ns * sema_pct / 100 / 1000); *map = 2; __sync_synchronize(); - busy = measured_usleep(batch_duration_ns * (busy_pct - sema_pct) / 100 / 1000); + busy = measured_usleep(__batch_duration_ns * (busy_pct - sema_pct) / 100 / 1000); igt_spin_end(spin); - measured_usleep(batch_duration_ns * (100 - busy_pct) / 100 / 1000); + measured_usleep(__batch_duration_ns * (100 - busy_pct) / 100 / 1000); total = pmu_read_multi(pmu, 2, val) - total; igt_spin_free(gem_fd, spin); @@ -1116,7 +1148,7 @@ __sema_busy(int gem_fd, uint64_t ahnd, int pmu, const intel_ctx_t *ctx, busy += sema; val[SEMA] -= start[SEMA]; - val[BUSY] -= start[BUSY]; + val[BUSY] -= __to_ns(start[BUSY]); igt_info("%s, target: {%.1f%% [%d], %.1f%% [%d]}, measured: {%.1f%%, %.1f%%}\n", e->name, @@ -1145,7 +1177,7 @@ sema_busy(int gem_fd, const intel_ctx_t *ctx, fd[0] = open_group(gem_fd, I915_PMU_ENGINE_SEMA(e->class, e->instance), -1); - fd[1] = open_group(gem_fd, I915_PMU_ENGINE_BUSY(e->class, e->instance), + fd[1] = open_group(gem_fd, __I915_PMU_ENGINE_BUSY(e->class, e->instance), fd[0]); __sema_busy(gem_fd, ahnd, fd[0], ctx, e, 50, 100); @@ -1173,8 +1205,9 @@ static void test_awake(int i915, const intel_ctx_t *ctx) igt_spin_new(i915, .ahnd = ahnd, .ctx = ctx, .engine = e->flags); val = pmu_read_single(fd); - slept = measured_usleep(batch_duration_ns / 1000); + slept = measured_usleep(__batch_duration_ns / 1000); val = pmu_read_single(fd) - val; + val = __to_ns(val); gem_quiescent_gpu(i915); assert_within_epsilon(val, slept, tolerance); @@ -1185,7 +1218,7 @@ static void test_awake(int i915, const intel_ctx_t *ctx) igt_spin_new(i915, .ahnd = ahnd, .ctx = ctx, .engine = e->flags); val = pmu_read_single(fd); - slept = measured_usleep(batch_duration_ns / 1000); + slept = measured_usleep(__batch_duration_ns / 1000); val = pmu_read_single(fd) - val; gem_quiescent_gpu(i915); @@ -1405,7 +1438,7 @@ static void multi_client(int gem_fd, const intel_ctx_t *ctx, const struct intel_execution_engine2 *e) { - uint64_t config = I915_PMU_ENGINE_BUSY(e->class, e->instance); + uint64_t config = __I915_PMU_ENGINE_BUSY(e->class, e->instance); unsigned long slept[2]; uint64_t val[2], ts[2], perf_slept[2]; igt_spin_t *spin; @@ -1426,14 +1459,16 @@ multi_client(int gem_fd, const intel_ctx_t *ctx, spin = igt_sync_spin(gem_fd, ahnd, ctx, e); val[0] = val[1] = __pmu_read_single(fd[0], &ts[0]); - slept[1] = measured_usleep(batch_duration_ns / 1000); + slept[1] = measured_usleep(__batch_duration_ns / 1000); val[1] = __pmu_read_single(fd[1], &ts[1]) - val[1]; + val[1] = __to_ns(val[1]); perf_slept[1] = ts[1] - ts[0]; igt_debug("slept=%lu perf=%"PRIu64"\n", slept[1], perf_slept[1]); close(fd[1]); - slept[0] = measured_usleep(batch_duration_ns / 1000) + slept[1]; + slept[0] = measured_usleep(__batch_duration_ns / 1000) + slept[1]; val[0] = __pmu_read_single(fd[0], &ts[1]) - val[0]; + val[0] = __to_ns(val[0]); perf_slept[0] = ts[1] - ts[0]; igt_debug("slept=%lu perf=%"PRIu64"\n", slept[0], perf_slept[0]); @@ -1463,7 +1498,7 @@ static void invalid_init(int i915) #define ATTR_INIT() \ do { \ memset(&attr, 0, sizeof (attr)); \ - attr.config = I915_PMU_ENGINE_BUSY(I915_ENGINE_CLASS_RENDER, 0); \ + attr.config = __I915_PMU_ENGINE_BUSY(I915_ENGINE_CLASS_RENDER, 0); \ attr.type = i915_perf_type_id(i915); \ igt_assert(attr.type != 0); \ errno = 0; \ @@ -1510,7 +1545,7 @@ static void cpu_hotplug(int gem_fd) igt_require(cpu0_hotplug_support()); fd = open_pmu(gem_fd, - I915_PMU_ENGINE_BUSY(I915_ENGINE_CLASS_RENDER, 0)); + __I915_PMU_ENGINE_BUSY(I915_ENGINE_CLASS_RENDER, 0)); /* * Create two spinners so test can ensure shorter gaps in engine @@ -1608,6 +1643,7 @@ static void cpu_hotplug(int gem_fd) } val = __pmu_read_single(fd, &ts[1]) - val; + val = __to_ns(val); end_spin(gem_fd, spin[0], FLAG_SYNC); end_spin(gem_fd, spin[1], FLAG_SYNC); @@ -1839,7 +1875,7 @@ test_frequency(int gem_fd, unsigned int gt) spin = spin_sync_gt(gem_fd, ahnd, gt, &ctx); slept = pmu_read_multi(fd[0], 2, start); - measured_usleep(batch_duration_ns / 1000); + measured_usleep(__batch_duration_ns / 1000); slept = pmu_read_multi(fd[0], 2, val) - slept; min[0] = 1e9*(val[0] - start[0]) / slept; @@ -1869,7 +1905,7 @@ test_frequency(int gem_fd, unsigned int gt) spin = spin_sync_gt(gem_fd, ahnd, gt, &ctx); slept = pmu_read_multi(fd[0], 2, start); - measured_usleep(batch_duration_ns / 1000); + measured_usleep(__batch_duration_ns / 1000); slept = pmu_read_multi(fd[0], 2, val) - slept; max[0] = 1e9*(val[0] - start[0]) / slept; @@ -1927,7 +1963,7 @@ test_frequency_idle(int gem_fd, unsigned int gt) measured_usleep(2000); /* Wait for timers to cease */ slept = pmu_read_multi(fd[0], 2, start); - measured_usleep(batch_duration_ns / 1000); + measured_usleep(__batch_duration_ns / 1000); slept = pmu_read_multi(fd[0], 2, val) - slept; close(fd[0]); @@ -2150,7 +2186,7 @@ static void test_enable_race(int gem_fd, const intel_ctx_t *ctx, const struct intel_execution_engine2 *e) { - uint64_t config = I915_PMU_ENGINE_BUSY(e->class, e->instance); + uint64_t config = __I915_PMU_ENGINE_BUSY(e->class, e->instance); struct igt_helper_process engine_load = { }; const uint32_t bbend = MI_BATCH_BUFFER_END; struct drm_i915_gem_exec_object2 obj = { }; @@ -2223,7 +2259,7 @@ accuracy(int gem_fd, const intel_ctx_t *ctx, unsigned long test_us; unsigned long cycle_us, busy_us, idle_us; double busy_r, expected; - uint64_t val[2]; + uint64_t val[2], _val; uint64_t ts[2]; int link[2]; int fd; @@ -2342,7 +2378,7 @@ accuracy(int gem_fd, const intel_ctx_t *ctx, put_ahnd(ahnd); } - fd = open_pmu(gem_fd, I915_PMU_ENGINE_BUSY(e->class, e->instance)); + fd = open_pmu(gem_fd, __I915_PMU_ENGINE_BUSY(e->class, e->instance)); /* Let the child run. */ read(link[0], &expected, sizeof(expected)); @@ -2359,7 +2395,8 @@ accuracy(int gem_fd, const intel_ctx_t *ctx, igt_waitchildren(); - busy_r = (double)(val[1] - val[0]) / (ts[1] - ts[0]); + _val = __to_ns(val[1] - val[0]); + busy_r = (double)_val / (ts[1] - ts[0]); igt_info("error=%.2f%% (%.2f%% vs %.2f%%)\n", (busy_r - expected) * 100, 100 * busy_r, 100 * expected); @@ -2392,7 +2429,7 @@ static void faulting_read(int gem_fd, const struct mmap_offset *t) ptr = create_mmap(gem_fd, t, 4096); igt_require(ptr != NULL); - fd = open_pmu(gem_fd, I915_PMU_ENGINE_BUSY(0, 0)); + fd = open_pmu(gem_fd, __I915_PMU_ENGINE_BUSY(0, 0)); igt_require(fd != -1); igt_assert_eq(read(fd, ptr, 4096), 2 * sizeof(uint64_t)); close(fd); @@ -2433,7 +2470,7 @@ static void test_unload(unsigned int num_engines) cfg = intel_ctx_cfg_all_physical(i915); for_each_ctx_cfg_engine(i915, &cfg, e) { fd[count] = perf_i915_open_group(i915, - I915_PMU_ENGINE_BUSY(e->class, e->instance), + __I915_PMU_ENGINE_BUSY(e->class, e->instance), fd[count - 1]); if (fd[count] != -1) count++; @@ -2580,7 +2617,7 @@ igt_main * is correctly rejected. */ test_each_engine("init-busy", fd, ctx, e) - init(fd, ctx, e, I915_PMU_ENGINE_BUSY(e->class, e->instance)); + init(fd, ctx, e, __I915_PMU_ENGINE_BUSY(e->class, e->instance)); test_each_engine("init-wait", fd, ctx, e) init(fd, ctx, e, I915_PMU_ENGINE_WAIT(e->class, e->instance)); -- 2.38.1 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.100]) by gabe.freedesktop.org (Postfix) with ESMTPS id 5F2D210E091 for ; Fri, 22 Sep 2023 22:18:36 +0000 (UTC) Date: Fri, 22 Sep 2023 15:18:12 -0700 From: Umesh Nerlige Ramappa To: Message-ID: References: <20230922215233.2438200-1-umesh.nerlige.ramappa@intel.com> <20230922215233.2438200-6-umesh.nerlige.ramappa@intel.com> Content-Type: text/plain; charset="utf-8"; format=flowed Content-Disposition: inline In-Reply-To: <20230922215233.2438200-6-umesh.nerlige.ramappa@intel.com> MIME-Version: 1.0 Subject: Re: [igt-dev] [PATCH i-g-t 5/5] i915/pmu: Add a new test to use total_active_ticks for busyness List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: igt-dev-bounces@lists.freedesktop.org Sender: "igt-dev" List-ID: On Fri, Sep 22, 2023 at 02:52:33PM -0700, Umesh Nerlige Ramappa wrote: >Busyness percentage can be calculated using the total-active-ticks >counter as follows: > >% busyness = ((delta of xxxx-busy-ticks) * 100) / delta total-active-ticks > >Add a test to check busyness using this method. > >Note that total-active-ticks is updated only every 100 ms, so >granularity of the busy-idle test is affected. To account for this, the >test duration is set to a larger value for the new busyness interface. > >Signed-off-by: Umesh Nerlige Ramappa >--- > tests/intel/perf_pmu.c | 77 ++++++++++++++++++++++++++++++++++++++++++ > 1 file changed, 77 insertions(+) > >diff --git a/tests/intel/perf_pmu.c b/tests/intel/perf_pmu.c >index 5999d1e22..80182dbfa 100644 >--- a/tests/intel/perf_pmu.c >+++ b/tests/intel/perf_pmu.c >@@ -249,6 +249,16 @@ > * Description: Test the i915 pmu perf interface > * Feature: i915 pmu perf interface, pmu > * Test category: Perf >+ * >+ * SUBTEST: busy-ticks >+ * Description: Test the i915 v2 engine active busyness interface >+ * Feature: i915 pmu perf interface, pmu >+ * Test category: Perf >+ * >+ * SUBTEST: busy-idle-ticks >+ * Description: Test the i915 v2 engine idle busyness interface >+ * Feature: i915 pmu perf interface, pmu >+ * Test category: Perf > */ > > IGT_TEST_DESCRIPTION("Test the i915 pmu perf interface"); >@@ -2547,6 +2557,63 @@ static void pmu_read(int i915) > close(pmu_fd); > } > >+static void >+single_ticks(int gem_fd, const intel_ctx_t *ctx, >+ const struct intel_execution_engine2 *e, unsigned int flags) >+{ >+ igt_spin_t *spin; >+ uint64_t before[2], after[2]; >+ uint64_t busy_ticks, total_active_ticks; >+ int fd[2]; >+ uint64_t ahnd = get_reloc_ahnd(gem_fd, ctx->id); >+ struct i915_engine_class_instance ci = { >+ e->class, >+ e->instance, >+ }; >+ int gt = gem_engine_to_gt_map(gem_fd, &ci); >+ double busy_percent; >+ const unsigned long batch_long_duration_ns = 2000e6; >+ >+ fd[0] = open_group(gem_fd, __I915_PMU_ENGINE_BUSY(e->class, e->instance), -1); >+ fd[1] = open_group(gem_fd, __I915_PMU_TOTAL_ACTIVE_TICKS(gt), fd[0]); >+ >+ if (flags & TEST_BUSY) { >+ spin = igt_sync_spin(gem_fd, ahnd, ctx, e); >+ } else { >+ spin = NULL; >+ gem_quiescent_gpu(gem_fd); >+ } >+ >+ pmu_read_multi(fd[0], 2, before); >+ measured_usleep(batch_long_duration_ns / 1000); >+ if (flags & TEST_TRAILING_IDLE) >+ end_spin(gem_fd, spin, flags); >+ pmu_read_multi(fd[0], 2, after); >+ >+ end_spin(gem_fd, spin, FLAG_SYNC); >+ >+ busy_ticks = after[0] - before[0]; >+ total_active_ticks = after[1] - before[1]; >+ >+ igt_info("BUSY: after %ld, before %ld\n", after[0], before[0]); >+ igt_info("TOTAL: after %ld, before %ld\n", after[1], before[1]); >+ igt_info("BUSY: delta %ld\n", busy_ticks); >+ igt_info("TOTAL: delta %ld\n", total_active_ticks); >+ >+ busy_percent = (double)(busy_ticks * 100) / (double)total_active_ticks; >+ >+ igt_info("LOCAL: percent %f\n", busy_percent); Will drop the igt_info in the final revision since it is for debug Umesh From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Content-Type: multipart/alternative; boundary="===============6403061531606369997==" MIME-Version: 1.0 From: Patchwork To: "Umesh Nerlige Ramappa" Date: Fri, 22 Sep 2023 22:58:26 -0000 Message-ID: <169542350633.5199.12799696832201316577@emeril.freedesktop.org> References: <20230922215233.2438200-1-umesh.nerlige.ramappa@intel.com> In-Reply-To: <20230922215233.2438200-1-umesh.nerlige.ramappa@intel.com> Subject: [igt-dev] =?utf-8?b?4pyXIEZpLkNJLkJBVDogZmFpbHVyZSBmb3IgVXBkYXRl?= =?utf-8?q?_IGT_tests_to_support_new_engine_busyness_interface?= List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: igt-dev@lists.freedesktop.org Cc: igt-dev@lists.freedesktop.org Errors-To: igt-dev-bounces@lists.freedesktop.org Sender: "igt-dev" List-ID: --===============6403061531606369997== Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit == Series Details == Series: Update IGT tests to support new engine busyness interface URL : https://patchwork.freedesktop.org/series/124147/ State : failure == Summary == CI Bug Log - changes from IGT_7499 -> IGTPW_9858 ==================================================== Summary ------- **FAILURE** Serious unknown changes coming with IGTPW_9858 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in IGTPW_9858, please notify your bug team (lgci.bug.filing@intel.com) to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9858/index.html Participating hosts (39 -> 39) ------------------------------ Additional (1): fi-kbl-soraka Missing (1): fi-snb-2520m Possible new issues ------------------- Here are the unknown changes that may have been introduced in IGTPW_9858: ### IGT changes ### #### Possible regressions #### * igt@kms_pipe_crc_basic@suspend-read-crc@pipe-b-hdmi-a-3: - bat-dg2-11: [PASS][1] -> [INCOMPLETE][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7499/bat-dg2-11/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-b-hdmi-a-3.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9858/bat-dg2-11/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-b-hdmi-a-3.html Known issues ------------ Here are the changes found in IGTPW_9858 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@gem_exec_suspend@basic-s0@smem: - bat-dg2-9: [PASS][3] -> [INCOMPLETE][4] ([i915#9275]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7499/bat-dg2-9/igt@gem_exec_suspend@basic-s0@smem.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9858/bat-dg2-9/igt@gem_exec_suspend@basic-s0@smem.html * igt@gem_huc_copy@huc-copy: - fi-kbl-soraka: NOTRUN -> [SKIP][5] ([fdo#109271] / [i915#2190]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9858/fi-kbl-soraka/igt@gem_huc_copy@huc-copy.html * igt@gem_lmem_swapping@basic: - fi-kbl-soraka: NOTRUN -> [SKIP][6] ([fdo#109271] / [i915#4613]) +3 other tests skip [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9858/fi-kbl-soraka/igt@gem_lmem_swapping@basic.html * igt@i915_selftest@live@gt_pm: - fi-kbl-soraka: NOTRUN -> [DMESG-FAIL][7] ([i915#1886] / [i915#7913]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9858/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html * igt@i915_selftest@live@requests: - bat-mtlp-6: [PASS][8] -> [ABORT][9] ([i915#9262]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7499/bat-mtlp-6/igt@i915_selftest@live@requests.html [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9858/bat-mtlp-6/igt@i915_selftest@live@requests.html * igt@i915_suspend@basic-s2idle-without-i915: - fi-apl-guc: [PASS][10] -> [INCOMPLETE][11] ([i915#1982] / [i915#4528]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7499/fi-apl-guc/igt@i915_suspend@basic-s2idle-without-i915.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9858/fi-apl-guc/igt@i915_suspend@basic-s2idle-without-i915.html * igt@kms_dsc@dsc-basic: - fi-kbl-soraka: NOTRUN -> [SKIP][12] ([fdo#109271]) +9 other tests skip [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9858/fi-kbl-soraka/igt@kms_dsc@dsc-basic.html * igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence: - bat-dg2-11: NOTRUN -> [SKIP][13] ([i915#1845]) +3 other tests skip [13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9858/bat-dg2-11/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence.html #### Possible fixes #### * igt@kms_hdmi_inject@inject-audio: - fi-kbl-guc: [FAIL][14] ([IGT#3]) -> [PASS][15] [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7499/fi-kbl-guc/igt@kms_hdmi_inject@inject-audio.html [15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9858/fi-kbl-guc/igt@kms_hdmi_inject@inject-audio.html [IGT#3]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/3 [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845 [i915#1886]: https://gitlab.freedesktop.org/drm/intel/issues/1886 [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982 [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190 [i915#4528]: https://gitlab.freedesktop.org/drm/intel/issues/4528 [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613 [i915#7913]: https://gitlab.freedesktop.org/drm/intel/issues/7913 [i915#9262]: https://gitlab.freedesktop.org/drm/intel/issues/9262 [i915#9275]: https://gitlab.freedesktop.org/drm/intel/issues/9275 Build changes ------------- * CI: CI-20190529 -> None * IGT: IGT_7499 -> IGTPW_9858 CI-20190529: 20190529 CI_DRM_13671: e1973de2c4516e9130157e538014e79c8aa57b41 @ git://anongit.freedesktop.org/gfx-ci/linux IGTPW_9858: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9858/index.html IGT_7499: d991240f6c6751e9480456c20de785cfc6e6ff15 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git Testlist changes ---------------- +igt@perf_pmu@busy-idle-ticks +igt@perf_pmu@busy-ticks == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9858/index.html --===============6403061531606369997== Content-Type: text/html; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Project List - Patchwork Patch Details

Series:	Update IGT tests to support new engine busyness interface
URL:	https://patchwork.freedesktop.org/series/124147/
State:	failure
Details:	https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9858/index.html

CI Bug Log - changes from IGT_7499 -> IGTPW_9858

Summary

FAILURE

Serious unknown changes coming with IGTPW_9858 absolutely need to be
verified manually.

If you think the reported changes have nothing to do with the changes
introduced in IGTPW_9858, please notify your bug team (lgci.bug.filing@intel.com) to allow them
to document this new failure mode, which will reduce false positives in CI.

External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9858/index.html

Participating hosts (39 -> 39)

Additional (1): fi-kbl-soraka
Missing (1): fi-snb-2520m

Possible new issues

Here are the unknown changes that may have been introduced in IGTPW_9858:

IGT changes

Possible regressions

igt@kms_pipe_crc_basic@suspend-read-crc@pipe-b-hdmi-a-3:
- bat-dg2-11: PASS -> INCOMPLETE

Known issues

Here are the changes found in IGTPW_9858 that come from known issues:

IGT changes

Issues hit

igt@gem_exec_suspend@basic-s0@smem:
- bat-dg2-9: PASS -> INCOMPLETE (i915#9275)
igt@gem_huc_copy@huc-copy:
- fi-kbl-soraka: NOTRUN -> SKIP (fdo#109271 / i915#2190)
igt@gem_lmem_swapping@basic:
- fi-kbl-soraka: NOTRUN -> SKIP (fdo#109271 / i915#4613) +3 other tests skip
igt@i915_selftest@live@gt_pm:
- fi-kbl-soraka: NOTRUN -> DMESG-FAIL (i915#1886 / i915#7913)
igt@i915_selftest@live@requests:
- bat-mtlp-6: PASS -> ABORT (i915#9262)
igt@i915_suspend@basic-s2idle-without-i915:
- fi-apl-guc: PASS -> INCOMPLETE (i915#1982 / i915#4528)
igt@kms_dsc@dsc-basic:
- fi-kbl-soraka: NOTRUN -> SKIP (fdo#109271) +9 other tests skip
igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence:
- bat-dg2-11: NOTRUN -> SKIP (i915#1845) +3 other tests skip

Possible fixes

igt@kms_hdmi_inject@inject-audio:
- fi-kbl-guc: FAIL (IGT#3) -> PASS

Build changes

CI: CI-20190529 -> None
IGT: IGT_7499 -> IGTPW_9858

CI-20190529: 20190529
CI_DRM_13671: e1973de2c4516e9130157e538014e79c8aa57b41 @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_9858: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9858/index.html
IGT_7499: d991240f6c6751e9480456c20de785cfc6e6ff15 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git

Testlist changes

+igt@perf_pmu@busy-idle-ticks
+igt@perf_pmu@busy-ticks

--===============6403061531606369997==--