Re: [igt-dev] ✗ Fi.CI.BAT: failure for Add check for HW tiling support in gem_set_tiling_vs_blt test

From: "Vudum, Lakshminarayana" <lakshminarayana.vudum@intel.com>
To: "Latvala, Petri" <petri.latvala@intel.com>
Cc: "igt-dev@lists.freedesktop.org" <igt-dev@lists.freedesktop.org>,
	"Siddiqui, Ayaz A" <ayaz.siddiqui@intel.com>
Subject: Re: [igt-dev] ✗ Fi.CI.BAT: failure for Add check for HW tiling support in gem_set_tiling_vs_blt test
Date: Fri, 31 Jan 2020 12:08:03 +0000	[thread overview]
Message-ID: <a137fc8fbb744bef932ec7581abb95a0@intel.com> (raw)
In-Reply-To: <20200131113442.GZ25209@platvala-desk.ger.corp.intel.com>

Filed bug and re-reported. Thanks.

-----Original Message-----
From: Latvala, Petri <petri.latvala@intel.com> 
Sent: Friday, January 31, 2020 1:35 PM
To: Vudum, Lakshminarayana <lakshminarayana.vudum@intel.com>
Cc: igt-dev@lists.freedesktop.org; Siddiqui, Ayaz A <ayaz.siddiqui@intel.com>
Subject: Re: [igt-dev] ✗ Fi.CI.BAT: failure for Add check for HW tiling support in gem_set_tiling_vs_blt test

On Fri, Jan 31, 2020 at 11:26:00AM +0000, Siddiqui, Ayaz A wrote:
> Hi,
> 
> > -----Original Message-----
> > From: Patchwork <patchwork@emeril.freedesktop.org>
> > Sent: Friday, January 31, 2020 1:26 PM
> > To: Siddiqui, Ayaz A <ayaz.siddiqui@intel.com>
> > Cc: igt-dev@lists.freedesktop.org
> > Subject: ✗ Fi.CI.BAT: failure for Add check for HW tiling support in 
> > gem_set_tiling_vs_blt test
> > 
> > == Series Details ==
> > 
> > Series: Add check for HW tiling support in gem_set_tiling_vs_blt test
> > URL   : https://patchwork.freedesktop.org/series/72803/
> > State : failure
> > 
> > == Summary ==
> > 
> > CI Bug Log - changes from CI_DRM_7848 -> IGTPW_4054 
> > ====================================================
> > 
> > Summary
> > -------
> > 
> >   **FAILURE**
> > 
> >   Serious unknown changes coming with IGTPW_4054 absolutely need to be
> >   verified manually.
> > 
> >   If you think the reported changes have nothing to do with the changes
> >   introduced in IGTPW_4054, please notify your bug team to allow them
> >   to document this new failure mode, which will reduce false positives in CI.
> > 
> >   External URL: https://intel-gfx-ci.01.org/tree/drm-
> > tip/IGTPW_4054/index.html
> > 
> > Possible new issues
> > -------------------
> > 
> >   Here are the unknown changes that may have been introduced in
> > IGTPW_4054:
> > 
> > ### IGT changes ###
> > 
> > #### Possible regressions ####
> > 
> >   * igt@gem_exec_suspend@basic-s0:
> >     - fi-icl-u3:          [PASS][1] -> [INCOMPLETE][2]
> >    [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7848/fi-icl-
> > u3/igt@gem_exec_suspend@basic-s0.html
> >    [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4054/fi-icl-
> > u3/igt@gem_exec_suspend@basic-s0.html
> > 
> > 
> Change provided in this patch set will only impact the tests which are 
> part of gem_set_tiling_vs_blt test suite only.
> 
> Regards
> -Ayaz

Lakshmi, see above.

--
Petri Latvala
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