From: Caz Yokoyama <Caz.Yokoyama@intel.com>
To: igt-dev@lists.freedesktop.org
Subject: Re: [igt-dev] [PATCH v2 1/1] lib/gem_cs_prefetch: enable on Simics Simulator.
Date: Wed, 17 Apr 2019 08:32:25 -0700 [thread overview]
Message-ID: <a1f55de4a45fba7b2c426cfadc1ad5edd80fb9f9.camel@intel.com> (raw)
In-Reply-To: <8fed37b265b9de57d36df8364fb9afd02cdb8ea8.1555442634.git.caz.yokoyama@intel.com>
Drop the patch. Will re-work.
-caz
On Tue, 2019-04-16 at 12:25 -0700, Caz Yokoyama wrote:
> As its comment says, _intel_require_memory() will be removed when all
> test
> calls _intel_require_memory().
>
> Signed-off-by: Caz Yokoyama <caz.yokoyama@intel.com>
> Cc: Stuart Summers <stuart.summers@intel.com>
> ---
> lib/igt_aux.h | 1 +
> lib/intel_os.c | 42
> ++++++++++++++++++++++++++++++++++++
> tests/i915/gem_cs_prefetch.c | 21 ++++++++++++++----
> 3 files changed, 60 insertions(+), 4 deletions(-)
>
> diff --git a/lib/igt_aux.h b/lib/igt_aux.h
> index 55392790..9cb41d41 100644
> --- a/lib/igt_aux.h
> +++ b/lib/igt_aux.h
> @@ -199,6 +199,7 @@ void *intel_get_total_pinnable_mem(size_t
> *pinned);
> int __intel_check_memory(uint64_t count, uint64_t size, unsigned
> mode,
> uint64_t *out_required, uint64_t *out_total);
> void intel_require_memory(uint64_t count, uint64_t size, unsigned
> mode);
> +void _intel_require_memory(uint64_t count, uint64_t size, unsigned
> mode);
> void intel_require_files(uint64_t count);
> #define CHECK_RAM 0x1
> #define CHECK_SWAP 0x2
> diff --git a/lib/intel_os.c b/lib/intel_os.c
> index dd93bea1..c1aab19a 100644
> --- a/lib/intel_os.c
> +++ b/lib/intel_os.c
> @@ -414,6 +414,48 @@ void intel_require_memory(uint64_t count,
> uint64_t size, unsigned mode)
> (long long)vfs_file_max());
> }
>
> +/*
> + * same as intel_require_memory() except for no
> igt_skip_on_simulation()
> + * Will be removed when all test calls _intel_require_memory().
> + */
> +void _intel_require_memory(uint64_t count, uint64_t size, unsigned
> mode)
> +{
> + uint64_t required, total;
> + bool sufficient_memory;
> +
> + sufficient_memory = __intel_check_memory(count, size, mode,
> + &required, &total);
> + if (!sufficient_memory) {
> + int dir = open("/proc", O_RDONLY);
> + char *info;
> +
> + info = igt_sysfs_get(dir, "meminfo");
> + if (info) {
> + igt_warn("Insufficient free memory;
> /proc/meminfo:\n%s",
> + info);
> + free(info);
> + }
> +
> + info = igt_sysfs_get(dir, "slabinfo");
> + if (info) {
> + igt_warn("Insufficient free memory;
> /proc/slabinfo:\n%s",
> + info);
> + free(info);
> + }
> +
> + close(dir);
> + }
> +
> + igt_require_f(sufficient_memory,
> + "Estimated that we need %'llu objects and %'llu
> MiB for the test, but only have %'llu MiB available (%s%s) and a
> maximum of %'llu objects\n",
> + (long long)count,
> + (long long)((required + ((1<<20) - 1)) >> 20),
> + (long long)(total >> 20),
> + mode & (CHECK_RAM | CHECK_SWAP) ? "RAM" : "",
> + mode & CHECK_SWAP ? " + swap": "",
> + (long long)vfs_file_max());
> +}
> +
> void intel_purge_vm_caches(int drm_fd)
> {
> int fd;
> diff --git a/tests/i915/gem_cs_prefetch.c
> b/tests/i915/gem_cs_prefetch.c
> index 2b865368..26ff1bc2 100644
> --- a/tests/i915/gem_cs_prefetch.c
> +++ b/tests/i915/gem_cs_prefetch.c
> @@ -92,13 +92,20 @@ static void can_test_ring(unsigned ring)
> close(fd);
> }
>
> +/*
> + * Following number is calculated from actual execution in Simics,
> i.e.
> + * __intel_check_memory() reports 7948206080 byte of main memory in
> total
> + * gem_create() reports ENOMEM on 14279th execution.
> + */
> +#define KERNEL_BO_OVERHEAD_SIMICS (7948206080 / 14279-1 -
> BATCH_SIZE)
> static void test_ring(unsigned ring)
> {
> struct drm_i915_gem_execbuffer2 execbuf;
> struct drm_i915_gem_exec_object2 obj[2];
> struct shadow shadow;
> - uint64_t i, count;
> + uint64_t i, count, required, total;
> int fd, gen;
> + bool sufficient_memory;
>
> can_test_ring(ring);
>
> @@ -107,7 +114,15 @@ static void test_ring(unsigned ring)
> setup(fd, gen, &shadow);
>
> count = gem_aperture_size(fd) / BATCH_SIZE;
> - intel_require_memory(count, BATCH_SIZE, CHECK_RAM);
> + if (igt_run_in_simulation()) {
> + sufficient_memory = __intel_check_memory(count,
> BATCH_SIZE,
> + CHECK_RAM,
> &required,
> + &total);
> + if (!sufficient_memory)
> + count = total /
> + (BATCH_SIZE + KERNEL_BO_OVERHEAD_SIMICS);
> + }
> + _intel_require_memory(count, BATCH_SIZE, CHECK_RAM);
> /* Fill the entire gart with batches and run them. */
> memset(obj, 0, sizeof(obj));
> obj[1].handle = shadow.handle;
> @@ -141,8 +156,6 @@ igt_main
> {
> const struct intel_execution_engine *e;
>
> - igt_skip_on_simulation();
> -
> for (e = intel_execution_engines; e->name; e++)
> igt_subtest_f("%s", e->name)
> test_ring(e->exec_id | e->flags);
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prev parent reply other threads:[~2019-04-17 15:31 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-04-16 19:25 [igt-dev] [PATCH v2 1/1] lib/gem_cs_prefetch: enable on Simics Simulator Caz Yokoyama
2019-04-16 20:17 ` [igt-dev] ✓ Fi.CI.BAT: success for series starting with [v2,1/1] " Patchwork
2019-04-17 5:16 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork
2019-04-17 15:32 ` Caz Yokoyama [this message]
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