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* [PATCH i-g-t] lib/rendercopy: Alter pipeline and add shader for Xe3p
@ 2026-02-23 16:35 Zbigniew Kempczyński
  2026-02-23 21:28 ` Jan Maslak
                   ` (3 more replies)
  0 siblings, 4 replies; 7+ messages in thread
From: Zbigniew Kempczyński @ 2026-02-23 16:35 UTC (permalink / raw)
  To: igt-dev; +Cc: Zbigniew Kempczyński, Jan Maślak

Extend rendercopy to support Xe3p platforms like NVL-P. This requires
reassembling xe2 shader and increasing urb size.

Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Jan Maślak <jan.maslak@intel.com>
---
 lib/i915/shaders/ps/xe3p_render_copy.asm |  8 +++++++
 lib/intel_batchbuffer.c                  |  2 ++
 lib/rendercopy.h                         |  4 ++++
 lib/rendercopy_gen9.c                    | 28 +++++++++++++++++++++---
 4 files changed, 39 insertions(+), 3 deletions(-)
 create mode 100644 lib/i915/shaders/ps/xe3p_render_copy.asm

diff --git a/lib/i915/shaders/ps/xe3p_render_copy.asm b/lib/i915/shaders/ps/xe3p_render_copy.asm
new file mode 100644
index 0000000000..fea5c5c01e
--- /dev/null
+++ b/lib/i915/shaders/ps/xe3p_render_copy.asm
@@ -0,0 +1,8 @@
+L0:
+(W)     mad (16|M0)              acc0.0<1>:f   r6.0<0;0>:f       r1.0<1;0>:f       r6.6<0>:f
+(W)     mad (16|M0)              r113.0<1>:f   acc0.0<1;0>:f     r1.0<1;0>:f       r6.1<0>:f
+(W)     mad (16|M0)              acc0.0<1>:f   r6.3<0;0>:f       r1.0<1;0>:f       r6.4<0>:f
+(W)     mad (16|M0)              r114.0<1>:f   acc0.0<1;0>:f     r2.0<1;0>:f       r6.5<0>:f
+(W)     send.smpl (16|M0)        r12      r113  null:0  0x0            0x04420001           {F@1,$0} // wr:2+0, rd:4; simd16 sample:u,v,r,ai,mlod using sampler index 0
+(W)     send.rc (16|M0)          null     r12  null:0  0x0            0x08031400           {EOT,$0} // wr:4+0, rd:0; render write  last render target select to bti[0].rti[0]
+L96:
diff --git a/lib/intel_batchbuffer.c b/lib/intel_batchbuffer.c
index 3b25a385b7..b095065746 100644
--- a/lib/intel_batchbuffer.c
+++ b/lib/intel_batchbuffer.c
@@ -669,6 +669,8 @@ igt_render_copyfunc_t igt_get_render_copyfunc(int fd)
 		copy = mtl_render_copyfunc;
 	else if (IS_DG2(devid))
 		copy = gen12p71_render_copyfunc;
+	else if (intel_gen(devid) >= 35)
+		copy = xe3p_render_copyfunc;
 	else if (intel_gen(devid) >= 20)
 		copy = xe2_render_copyfunc;
 	else if (IS_GEN12(devid))
diff --git a/lib/rendercopy.h b/lib/rendercopy.h
index 3733e8a09f..570797c490 100644
--- a/lib/rendercopy.h
+++ b/lib/rendercopy.h
@@ -47,6 +47,10 @@ void xe2_render_copyfunc(struct intel_bb *ibb,
 			 struct intel_buf *src, uint32_t src_x, uint32_t src_y,
 			 uint32_t width, uint32_t height,
 			 struct intel_buf *dst, uint32_t dst_x, uint32_t dst_y);
+void xe3p_render_copyfunc(struct intel_bb *ibb,
+			  struct intel_buf *src, uint32_t src_x, uint32_t src_y,
+			  uint32_t width, uint32_t height,
+			  struct intel_buf *dst, uint32_t dst_x, uint32_t dst_y);
 void gen12_render_copyfunc(struct intel_bb *ibb,
 			   struct intel_buf *src, uint32_t src_x, uint32_t src_y,
 			   uint32_t width, uint32_t height,
diff --git a/lib/rendercopy_gen9.c b/lib/rendercopy_gen9.c
index e6e5b82148..d44988010a 100644
--- a/lib/rendercopy_gen9.c
+++ b/lib/rendercopy_gen9.c
@@ -146,6 +146,15 @@ static const uint32_t xe2_render_copy[][4] = {
 	{ 0x8010c031, 0x00000004, 0x58000c24, 0x00c40000 },
 };
 
+static const uint32_t xe3p_render_copy[][4] = {
+	{ 0x8010005b, 0x200002a0, 0x02020604, 0x06640104 },
+	{ 0x8010005b, 0x710402a8, 0x02022000, 0x06140104 },
+	{ 0x8010005b, 0x200002a0, 0x02020634, 0x06440104 },
+	{ 0x8010005b, 0x720402a8, 0x02022000, 0x06540204 },
+	{ 0x80122031, 0x0c240000, 0x20027114, 0x00800000 },
+	{ 0x8010c031, 0x00000004, 0x58000c24, 0x00c40000 },
+};
+
 static uint32_t lnl_compression_format(const struct intel_buf *buf)
 {
 	switch (buf->bpp) {
@@ -737,7 +746,7 @@ gen9_emit_state_base_address(struct intel_bb *ibb) {
 static void
 gen7_emit_urb(struct intel_bb *ibb) {
 	/* XXX: Min valid values from mesa */
-	const int vs_entries = 64;
+	const int vs_entries = intel_gen(ibb->devid) >= 35 ? 128 : 64;
 	const int vs_size = 2;
 	const int vs_start = 4;
 
@@ -1395,13 +1404,26 @@ void xe2_render_copyfunc(struct intel_bb *ibb,
 			 struct intel_buf *src, uint32_t src_x, uint32_t src_y,
 			 uint32_t width, uint32_t height,
 			 struct intel_buf *dst, uint32_t dst_x, uint32_t dst_y)
+{
+	_gen9_render_op(ibb, src, src_x, src_y,
+			width, height, dst, dst_x, dst_y,
+			NULL,
+			NULL,
+			xe2_render_copy,
+			sizeof(xe2_render_copy));
+}
+
+void xe3p_render_copyfunc(struct intel_bb *ibb,
+			  struct intel_buf *src, uint32_t src_x, uint32_t src_y,
+			  uint32_t width, uint32_t height,
+			  struct intel_buf *dst, uint32_t dst_x, uint32_t dst_y)
 {
 	_gen9_render_op(ibb, src, src_x, src_y,
 			  width, height, dst, dst_x, dst_y,
 			  NULL,
 			  NULL,
-			  xe2_render_copy,
-			  sizeof(xe2_render_copy));
+			  xe3p_render_copy,
+			  sizeof(xe3p_render_copy));
 }
 
 void mtl_render_copyfunc(struct intel_bb *ibb,
-- 
2.43.0


^ permalink raw reply related	[flat|nested] 7+ messages in thread
end of thread, other threads:[~2026-02-24 14:44 UTC | newest]

Thread overview: 7+ messages (download: mbox.gz follow: Atom feed
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2026-02-23 16:35 [PATCH i-g-t] lib/rendercopy: Alter pipeline and add shader for Xe3p Zbigniew Kempczyński
2026-02-23 21:28 ` Jan Maslak
2026-02-23 22:19 ` ✗ i915.CI.BAT: failure for " Patchwork
2026-02-24  7:37   ` Zbigniew Kempczyński
2026-02-23 22:34 ` ✓ Xe.CI.BAT: success " Patchwork
2026-02-24 13:35 ` ✗ Xe.CI.FULL: failure " Patchwork
2026-02-24 14:44   ` Zbigniew Kempczyński

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