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From: Riana Tauro <riana.tauro@intel.com>
To: Karthik Poosa <karthik.poosa@intel.com>, <igt-dev@lists.freedesktop.org>
Cc: <anshuman.gupta@intel.com>, <badal.nilawar@intel.com>,
	<vinay.belgaumkar@intel.com>
Subject: Re: [PATCH i-g-t v3 1/2] tests/intel/xe_gt_freq: Rename ACT_FREQ_LATENCY_US to SLPC_FREQ_LATENCY_US
Date: Tue, 20 Aug 2024 10:13:13 +0530	[thread overview]
Message-ID: <e7e9c3a3-1c7f-4f8a-a208-ef9e09edd5c7@intel.com> (raw)
In-Reply-To: <20240819100146.3130945-2-karthik.poosa@intel.com>



On 8/19/2024 3:31 PM, Karthik Poosa wrote:
> Rename ACT_FREQ_LATENCY_US to SLPC_FREQ_LATENCY_US as this delay is
> not specific to actual frequency. 


We may need a wait after gt reset
also for min and max frequencies to get set where this can be used.
Rewrite this sentence
"This will be used in a later patch to wait after gt reset ..."

With the above corrected
Reviewed-by: Riana Tauro <riana.tauro@intel.com>
> 
> Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>
> ---
>   tests/intel/xe_gt_freq.c | 16 ++++++++--------
>   1 file changed, 8 insertions(+), 8 deletions(-)
> 
> diff --git a/tests/intel/xe_gt_freq.c b/tests/intel/xe_gt_freq.c
> index 171f9cb44..56cc10ade 100644
> --- a/tests/intel/xe_gt_freq.c
> +++ b/tests/intel/xe_gt_freq.c
> @@ -34,7 +34,7 @@
>    * Too many intermediate components and steps before freq is adjusted
>    * Specially if workload is under execution, so let's wait 100 ms.
>    */
> -#define ACT_FREQ_LATENCY_US 100000
> +#define SLPC_FREQ_LATENCY_US 100000
>   
>   static int set_freq(int fd, int gt_id, const char *freq_name, uint32_t freq)
>   {
> @@ -194,7 +194,7 @@ static void test_freq_fixed(int fd, int gt_id, bool gt_idle)
>   	 */
>   	igt_assert_lt(0, set_freq(fd, gt_id, "min", rpn));
>   	igt_assert_lt(0, set_freq(fd, gt_id, "max", rpn));
> -	usleep(ACT_FREQ_LATENCY_US);
> +	usleep(SLPC_FREQ_LATENCY_US);
>   	igt_assert_eq_u32(get_freq(fd, gt_id, "cur"), rpn);
>   
>   	if (gt_idle) {
> @@ -208,7 +208,7 @@ static void test_freq_fixed(int fd, int gt_id, bool gt_idle)
>   
>   	igt_assert_lt(0, set_freq(fd, gt_id, "min", rpmid));
>   	igt_assert_lt(0, set_freq(fd, gt_id, "max", rpmid));
> -	usleep(ACT_FREQ_LATENCY_US);
> +	usleep(SLPC_FREQ_LATENCY_US);
>   	cur_freq = get_freq(fd, gt_id, "cur");
>   	/* If rpmid is around RPe, we could see SLPC follow it */
>   	igt_assert_lte_u32((rpmid - FREQ_UNIT_MHZ), cur_freq);
> @@ -224,7 +224,7 @@ static void test_freq_fixed(int fd, int gt_id, bool gt_idle)
>   
>   	igt_assert_lt(0, set_freq(fd, gt_id, "min", rp0));
>   	igt_assert_lt(0, set_freq(fd, gt_id, "max", rp0));
> -	usleep(ACT_FREQ_LATENCY_US);
> +	usleep(SLPC_FREQ_LATENCY_US);
>   	/*
>   	 * It is unlikely that PCODE will *always* respect any request above RPe
>   	 * So for this level let's only check if GuC PC is doing its job
> @@ -259,7 +259,7 @@ static void test_freq_range(int fd, int gt_id, bool gt_idle)
>   
>   	igt_assert_lt(0, set_freq(fd, gt_id, "min", rpn));
>   	igt_assert_lt(0, set_freq(fd, gt_id, "max", rpmid));
> -	usleep(ACT_FREQ_LATENCY_US);
> +	usleep(SLPC_FREQ_LATENCY_US);
>   	cur = get_freq(fd, gt_id, "cur");
>   	igt_assert(rpn <= cur && cur <= rpmid + FREQ_UNIT_MHZ);
>   
> @@ -292,7 +292,7 @@ static void test_freq_low_max(int fd, int gt_id)
>   	 */
>   	igt_assert_lt(0, set_freq(fd, gt_id, "min", rpmid));
>   	igt_assert_lt(0, set_freq(fd, gt_id, "max", rpn));
> -	usleep(ACT_FREQ_LATENCY_US);
> +	usleep(SLPC_FREQ_LATENCY_US);
>   
>   	/* Cur freq will follow RPe, which could be higher than min freq */
>   	igt_assert_lte_u32((rpmid - FREQ_UNIT_MHZ),
> @@ -310,7 +310,7 @@ static void test_suspend(int fd, int gt_id)
>   
>   	igt_assert_lt(0, set_freq(fd, gt_id, "min", rpn));
>   	igt_assert_lt(0, set_freq(fd, gt_id, "max", rpn));
> -	usleep(ACT_FREQ_LATENCY_US);
> +	usleep(SLPC_FREQ_LATENCY_US);
>   	igt_assert_eq_u32(get_freq(fd, gt_id, "cur"), rpn);
>   
>   	igt_system_suspend_autoresume(SUSPEND_STATE_S3,
> @@ -337,7 +337,7 @@ static void test_reset(int fd, int gt_id, int cycles)
>   			     "Failed after %d good cycles\n", i);
>   		igt_assert_f(set_freq(fd, gt_id, "max", rpn) > 0,
>   			     "Failed after %d good cycles\n", i);
> -		usleep(ACT_FREQ_LATENCY_US);
> +		usleep(SLPC_FREQ_LATENCY_US);
>   		igt_assert_f(get_freq(fd, gt_id, "cur") == rpn,
>   			     "Failed after %d good cycles\n", i);
>   

  reply	other threads:[~2024-08-20  4:43 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-08-19 10:01 [PATCH i-g-t v3 0/2] tests/intel/xe_gt_freq: Add a wait after gt reset Karthik Poosa
2024-08-19 10:01 ` [PATCH i-g-t v3 1/2] tests/intel/xe_gt_freq: Rename ACT_FREQ_LATENCY_US to SLPC_FREQ_LATENCY_US Karthik Poosa
2024-08-20  4:43   ` Riana Tauro [this message]
2024-08-19 10:01 ` [PATCH i-g-t v3 2/2] tests/intel/xe_gt_freq: Add a wait after gt reset Karthik Poosa
2024-08-20  4:44   ` Riana Tauro
2024-08-19 10:53 ` ✓ CI.xeBAT: success for tests/intel/xe_gt_freq: Add a wait after gt reset (rev3) Patchwork
2024-08-19 11:04 ` ✓ Fi.CI.BAT: " Patchwork
2024-08-19 13:38 ` ✗ CI.xeFULL: failure " Patchwork
2024-08-20  6:48 ` ✗ Fi.CI.IGT: " Patchwork

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