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charset=UTF-8 Content-Transfer-Encoding: 7bit The change look good to me. Reviewed-by: Vitaly Prosyak vitaly.prosyak@amd.com On 2024-08-06 21:06, Liang, Prike wrote: > [AMD Official Use Only - AMD Internal Distribution Only] > > Ping for the patch. > > Thanks, > Prike > >> -----Original Message----- >> From: Liang, Prike >> Sent: Thursday, August 1, 2024 6:59 PM >> To: igt-dev@lists.freedesktop.org >> Cc: Prosyak, Vitaly ; Zhang, Jesse(Jie) >> ; Deucher, Alexander >> ; Liang, Prike >> Subject: [PATCH] tests/amdgpu: update bad length case >> >> In the bad length case, when the header length has more than 4dwords than >> packet stream length then CPFW will pending on the stream data and raise a >> CP halt error which requires do the pipe reset. As to the orignal case of >> header length is smaller than PM4 stream length then the PM4 stream data >> may will create a bad opcode error which only requires the queue reset. So >> for testing the pipe reset need to update the header length bigger than the >> PM4 stream data length. >> >> Signed-off-by: Prike Liang >> --- >> lib/amdgpu/amd_ip_blocks.c | 9 +++++++-- >> 1 file changed, 7 insertions(+), 2 deletions(-) >> >> diff --git a/lib/amdgpu/amd_ip_blocks.c b/lib/amdgpu/amd_ip_blocks.c index >> f675b97dd..3ffacc065 100644 >> --- a/lib/amdgpu/amd_ip_blocks.c >> +++ b/lib/amdgpu/amd_ip_blocks.c >> @@ -189,7 +189,7 @@ gfx_ring_bad_write_linear(const struct >> amdgpu_ip_funcs *func, >> const struct amdgpu_ring_context *ring_context, >> uint32_t *pm4_dw, unsigned int cmd_error) { >> - uint32_t i, j; >> + uint32_t i, j, stream_length; >> >> i = 0; >> j = 0; >> @@ -198,6 +198,11 @@ gfx_ring_bad_write_linear(const struct >> amdgpu_ip_funcs *func, >> * But the range applies to all asics. >> * 0xcb-0xcf, 0xd2-0xef, 0xf1-0xfb >> */ >> + if (cmd_error == CMD_STREAM_EXEC_INVALID_PACKET_LENGTH) >> + stream_length = ring_context->write_length / 16; >> + else >> + stream_length = ring_context->write_length; >> + >> if (cmd_error == CMD_STREAM_EXEC_INVALID_OPCODE) >> ring_context->pm4[i++] = PACKET3(0xf2, 2 + ring_context- >>> write_length); >> else if (cmd_error == >> CMD_STREAM_EXEC_INVALID_PACKET_LENGTH) >> @@ -223,7 +228,7 @@ gfx_ring_bad_write_linear(const struct >> amdgpu_ip_funcs *func, >> ring_context->pm4[i++] = upper_32_bits(ring_context- >>> bo_mc); >> } >> >> - while (j++ < ring_context->write_length) >> + while (j++ < stream_length) >> ring_context->pm4[i++] = func->deadbeaf; >> *pm4_dw = i; >> return i; >> -- >> 2.34.1 --------------0GMF1dAbnuiQ7PletGhtEoy4 Content-Type: text/html; charset=UTF-8 Content-Transfer-Encoding: 7bit

The change look good to me.

Reviewed-by: Vitaly Prosyak vitaly.prosyak@amd.com

On 2024-08-06 21:06, Liang, Prike wrote:
[AMD Official Use Only - AMD Internal Distribution Only]

Ping for the patch.

Thanks,
Prike


-----Original Message-----
From: Liang, Prike <Prike.Liang@amd.com>
Sent: Thursday, August 1, 2024 6:59 PM
To: igt-dev@lists.freedesktop.org
Cc: Prosyak, Vitaly <Vitaly.Prosyak@amd.com>; Zhang, Jesse(Jie)
<Jesse.Zhang@amd.com>; Deucher, Alexander
<Alexander.Deucher@amd.com>; Liang, Prike <Prike.Liang@amd.com>
Subject: [PATCH] tests/amdgpu: update bad length case

In the bad length case, when the header length has more than 4dwords than
packet stream length then CPFW will pending on the stream data and raise a
CP halt error which requires do the pipe reset. As to the orignal case of
header length is smaller than PM4 stream length then the PM4 stream data
may will create a bad opcode error which only requires the queue reset. So
for testing the pipe reset need to update the header length bigger than the
PM4 stream data length.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
---
 lib/amdgpu/amd_ip_blocks.c | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/lib/amdgpu/amd_ip_blocks.c b/lib/amdgpu/amd_ip_blocks.c index
f675b97dd..3ffacc065 100644
--- a/lib/amdgpu/amd_ip_blocks.c
+++ b/lib/amdgpu/amd_ip_blocks.c
@@ -189,7 +189,7 @@ gfx_ring_bad_write_linear(const struct
amdgpu_ip_funcs *func,
                    const struct amdgpu_ring_context *ring_context,
                    uint32_t *pm4_dw, unsigned int cmd_error)  {
-     uint32_t i, j;
+     uint32_t i, j, stream_length;

      i = 0;
      j = 0;
@@ -198,6 +198,11 @@ gfx_ring_bad_write_linear(const struct
amdgpu_ip_funcs *func,
        * But the range applies to all asics.
        * 0xcb-0xcf, 0xd2-0xef, 0xf1-0xfb
        */
+     if (cmd_error == CMD_STREAM_EXEC_INVALID_PACKET_LENGTH)
+             stream_length = ring_context->write_length / 16;
+     else
+             stream_length = ring_context->write_length;
+
      if (cmd_error == CMD_STREAM_EXEC_INVALID_OPCODE)
              ring_context->pm4[i++] = PACKET3(0xf2, 2 +  ring_context-

write_length);

      else if (cmd_error ==
CMD_STREAM_EXEC_INVALID_PACKET_LENGTH)
@@ -223,7 +228,7 @@ gfx_ring_bad_write_linear(const struct
amdgpu_ip_funcs *func,
              ring_context->pm4[i++] = upper_32_bits(ring_context-

bo_mc);

      }

-     while (j++ < ring_context->write_length)
+     while (j++ < stream_length)
              ring_context->pm4[i++] = func->deadbeaf;
      *pm4_dw = i;
      return i;
--
2.34.1


    

  


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