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Hosted X-MS-Exchange-CrossTenant-Id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: OXtmoUBZ/bFNLxDaK2qqgqQAA9n/NxzYl96wfuvmNWFcpKs2yuSgcAR6/r5HCSHzwrea7BZpoSylxq4NzYZliQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA1PR11MB8328 X-OriginatorOrg: intel.com X-BeenThere: igt-dev@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Development mailing list for IGT GPU Tools List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "igt-dev" X-Spam-Status: No, score=-17.3 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 Hi Ravi, On 14-10-2026 00:36, Ravi Kishore Koppuravuri wrote: > Sync Xe drm uapi up to commit b2207d4c4e84, this will bring following > changes: > > b2207d4c4e84 ("drm/ras: Introduce error threshold") > 6fdbfc75eaa1 ("drm/drm_ras: Add drm_ras netlink error event") > ee18d39a0877 ("drm/drm_ras: Add clear-error-counter netlink command to > drm_ras") > c36218dc49f5 ("drm/ras: Introduce the DRM RAS infrastructure over > generic netlink") > > Cc: Soham Purkait > Cc: Riana Tauro > Cc: Anshuman Gupta > Cc: Raag Jadav > Cc: Badal Nilawar > Cc: Mallesh Koujalagi > Cc: Harish Chegondi > Cc: Kamil Konieczny > Cc: Jani Nikula > Signed-off-by: Ravi Kishore Koppuravuri > --- > include/drm-uapi/drm_ras.h | 67 ++++++++++++++++++++++++++++++++++++++ > 1 file changed, 67 insertions(+) > create mode 100644 include/drm-uapi/drm_ras.h > > diff --git a/include/drm-uapi/drm_ras.h b/include/drm-uapi/drm_ras.h > new file mode 100644 > index 000000000..6b504faeb > --- /dev/null > +++ b/include/drm-uapi/drm_ras.h > @@ -0,0 +1,67 @@ > +/* SPDX-License-Identifier: MIT */ > +/* > + * Copyright © 2026 Intel Corporation > + */ > + > +#ifndef _UAPI_LINUX_DRM_RAS_H > +#define _UAPI_LINUX_DRM_RAS_H > + > +#define DRM_RAS_FAMILY_NAME "drm-ras" > +#define DRM_RAS_FAMILY_VERSION 1 > + > +/* > + * Type of the node. Currently, only error-counter nodes are supported, which > + * expose reliability counters for a hardware/software component. > + */ > +enum drm_ras_node_type { > + DRM_RAS_NODE_TYPE_ERROR_COUNTER = 1, > +}; > + > +enum { > + DRM_RAS_A_NODE_ATTRS_NODE_ID = 1, > + DRM_RAS_A_NODE_ATTRS_DEVICE_NAME, > + DRM_RAS_A_NODE_ATTRS_NODE_NAME, > + DRM_RAS_A_NODE_ATTRS_NODE_TYPE, > + > + __DRM_RAS_A_NODE_ATTRS_MAX, > + DRM_RAS_A_NODE_ATTRS_MAX = (__DRM_RAS_A_NODE_ATTRS_MAX - 1) > +}; > + > +enum { > + DRM_RAS_A_ERROR_COUNTER_ATTRS_NODE_ID = 1, > + DRM_RAS_A_ERROR_COUNTER_ATTRS_ERROR_ID, > + DRM_RAS_A_ERROR_COUNTER_ATTRS_ERROR_NAME, > + DRM_RAS_A_ERROR_COUNTER_ATTRS_ERROR_VALUE, > + DRM_RAS_A_ERROR_COUNTER_ATTRS_ERROR_THRESHOLD, > + > + __DRM_RAS_A_ERROR_COUNTER_ATTRS_MAX, > + DRM_RAS_A_ERROR_COUNTER_ATTRS_MAX = (__DRM_RAS_A_ERROR_COUNTER_ATTRS_MAX - 1) > +}; > + > +enum { > + DRM_RAS_A_ERROR_EVENT_ATTRS_DEVICE_NAME = 1, > + DRM_RAS_A_ERROR_EVENT_ATTRS_NODE_ID, > + DRM_RAS_A_ERROR_EVENT_ATTRS_NODE_NAME, > + DRM_RAS_A_ERROR_EVENT_ATTRS_ERROR_ID, > + DRM_RAS_A_ERROR_EVENT_ATTRS_ERROR_NAME, > + DRM_RAS_A_ERROR_EVENT_ATTRS_ERROR_VALUE, > + > + __DRM_RAS_A_ERROR_EVENT_ATTRS_MAX, > + DRM_RAS_A_ERROR_EVENT_ATTRS_MAX = (__DRM_RAS_A_ERROR_EVENT_ATTRS_MAX - 1) > +}; > + > +enum { > + DRM_RAS_CMD_LIST_NODES = 1, > + DRM_RAS_CMD_GET_ERROR_COUNTER, > + DRM_RAS_CMD_CLEAR_ERROR_COUNTER, > + DRM_RAS_CMD_ERROR_EVENT, > + DRM_RAS_CMD_GET_ERROR_THRESHOLD, > + DRM_RAS_CMD_SET_ERROR_THRESHOLD, > + > + __DRM_RAS_CMD_MAX, > + DRM_RAS_CMD_MAX = (__DRM_RAS_CMD_MAX - 1) > +}; > + > +#define DRM_RAS_MCGRP_ERROR_REPORT "error-report" > + > +#endif /* _UAPI_LINUX_DRM_RAS_H */ LGTM Reviewed-by: Soham Purkait Regards, Soham