Re: [igt-dev] [PATCH i-g-t] lib: sync i915_pciids.h with kernel

Souza, Jose
2018-10-12T23:16:47Z

On Fri, 2018-10-12 at 15:40 -0700, Rodrigo Vivi wrote:
> One more AML ID added and WHL IDs reorganized.
>
> Align with commit c0c46ca461f1 ("drm/i915/aml: Add new Amber
> Lake PCI ID"), including commit c1c8f6fa731b ("drm/i915:
> Redefine some Whiskey Lake SKUs")
>
> v2: Also sync intel_device_info.c (CI and Jose)
>

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>

> Cc: José Roberto de Souza <jose.souza@intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
> lib/i915_pciids.h | 21 +++++++++++++--------
> lib/intel_device_info.c | 3 ++-
> 2 files changed, 15 insertions(+), 9 deletions(-)
>
> diff --git a/lib/i915_pciids.h b/lib/i915_pciids.h
> index fd965ffb..19266714 100644
> --- a/lib/i915_pciids.h
> +++ b/lib/i915_pciids.h
> @@ -365,16 +365,20 @@
> INTEL_VGA_DEVICE(0x593B, info) /* Halo GT4 */
>
> /* AML/KBL Y GT2 */
> -#define INTEL_AML_GT2_IDS(info) \
> +#define INTEL_AML_KBL_GT2_IDS(info) \
> INTEL_VGA_DEVICE(0x591C, info), /* ULX GT2 */ \
> INTEL_VGA_DEVICE(0x87C0, info) /* ULX GT2 */
>
> +/* AML/CFL Y GT2 */
> +#define INTEL_AML_CFL_GT2_IDS(info) \
> + INTEL_VGA_DEVICE(0x87CA, info)
> +
> #define INTEL_KBL_IDS(info) \
> INTEL_KBL_GT1_IDS(info), \
> INTEL_KBL_GT2_IDS(info), \
> INTEL_KBL_GT3_IDS(info), \
> INTEL_KBL_GT4_IDS(info), \
> - INTEL_AML_GT2_IDS(info)
> + INTEL_AML_KBL_GT2_IDS(info)
>
> /* CFL S */
> #define INTEL_CFL_S_GT1_IDS(info) \
> @@ -407,17 +411,17 @@
>
> /* WHL/CFL U GT1 */
> #define INTEL_WHL_U_GT1_IDS(info) \
> - INTEL_VGA_DEVICE(0x3EA1, info)
> + INTEL_VGA_DEVICE(0x3EA1, info), \
> + INTEL_VGA_DEVICE(0x3EA4, info)
>
> /* WHL/CFL U GT2 */
> #define INTEL_WHL_U_GT2_IDS(info) \
> - INTEL_VGA_DEVICE(0x3EA0, info)
> + INTEL_VGA_DEVICE(0x3EA0, info), \
> + INTEL_VGA_DEVICE(0x3EA3, info)
>
> /* WHL/CFL U GT3 */
> #define INTEL_WHL_U_GT3_IDS(info) \
> - INTEL_VGA_DEVICE(0x3EA2, info), \
> - INTEL_VGA_DEVICE(0x3EA3, info), \
> - INTEL_VGA_DEVICE(0x3EA4, info)
> + INTEL_VGA_DEVICE(0x3EA2, info)
>
> #define INTEL_CFL_IDS(info) \
> INTEL_CFL_S_GT1_IDS(info), \
> @@ -427,7 +431,8 @@
> INTEL_CFL_U_GT3_IDS(info), \
> INTEL_WHL_U_GT1_IDS(info), \
> INTEL_WHL_U_GT2_IDS(info), \
> - INTEL_WHL_U_GT3_IDS(info)
> + INTEL_WHL_U_GT3_IDS(info), \
> + INTEL_AML_CFL_GT2_IDS(info)
>
> /* CNL */
> #define INTEL_CNL_IDS(info) \
> diff --git a/lib/intel_device_info.c b/lib/intel_device_info.c
> index 5233be21..076168bf 100644
> --- a/lib/intel_device_info.c
> +++ b/lib/intel_device_info.c
> @@ -345,7 +345,7 @@ static const struct pci_id_match
> intel_device_match[] = {
> INTEL_KBL_GT2_IDS(&intel_kabylake_gt2_info),
> INTEL_KBL_GT3_IDS(&intel_kabylake_gt3_info),
> INTEL_KBL_GT4_IDS(&intel_kabylake_gt4_info),
> - INTEL_AML_GT2_IDS(&intel_kabylake_gt2_info),
> + INTEL_AML_KBL_GT2_IDS(&intel_kabylake_gt2_info),
>
> INTEL_GLK_IDS(&intel_geminilake_info),
>
> @@ -357,6 +357,7 @@ static const struct pci_id_match
> intel_device_match[] = {
> INTEL_WHL_U_GT1_IDS(&intel_coffeelake_gt1_info),
> INTEL_WHL_U_GT2_IDS(&intel_coffeelake_gt2_info),
> INTEL_WHL_U_GT3_IDS(&intel_coffeelake_gt3_info),
> + INTEL_AML_CFL_GT2_IDS(&intel_coffeelake_gt2_info),
>
> INTEL_CNL_IDS(&intel_cannonlake_info),