[PATCH v3 2/4] usb: chipidea: s32g: Add usb support for s32g2

[PATCH v3 2/4] usb: chipidea: s32g: Add usb support for s32g2

[Dan Carpenter]

From: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>

Enable USB driver for s32g2.  This chip has an errata ERR050474[1]
so we need to set S32G_UCMALLBE to avoid some memory corruption.  I
have include the description below:

ERR050474: USB : USB data may be corrupted if transaction size is
non-multiple of 32bits

Description
When USB issues narrow length transfers i.e. AHB transaction size is less
than 4bytes, data for that transaction will get corrupted. Narrow length
transactions can occur if the transaction size is non-multiple of four
bytes, error scenarios terminate the transactions early or if the address
offset programmed in QTD is 4 Byte unaligned.  This happens because the
SoC NOC is not able to handle the byte strobes generated by USB controller
and is dependent on its internally generates byte strobes.

Workaround
Narrow transfers work properly on bypassing USB controller’s byte
generation logic. This can be done by setting UCMALLBE (bit 15, USB Core
Master All Byte Enable) bit of UOTGNC_CR.

Link: https://www.nxp.com/webapp/Download?colCode=S32G2_1P77B
Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>
Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
---
v3: Add the errata to the commit message

 drivers/usb/chipidea/ci_hdrc_imx.c |  6 +++
 drivers/usb/chipidea/usbmisc_imx.c | 73 ++++++++++++++++++++++++++++++
 2 files changed, 79 insertions(+)

diff --git a/drivers/usb/chipidea/ci_hdrc_imx.c b/drivers/usb/chipidea/ci_hdrc_imx.c
index 780f4d151345..e8c847eab8e3 100644
--- a/drivers/usb/chipidea/ci_hdrc_imx.c
+++ b/drivers/usb/chipidea/ci_hdrc_imx.c
@@ -1,6 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright 2012 Freescale Semiconductor, Inc.
+ * Copyright 2025 NXP
  * Copyright (C) 2012 Marek Vasut <marex@denx.de>
  * on behalf of DENX Software Engineering GmbH
  */
@@ -78,6 +79,10 @@ static const struct ci_hdrc_imx_platform_flag imx8ulp_usb_data = {
 		CI_HDRC_HAS_PORTSC_PEC_MISSED,
 };
 
+static const struct ci_hdrc_imx_platform_flag s32g_usb_data = {
+	.flags = CI_HDRC_DISABLE_HOST_STREAMING,
+};
+
 static const struct of_device_id ci_hdrc_imx_dt_ids[] = {
 	{ .compatible = "fsl,imx23-usb", .data = &imx23_usb_data},
 	{ .compatible = "fsl,imx28-usb", .data = &imx28_usb_data},
@@ -89,6 +94,7 @@ static const struct of_device_id ci_hdrc_imx_dt_ids[] = {
 	{ .compatible = "fsl,imx7d-usb", .data = &imx7d_usb_data},
 	{ .compatible = "fsl,imx7ulp-usb", .data = &imx7ulp_usb_data},
 	{ .compatible = "fsl,imx8ulp-usb", .data = &imx8ulp_usb_data},
+	{ .compatible = "nxp,s32g2-usb", .data = &s32g_usb_data},
 	{ /* sentinel */ }
 };
 MODULE_DEVICE_TABLE(of, ci_hdrc_imx_dt_ids);
diff --git a/drivers/usb/chipidea/usbmisc_imx.c b/drivers/usb/chipidea/usbmisc_imx.c
index 118b9a68496b..27a3127db4f6 100644
--- a/drivers/usb/chipidea/usbmisc_imx.c
+++ b/drivers/usb/chipidea/usbmisc_imx.c
@@ -1,6 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright 2012 Freescale Semiconductor, Inc.
+ * Copyright 2025 NXP
  */
 
 #include <linux/module.h>
@@ -155,6 +156,18 @@
 					 BLKCTL_OTG_VBUS_WAKEUP_EN | \
 					 BLKCTL_OTG_DPDM_WAKEUP_EN)
 
+#define S32G_WAKEUP_IE		BIT(0)
+#define S32G_CORE_IE		BIT(1)
+#define S32G_PWRFLTEN		BIT(7)
+#define S32G_WAKEUPCTRL		BIT(10)
+#define S32G_WAKEUPEN		BIT(11)
+
+/* Workaround errata ERR050474 (handle packages that aren't 4 byte aligned) */
+#define S32G_UCMALLBE		BIT(15)
+
+#define S32G_WAKEUP_BITS (S32G_WAKEUP_IE | S32G_CORE_IE | S32G_WAKEUPEN | \
+			  S32G_WAKEUPCTRL)
+
 struct usbmisc_ops {
 	/* It's called once when probe a usb device */
 	int (*init)(struct imx_usbmisc_data *data);
@@ -614,6 +627,52 @@ static int usbmisc_vf610_init(struct imx_usbmisc_data *data)
 	return 0;
 }
 
+static int usbmisc_s32g_set_wakeup(struct imx_usbmisc_data *data, bool enabled)
+{
+	struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
+	unsigned long flags;
+	u32 reg;
+
+	spin_lock_irqsave(&usbmisc->lock, flags);
+
+	reg = readl(usbmisc->base);
+	if (enabled)
+		reg |= S32G_WAKEUP_BITS;
+	else
+		reg &= ~S32G_WAKEUP_BITS;
+
+	writel(reg, usbmisc->base);
+	spin_unlock_irqrestore(&usbmisc->lock, flags);
+
+	return 0;
+}
+
+static int usbmisc_s32g_init(struct imx_usbmisc_data *data, u32 extra_flags)
+{
+	struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
+	unsigned long flags;
+	u32 reg;
+
+	spin_lock_irqsave(&usbmisc->lock, flags);
+
+	reg = readl(usbmisc->base);
+
+	reg |= S32G_PWRFLTEN;
+	reg |= extra_flags;
+
+	writel(reg, usbmisc->base);
+
+	spin_unlock_irqrestore(&usbmisc->lock, flags);
+	usbmisc_s32g_set_wakeup(data, false);
+
+	return 0;
+}
+
+static int usbmisc_s32g2_init(struct imx_usbmisc_data *data)
+{
+	return usbmisc_s32g_init(data, S32G_UCMALLBE);
+}
+
 static int usbmisc_imx7d_set_wakeup
 	(struct imx_usbmisc_data *data, bool enabled)
 {
@@ -1032,6 +1091,10 @@ static int usbmisc_imx6sx_power_lost_check(struct imx_usbmisc_data *data)
 	else
 		return 0;
 }
+static int usbmisc_s32g_power_lost_check(struct imx_usbmisc_data *data)
+{
+	return 1;
+}
 
 static u32 usbmisc_blkctl_wakeup_setting(struct imx_usbmisc_data *data)
 {
@@ -1131,6 +1194,12 @@ static const struct usbmisc_ops imx95_usbmisc_ops = {
 	.vbus_comparator_on = usbmisc_imx7d_vbus_comparator_on,
 };
 
+static const struct usbmisc_ops s32g2_usbmisc_ops = {
+	.init = usbmisc_s32g2_init,
+	.set_wakeup = usbmisc_s32g_set_wakeup,
+	.power_lost_check = usbmisc_s32g_power_lost_check,
+};
+
 static inline bool is_imx53_usbmisc(struct imx_usbmisc_data *data)
 {
 	struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
@@ -1356,6 +1425,10 @@ static const struct of_device_id usbmisc_imx_dt_ids[] = {
 		.compatible = "fsl,imx95-usbmisc",
 		.data = &imx95_usbmisc_ops,
 	},
+	{
+		.compatible = "nxp,s32g2-usbmisc",
+		.data = &s32g2_usbmisc_ops,
+	},
 	{ /* sentinel */ }
 };
 MODULE_DEVICE_TABLE(of, usbmisc_imx_dt_ids);
-- 
2.47.2

[PATCH v3 3/4] usb: chipidea: s32g: Add usb support for s32g3

[Dan Carpenter]

From: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>

Enable USB driver for the s32g3 USB device.

Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>
Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
---
v3: No change

 drivers/usb/chipidea/usbmisc_imx.c | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/drivers/usb/chipidea/usbmisc_imx.c b/drivers/usb/chipidea/usbmisc_imx.c
index 27a3127db4f6..9a1c97ea5463 100644
--- a/drivers/usb/chipidea/usbmisc_imx.c
+++ b/drivers/usb/chipidea/usbmisc_imx.c
@@ -673,6 +673,11 @@ static int usbmisc_s32g2_init(struct imx_usbmisc_data *data)
 	return usbmisc_s32g_init(data, S32G_UCMALLBE);
 }
 
+static int usbmisc_s32g3_init(struct imx_usbmisc_data *data)
+{
+	return usbmisc_s32g_init(data, 0);
+}
+
 static int usbmisc_imx7d_set_wakeup
 	(struct imx_usbmisc_data *data, bool enabled)
 {
@@ -1200,6 +1205,12 @@ static const struct usbmisc_ops s32g2_usbmisc_ops = {
 	.power_lost_check = usbmisc_s32g_power_lost_check,
 };
 
+static const struct usbmisc_ops s32g3_usbmisc_ops = {
+	.init = usbmisc_s32g3_init,
+	.set_wakeup = usbmisc_s32g_set_wakeup,
+	.power_lost_check = usbmisc_s32g_power_lost_check,
+};
+
 static inline bool is_imx53_usbmisc(struct imx_usbmisc_data *data)
 {
 	struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
@@ -1429,6 +1440,10 @@ static const struct of_device_id usbmisc_imx_dt_ids[] = {
 		.compatible = "nxp,s32g2-usbmisc",
 		.data = &s32g2_usbmisc_ops,
 	},
+	{
+		.compatible = "nxp,s32g3-usbmisc",
+		.data = &s32g3_usbmisc_ops,
+	},
 	{ /* sentinel */ }
 };
 MODULE_DEVICE_TABLE(of, usbmisc_imx_dt_ids);
-- 
2.47.2

[PATCH v3 4/4] arm64: dts: s32g: Add USB device tree information for s32g2/s32g3

[Dan Carpenter]

This adds the USB support for the s32g2 and s32g3 SoCs.

Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
---
v3: New patch

 arch/arm64/boot/dts/freescale/s32g2.dtsi | 23 +++++++++++++++++++++++
 arch/arm64/boot/dts/freescale/s32g3.dtsi | 23 +++++++++++++++++++++++
 2 files changed, 46 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/s32g2.dtsi b/arch/arm64/boot/dts/freescale/s32g2.dtsi
index ea1456d361a3..4be6534ed01d 100644
--- a/arch/arm64/boot/dts/freescale/s32g2.dtsi
+++ b/arch/arm64/boot/dts/freescale/s32g2.dtsi
@@ -376,6 +376,29 @@ uart1: serial@401cc000 {
 			status = "disabled";
 		};
 
+		usbmisc: usbmisc@44064200 {
+			#index-cells = <1>;
+			compatible = "nxp,s32g2-usbmisc";
+			reg = <0x44064200 0x200>;
+		};
+
+		usbotg: usb@44064000 {
+			compatible = "nxp,s32g2-usb";
+			reg = <0x44064000 0x200>;
+			interrupt-parent = <&gic>;
+			interrupts = <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, /* OTG Core */
+					 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>; /* OTG Wakeup */
+			clocks = <&clks 94>, <&clks 95>;
+			fsl,usbmisc = <&usbmisc 0>;
+			ahb-burst-config = <0x3>;
+			tx-burst-size-dword = <0x10>;
+			rx-burst-size-dword = <0x10>;
+			phy_type = "ulpi";
+			dr_mode = "host";
+			maximum-speed = "high-speed";
+			status = "disabled";
+		};
+
 		i2c0: i2c@401e4000 {
 			compatible = "nxp,s32g2-i2c";
 			reg = <0x401e4000 0x1000>;
diff --git a/arch/arm64/boot/dts/freescale/s32g3.dtsi b/arch/arm64/boot/dts/freescale/s32g3.dtsi
index 991dbfbfa203..191d2dab4254 100644
--- a/arch/arm64/boot/dts/freescale/s32g3.dtsi
+++ b/arch/arm64/boot/dts/freescale/s32g3.dtsi
@@ -435,6 +435,29 @@ uart1: serial@401cc000 {
 			status = "disabled";
 		};
 
+		usbmisc: usbmisc@44064200 {
+			#index-cells = <1>;
+			compatible = "nxp,s32g3-usbmisc";
+			reg = <0x44064200 0x200>;
+		};
+
+                usbotg: usb@44064000 {
+                        compatible = "nxp,s32g3-usb", "nxp,s32g2-usb";
+                        reg = <0x44064000 0x200>;
+                        interrupt-parent = <&gic>;
+                        interrupts = <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, /* OTG Core */
+                                     <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>; /* OTG Wakeup */
+                        clocks = <&clks 94>, <&clks 95>;
+                        fsl,usbmisc = <&usbmisc 0>;
+                        ahb-burst-config = <0x3>;
+                        tx-burst-size-dword = <0x10>;
+                        rx-burst-size-dword = <0x10>;
+                        phy_type = "ulpi";
+                        dr_mode = "host";
+                        maximum-speed = "high-speed";
+                        status = "disabled";
+                };
+
 		i2c0: i2c@401e4000 {
 			compatible = "nxp,s32g3-i2c",
 				     "nxp,s32g2-i2c";
-- 
2.47.2

Re: [PATCH v3 2/4] usb: chipidea: s32g: Add usb support for s32g2

[Xu Yang]

Hi Dan Carpenter,

On Thu, Jul 03, 2025 at 08:20:33PM -0500, Dan Carpenter wrote:
> From: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>
> 
> Enable USB driver for s32g2.  This chip has an errata ERR050474[1]
> so we need to set S32G_UCMALLBE to avoid some memory corruption.  I
> have include the description below:
> 
> ERR050474: USB : USB data may be corrupted if transaction size is
> non-multiple of 32bits
> 
> Description
> When USB issues narrow length transfers i.e. AHB transaction size is less
> than 4bytes, data for that transaction will get corrupted. Narrow length
> transactions can occur if the transaction size is non-multiple of four
> bytes, error scenarios terminate the transactions early or if the address
> offset programmed in QTD is 4 Byte unaligned.  This happens because the
> SoC NOC is not able to handle the byte strobes generated by USB controller
> and is dependent on its internally generates byte strobes.
> 
> Workaround
> Narrow transfers work properly on bypassing USB controller’s byte
> generation logic. This can be done by setting UCMALLBE (bit 15, USB Core
> Master All Byte Enable) bit of UOTGNC_CR.

./scripts/checkpatch.pl --strict report following issue:

CHECK: Please use a blank line after function/struct/union/enum declarations
#157: FILE: drivers/usb/chipidea/usbmisc_imx.c:1116:
 }
+static int usbmisc_s32g_power_lost_check(struct imx_usbmisc_data *data)

total: 0 errors, 0 warnings, 1 checks, 133 lines checked

> 
> Link: https://www.nxp.com/webapp/Download?colCode=S32G2_1P77B
> Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>
> Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
> ---
> v3: Add the errata to the commit message
> 
>  drivers/usb/chipidea/ci_hdrc_imx.c |  6 +++
>  drivers/usb/chipidea/usbmisc_imx.c | 73 ++++++++++++++++++++++++++++++
>  2 files changed, 79 insertions(+)
> 
> diff --git a/drivers/usb/chipidea/ci_hdrc_imx.c b/drivers/usb/chipidea/ci_hdrc_imx.c
> index 780f4d151345..e8c847eab8e3 100644
> --- a/drivers/usb/chipidea/ci_hdrc_imx.c
> +++ b/drivers/usb/chipidea/ci_hdrc_imx.c
> @@ -1,6 +1,7 @@
>  // SPDX-License-Identifier: GPL-2.0+
>  /*
>   * Copyright 2012 Freescale Semiconductor, Inc.
> + * Copyright 2025 NXP
>   * Copyright (C) 2012 Marek Vasut <marex@denx.de>
>   * on behalf of DENX Software Engineering GmbH
>   */
> @@ -78,6 +79,10 @@ static const struct ci_hdrc_imx_platform_flag imx8ulp_usb_data = {
>  		CI_HDRC_HAS_PORTSC_PEC_MISSED,
>  };
>  
> +static const struct ci_hdrc_imx_platform_flag s32g_usb_data = {
> +	.flags = CI_HDRC_DISABLE_HOST_STREAMING,
> +};
> +
>  static const struct of_device_id ci_hdrc_imx_dt_ids[] = {
>  	{ .compatible = "fsl,imx23-usb", .data = &imx23_usb_data},
>  	{ .compatible = "fsl,imx28-usb", .data = &imx28_usb_data},
> @@ -89,6 +94,7 @@ static const struct of_device_id ci_hdrc_imx_dt_ids[] = {
>  	{ .compatible = "fsl,imx7d-usb", .data = &imx7d_usb_data},
>  	{ .compatible = "fsl,imx7ulp-usb", .data = &imx7ulp_usb_data},
>  	{ .compatible = "fsl,imx8ulp-usb", .data = &imx8ulp_usb_data},
> +	{ .compatible = "nxp,s32g2-usb", .data = &s32g_usb_data},
>  	{ /* sentinel */ }
>  };
>  MODULE_DEVICE_TABLE(of, ci_hdrc_imx_dt_ids);
> diff --git a/drivers/usb/chipidea/usbmisc_imx.c b/drivers/usb/chipidea/usbmisc_imx.c
> index 118b9a68496b..27a3127db4f6 100644
> --- a/drivers/usb/chipidea/usbmisc_imx.c
> +++ b/drivers/usb/chipidea/usbmisc_imx.c
> @@ -1,6 +1,7 @@
>  // SPDX-License-Identifier: GPL-2.0+
>  /*
>   * Copyright 2012 Freescale Semiconductor, Inc.
> + * Copyright 2025 NXP
>   */
>  
>  #include <linux/module.h>
> @@ -155,6 +156,18 @@
>  					 BLKCTL_OTG_VBUS_WAKEUP_EN | \
>  					 BLKCTL_OTG_DPDM_WAKEUP_EN)
>  
> +#define S32G_WAKEUP_IE		BIT(0)
> +#define S32G_CORE_IE		BIT(1)
> +#define S32G_PWRFLTEN		BIT(7)
> +#define S32G_WAKEUPCTRL		BIT(10)
> +#define S32G_WAKEUPEN		BIT(11)
> +
> +/* Workaround errata ERR050474 (handle packages that aren't 4 byte aligned) */
> +#define S32G_UCMALLBE		BIT(15)
> +
> +#define S32G_WAKEUP_BITS (S32G_WAKEUP_IE | S32G_CORE_IE | S32G_WAKEUPEN | \
> +			  S32G_WAKEUPCTRL)
> +
>  struct usbmisc_ops {
>  	/* It's called once when probe a usb device */
>  	int (*init)(struct imx_usbmisc_data *data);
> @@ -614,6 +627,52 @@ static int usbmisc_vf610_init(struct imx_usbmisc_data *data)
>  	return 0;
>  }
>  
> +static int usbmisc_s32g_set_wakeup(struct imx_usbmisc_data *data, bool enabled)
> +{
> +	struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
> +	unsigned long flags;
> +	u32 reg;
> +
> +	spin_lock_irqsave(&usbmisc->lock, flags);
> +
> +	reg = readl(usbmisc->base);
> +	if (enabled)
> +		reg |= S32G_WAKEUP_BITS;
> +	else
> +		reg &= ~S32G_WAKEUP_BITS;
> +
> +	writel(reg, usbmisc->base);
> +	spin_unlock_irqrestore(&usbmisc->lock, flags);
> +
> +	return 0;
> +}
> +
> +static int usbmisc_s32g_init(struct imx_usbmisc_data *data, u32 extra_flags)
> +{
> +	struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
> +	unsigned long flags;
> +	u32 reg;
> +
> +	spin_lock_irqsave(&usbmisc->lock, flags);
> +
> +	reg = readl(usbmisc->base);
> +
> +	reg |= S32G_PWRFLTEN;
> +	reg |= extra_flags;
> +
> +	writel(reg, usbmisc->base);
> +
> +	spin_unlock_irqrestore(&usbmisc->lock, flags);
> +	usbmisc_s32g_set_wakeup(data, false);
> +
> +	return 0;
> +}
> +
> +static int usbmisc_s32g2_init(struct imx_usbmisc_data *data)
> +{
> +	return usbmisc_s32g_init(data, S32G_UCMALLBE);
> +}
> +
>  static int usbmisc_imx7d_set_wakeup
>  	(struct imx_usbmisc_data *data, bool enabled)
>  {
> @@ -1032,6 +1091,10 @@ static int usbmisc_imx6sx_power_lost_check(struct imx_usbmisc_data *data)
>  	else
>  		return 0;
>  }
> +static int usbmisc_s32g_power_lost_check(struct imx_usbmisc_data *data)
> +{
> +	return 1;
> +}
>  
>  static u32 usbmisc_blkctl_wakeup_setting(struct imx_usbmisc_data *data)
>  {
> @@ -1131,6 +1194,12 @@ static const struct usbmisc_ops imx95_usbmisc_ops = {
>  	.vbus_comparator_on = usbmisc_imx7d_vbus_comparator_on,
>  };
>  
> +static const struct usbmisc_ops s32g2_usbmisc_ops = {
> +	.init = usbmisc_s32g2_init,
> +	.set_wakeup = usbmisc_s32g_set_wakeup,
> +	.power_lost_check = usbmisc_s32g_power_lost_check,
> +};
> +
>  static inline bool is_imx53_usbmisc(struct imx_usbmisc_data *data)
>  {
>  	struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
> @@ -1356,6 +1425,10 @@ static const struct of_device_id usbmisc_imx_dt_ids[] = {
>  		.compatible = "fsl,imx95-usbmisc",
>  		.data = &imx95_usbmisc_ops,
>  	},
> +	{
> +		.compatible = "nxp,s32g2-usbmisc",
> +		.data = &s32g2_usbmisc_ops,
> +	},
>  	{ /* sentinel */ }
>  };
>  MODULE_DEVICE_TABLE(of, usbmisc_imx_dt_ids);
> -- 
> 2.47.2
> 

Re: [PATCH v3 4/4] arm64: dts: s32g: Add USB device tree information for s32g2/s32g3

[Xu Yang]

Hi Dan Carpenter,

On Thu, Jul 03, 2025 at 08:20:44PM -0500, Dan Carpenter wrote:
> This adds the USB support for the s32g2 and s32g3 SoCs.

./scripts/checkpatch.pl --strict report many errors and warnings:

ERROR: code indent should use tabs where possible
#63: FILE: arch/arm64/boot/dts/freescale/s32g3.dtsi:444:
+                usbotg: usb@44064000 {$

ERROR: code indent should use tabs where possible
#64: FILE: arch/arm64/boot/dts/freescale/s32g3.dtsi:445:
+                        compatible = "nxp,s32g3-usb", "nxp,s32g2-usb";$

WARNING: please, no spaces at the start of a line
#64: FILE: arch/arm64/boot/dts/freescale/s32g3.dtsi:445:
+                        compatible = "nxp,s32g3-usb", "nxp,s32g2-usb";$

...

Refer to:
https://www.kernel.org/doc/html/latest/devicetree/bindings/dts-coding-style.html#indentation-and-wrapping

> 
> Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
> ---
> v3: New patch
> 
>  arch/arm64/boot/dts/freescale/s32g2.dtsi | 23 +++++++++++++++++++++++
>  arch/arm64/boot/dts/freescale/s32g3.dtsi | 23 +++++++++++++++++++++++
>  2 files changed, 46 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/freescale/s32g2.dtsi b/arch/arm64/boot/dts/freescale/s32g2.dtsi
> index ea1456d361a3..4be6534ed01d 100644
> --- a/arch/arm64/boot/dts/freescale/s32g2.dtsi
> +++ b/arch/arm64/boot/dts/freescale/s32g2.dtsi
> @@ -376,6 +376,29 @@ uart1: serial@401cc000 {
>  			status = "disabled";
>  		};
>  
> +		usbmisc: usbmisc@44064200 {
> +			#index-cells = <1>;
> +			compatible = "nxp,s32g2-usbmisc";

The "compatible" property should be the first one. And the property order
in other nodes need to be optimized. Refer to:
https://www.kernel.org/doc/html/latest/devicetree/bindings/dts-coding-style.html#order-of-properties-in-device-node

> +			reg = <0x44064200 0x200>;
> +		};
> +
> +		usbotg: usb@44064000 {
> +			compatible = "nxp,s32g2-usb";
> +			reg = <0x44064000 0x200>;
> +			interrupt-parent = <&gic>;
> +			interrupts = <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, /* OTG Core */
> +					 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>; /* OTG Wakeup */
> +			clocks = <&clks 94>, <&clks 95>;
> +			fsl,usbmisc = <&usbmisc 0>;
> +			ahb-burst-config = <0x3>;
> +			tx-burst-size-dword = <0x10>;
> +			rx-burst-size-dword = <0x10>;
> +			phy_type = "ulpi";
> +			dr_mode = "host";
> +			maximum-speed = "high-speed";
> +			status = "disabled";
> +		};
> +
>  		i2c0: i2c@401e4000 {
>  			compatible = "nxp,s32g2-i2c";
>  			reg = <0x401e4000 0x1000>;
> diff --git a/arch/arm64/boot/dts/freescale/s32g3.dtsi b/arch/arm64/boot/dts/freescale/s32g3.dtsi
> index 991dbfbfa203..191d2dab4254 100644
> --- a/arch/arm64/boot/dts/freescale/s32g3.dtsi
> +++ b/arch/arm64/boot/dts/freescale/s32g3.dtsi
> @@ -435,6 +435,29 @@ uart1: serial@401cc000 {
>  			status = "disabled";
>  		};
>  
> +		usbmisc: usbmisc@44064200 {
> +			#index-cells = <1>;
> +			compatible = "nxp,s32g3-usbmisc";
> +			reg = <0x44064200 0x200>;
> +		};
> +
> +                usbotg: usb@44064000 {
> +                        compatible = "nxp,s32g3-usb", "nxp,s32g2-usb";
> +                        reg = <0x44064000 0x200>;
> +                        interrupt-parent = <&gic>;
> +                        interrupts = <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, /* OTG Core */
> +                                     <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>; /* OTG Wakeup */
> +                        clocks = <&clks 94>, <&clks 95>;
> +                        fsl,usbmisc = <&usbmisc 0>;
> +                        ahb-burst-config = <0x3>;
> +                        tx-burst-size-dword = <0x10>;
> +                        rx-burst-size-dword = <0x10>;
> +                        phy_type = "ulpi";
> +                        dr_mode = "host";
> +                        maximum-speed = "high-speed";
> +                        status = "disabled";
> +                };
> +
>  		i2c0: i2c@401e4000 {
>  			compatible = "nxp,s32g3-i2c",
>  				     "nxp,s32g2-i2c";
> -- 
> 2.47.2
>