From: Krzysztof Kozlowski <krzk@kernel.org>
To: Pankaj Gupta <pankaj.gupta@nxp.com>,
Jonathan Corbet <corbet@lwn.net>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Shawn Guo <shawnguo@kernel.org>,
Sascha Hauer <s.hauer@pengutronix.de>,
Pengutronix Kernel Team <kernel@pengutronix.de>,
Fabio Estevam <festevam@gmail.com>
Cc: linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, imx@lists.linux.dev,
linux-arm-kernel@lists.infradead.org, Frank Li <Frank.Li@nxp.com>
Subject: Re: [PATCH v20 3/7] firmware: imx: add driver for NXP EdgeLock Enclave
Date: Wed, 3 Dec 2025 08:20:50 +0100 [thread overview]
Message-ID: <1ee383c7-ccbc-4c90-adf3-bfbe87fb6765@kernel.org> (raw)
In-Reply-To: <20251203-imx-se-if-v20-3-a04a25c4255f@nxp.com>
On 03/12/2025 07:48, Pankaj Gupta wrote:
> Add driver for enabling MU based communication interface to secure-enclave.
>
> NXP hardware IP(s) for secure-enclaves like Edgelock Enclave(ELE), are
> embedded in the SoC to support the features like HSM, SHE & V2X, using
> message based communication interface.
>
> The secure enclave FW communicates with Linux over single or multiple
> dedicated messaging unit(MU) based interface(s).
> Exists on i.MX SoC(s) like i.MX8ULP, i.MX93, i.MX95 etc.
>
> For i.MX9x SoC(s) there is at least one dedicated ELE MU(s) for each
> world - Linux(one or more) and OPTEE-OS (one or more).
>
> Other dependent kernel drivers will be:
> - NVMEM: that supports non-volatile devices like EFUSES,
> managed by NXP's secure-enclave.
>
> Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
> Reviewed-by: Frank Li <Frank.Li@nxp.com>
> ---
> drivers/firmware/imx/Kconfig | 13 ++
> drivers/firmware/imx/Makefile | 2 +
> drivers/firmware/imx/ele_base_msg.c | 269 ++++++++++++++++++++++++
> drivers/firmware/imx/ele_base_msg.h | 95 +++++++++
> drivers/firmware/imx/ele_common.c | 333 ++++++++++++++++++++++++++++++
> drivers/firmware/imx/ele_common.h | 45 ++++
> drivers/firmware/imx/se_ctrl.c | 401 ++++++++++++++++++++++++++++++++++++
> drivers/firmware/imx/se_ctrl.h | 86 ++++++++
> include/linux/firmware/imx/se_api.h | 14 ++
> 9 files changed, 1258 insertions(+)
>
> diff --git a/drivers/firmware/imx/Kconfig b/drivers/firmware/imx/Kconfig
> index 127ad752acf8..5fe96299b704 100644
> --- a/drivers/firmware/imx/Kconfig
> +++ b/drivers/firmware/imx/Kconfig
> @@ -55,3 +55,16 @@ config IMX_SCMI_MISC_DRV
> core that could provide misc functions such as board control.
>
> This driver can also be built as a module.
> +
> +config IMX_SEC_ENCLAVE
> + tristate "i.MX Embedded Secure Enclave - EdgeLock Enclave Firmware driver."
> + depends on IMX_MBOX && ARCH_MXC && ARM64
> + select FW_LOADER
> + default m if ARCH_MXC
> +
> + help
> + Exposes APIs supported by the iMX Secure Enclave HW IP called:
> + - EdgeLock Enclave Firmware (for i.MX8ULP, i.MX93),
> + like base, HSM, V2X & SHE using the SAB protocol via the shared Messaging
> + Unit. This driver exposes these interfaces via a set of file descriptors
> + allowing to configure shared memory, send and receive messages.
> diff --git a/drivers/firmware/imx/Makefile b/drivers/firmware/imx/Makefile
> index 3bbaffa6e347..4412b15846b1 100644
> --- a/drivers/firmware/imx/Makefile
> +++ b/drivers/firmware/imx/Makefile
> @@ -4,3 +4,5 @@ obj-$(CONFIG_IMX_SCU) += imx-scu.o misc.o imx-scu-irq.o rm.o imx-scu-soc.o
> obj-${CONFIG_IMX_SCMI_CPU_DRV} += sm-cpu.o
> obj-${CONFIG_IMX_SCMI_MISC_DRV} += sm-misc.o
> obj-${CONFIG_IMX_SCMI_LMM_DRV} += sm-lmm.o
> +sec_enclave-objs = se_ctrl.o ele_common.o ele_base_msg.o
> +obj-${CONFIG_IMX_SEC_ENCLAVE} += sec_enclave.o
> diff --git a/drivers/firmware/imx/ele_base_msg.c b/drivers/firmware/imx/ele_base_msg.c
> new file mode 100644
> index 000000000000..a070acbd895c
> --- /dev/null
> +++ b/drivers/firmware/imx/ele_base_msg.c
> @@ -0,0 +1,269 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright 2025 NXP
> + */
> +
> +#include <linux/types.h>
> +
> +#include <linux/completion.h>
> +#include <linux/dma-mapping.h>
> +#include <linux/genalloc.h>
> +
> +#include "ele_base_msg.h"
> +#include "ele_common.h"
> +
> +#define FW_DBG_DUMP_FIXED_STR "ELE"
> +
> +int ele_get_info(struct se_if_priv *priv, struct ele_dev_info *s_info)
> +{
> + struct se_api_msg *tx_msg __free(kfree) = NULL;
> + struct se_api_msg *rx_msg __free(kfree) = NULL;
No, don't use this syntax. This is explicitly discouraged.
NAK
Best regards,
Krzysztof
next prev parent reply other threads:[~2025-12-03 7:20 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-03 6:48 [PATCH v20 0/7] firmware: imx: driver for NXP secure-enclave Pankaj Gupta
2025-12-03 6:48 ` [PATCH v20 1/7] Documentation/firmware: add imx/se to other_interfaces Pankaj Gupta
2025-12-03 6:48 ` [PATCH v20 2/7] dt-bindings: arm: fsl: add imx-se-fw binding doc Pankaj Gupta
2025-12-03 6:48 ` [PATCH v20 3/7] firmware: imx: add driver for NXP EdgeLock Enclave Pankaj Gupta
2025-12-03 7:20 ` Krzysztof Kozlowski [this message]
2025-12-03 16:59 ` Frank Li
2025-12-03 17:42 ` Krzysztof Kozlowski
2025-12-12 9:07 ` [EXT] " Pankaj Gupta
2025-12-03 18:02 ` Randy Dunlap
2025-12-12 9:05 ` [EXT] " Pankaj Gupta
2025-12-09 8:08 ` Dan Carpenter
2025-12-12 9:04 ` [EXT] " Pankaj Gupta
2025-12-03 6:48 ` [PATCH v20 4/7] firmware: imx: device context dedicated to priv Pankaj Gupta
2025-12-03 6:48 ` [PATCH v20 5/7] firmware: drivers: imx: adds miscdev Pankaj Gupta
2025-12-04 4:28 ` kernel test robot
2025-12-03 6:48 ` [PATCH v20 6/7] arm64: dts: imx8ulp: add secure enclave node Pankaj Gupta
2025-12-03 6:48 ` [PATCH v20 7/7] arm64: dts: imx8ulp-evk: add reserved memory property Pankaj Gupta
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