From: Frank Li <Frank.Li@nxp.com>
To: imx@lists.linux.dev, Thomas Gleixner <tglx@linutronix.de>,
Marc Zyngier <maz@kernel.org>, Shawn Guo <shawnguo@kernel.org>,
Sascha Hauer <s.hauer@pengutronix.de>,
Pengutronix Kernel Team <kernel@pengutronix.de>,
Fabio Estevam <festevam@gmail.com>,
NXP Linux Team <linux-imx@nxp.com>,
linux-kernel@vger.kernel.org (open list:IRQCHIP DRIVERS),
linux-arm-kernel@lists.infradead.org (moderated
list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE)
Subject: [PATCH 1/1] irqchip: irq-imx-mu-msi: fixed wrong register offset for 8ulp
Date: Tue, 4 Oct 2022 15:24:14 -0500 [thread overview]
Message-ID: <20221004202414.216577-1-Frank.Li@nxp.com> (raw)
Offset 0x124 should be IMX_MU_TSR, not IMX_MU_GSR
Signed-off-by: Frank Li <Frank.Li@nxp.com>
---
drivers/irqchip/irq-imx-mu-msi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/irqchip/irq-imx-mu-msi.c b/drivers/irqchip/irq-imx-mu-msi.c
index b62139dc36e82..229039eda1b1f 100644
--- a/drivers/irqchip/irq-imx-mu-msi.c
+++ b/drivers/irqchip/irq-imx-mu-msi.c
@@ -292,7 +292,7 @@ static const struct imx_mu_dcfg imx_mu_cfg_imx8ulp = {
.xSR = {
[IMX_MU_SR] = 0xC,
[IMX_MU_GSR] = 0x118,
- [IMX_MU_GSR] = 0x124,
+ [IMX_MU_TSR] = 0x124,
[IMX_MU_RSR] = 0x12C,
},
.xCR = {
--
2.35.1
next reply other threads:[~2022-10-04 20:24 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-04 20:24 Frank Li [this message]
2022-10-04 21:27 ` [PATCH 1/1] irqchip: irq-imx-mu-msi: fixed wrong register offset for 8ulp Fabio Estevam
2022-10-04 22:41 ` Marc Zyngier
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