From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 866F67E; Mon, 25 Sep 2023 00:30:00 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 6E447C433C7; Mon, 25 Sep 2023 00:29:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1695601800; bh=bChhotaAUBhB0O2eKgHOOJkaqSlCFPcPt2ZxA4qg+tE=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=j+JdsvcNckN40SXxAULRNaA0AJCYPRQ0AVHRbVZ+umjjAQdB3tGJQ6vRuZHE7CE4m jcFKyIqTJus7dQy+VNZnKDqbpcUt57jgeV9Gfre4BvXON5P3hK1A4C8VQBD5he5wyC OsmPMT7Rj3pD0u5m7ctHUVI9FfakaetKvM0p2p+I8irlJE+kvSOhY6xcU9LQ6sVQD7 IcosE7cLhF3umJXR6W34px/5ek1AFod6Md2xyMpR1+ARP5/rLB6fZfquvGp/VZfeDQ 3k0g/RkQzhdtkgQr7K1qtYEqWQ0wCIbiSQ1D0zdJrYbCFyq1qAXaSGXTQ/ArV8+doK a37kmxwv0v1Fw== Date: Mon, 25 Sep 2023 08:29:46 +0800 From: Shawn Guo To: Frank Li Cc: joy.zou@nxp.com, shenwei.wang@nxp.com, sherry.sun@nxp.com, clin@suse.com, conor+dt@kernel.org, devicetree@vger.kernel.org, eagle.zhou@nxp.com, festevam@gmail.com, imx@lists.linux.dev, kernel@pengutronix.de, krzysztof.kozlowski+dt@linaro.org, leoyang.li@nxp.com, linux-arm-kernel@lists.infradead.org, linux-imx@nxp.com, linux-kernel@vger.kernel.org, pierre.gondois@arm.com, robh+dt@kernel.org, s.hauer@pengutronix.de Subject: Re: [PATCH 2/5] arm64: dts: imx8: add edma[0..3] Message-ID: <20230925002946.GU7231@dragon> References: <20230822155333.2261262-1-Frank.Li@nxp.com> <20230822155333.2261262-3-Frank.Li@nxp.com> Precedence: bulk X-Mailing-List: imx@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20230822155333.2261262-3-Frank.Li@nxp.com> On Tue, Aug 22, 2023 at 11:53:30AM -0400, Frank Li wrote: > edma is missed, add them > > Signed-off-by: Frank Li > --- > .../boot/dts/freescale/imx8-ss-audio.dtsi | 88 +++++++++++++++++++ > .../arm64/boot/dts/freescale/imx8-ss-dma.dtsi | 62 +++++++++++++ > .../boot/dts/freescale/imx8dxl-ss-adma.dtsi | 30 +++++++ > 3 files changed, 180 insertions(+) > > diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-audio.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-audio.dtsi > index 6c8d75ef9250..8870acf8f743 100644 > --- a/arch/arm64/boot/dts/freescale/imx8-ss-audio.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8-ss-audio.dtsi > @@ -20,6 +20,63 @@ audio_ipg_clk: clock-audio-ipg { > clock-output-names = "audio_ipg_clk"; > }; > > + edma0: dma-controller@591F0000 { Lowercase for hex value. > + compatible = "fsl,imx8qm-edma"; > + reg = <0x591f0000 0x190000>; One space after = > + #dma-cells = <3>; > + shared-interrupt; > + dma-channels = <24>; > + dma-channel-mask = <0x5c0c00>; > + interrupts = , /* 0 asrc 0 */ > + , /* 1 */ > + , /* 2 */ > + , /* 3 */ > + , /* 4 */ > + , /* 5 */ > + , /* 6 esai0 */ > + , /* 7 */ > + , /* 8 spdif0 */ > + , /* 9 */ > + , /* 10 unused */ > + , /* 11 unused */ > + , /* 12 sai0 */ > + , /* 13 */ > + , /* 14 sai1 */ > + , /* 15 */ > + , /* 16 sai2 */ > + , /* 17 sai3 */ > + , /* 18 unused */ > + , /* 19 unused */ > + , /* 20 unused */ > + , /* 21 */ > + , /* 22 unused */ > + ; /* 23 unused */ > + power-domains = <&pd IMX_SC_R_DMA_0_CH0>, > + <&pd IMX_SC_R_DMA_0_CH1>, > + <&pd IMX_SC_R_DMA_0_CH2>, > + <&pd IMX_SC_R_DMA_0_CH3>, > + <&pd IMX_SC_R_DMA_0_CH4>, > + <&pd IMX_SC_R_DMA_0_CH5>, > + <&pd IMX_SC_R_DMA_0_CH6>, > + <&pd IMX_SC_R_DMA_0_CH7>, > + <&pd IMX_SC_R_DMA_0_CH8>, > + <&pd IMX_SC_R_DMA_0_CH9>, > + <&pd IMX_SC_R_DMA_0_CH10>, > + <&pd IMX_SC_R_DMA_0_CH11>, > + <&pd IMX_SC_R_DMA_0_CH12>, > + <&pd IMX_SC_R_DMA_0_CH13>, > + <&pd IMX_SC_R_DMA_0_CH14>, > + <&pd IMX_SC_R_DMA_0_CH15>, > + <&pd IMX_SC_R_DMA_0_CH16>, > + <&pd IMX_SC_R_DMA_0_CH17>, > + <&pd IMX_SC_R_DMA_0_CH18>, > + <&pd IMX_SC_R_DMA_0_CH19>, > + <&pd IMX_SC_R_DMA_0_CH20>, > + <&pd IMX_SC_R_DMA_0_CH21>, > + <&pd IMX_SC_R_DMA_0_CH22>, > + <&pd IMX_SC_R_DMA_0_CH23>; > + }; > + > dsp_lpcg: clock-controller@59580000 { > compatible = "fsl,imx8qxp-lpcg"; > reg = <0x59580000 0x10000>; > @@ -65,4 +122,35 @@ dsp: dsp@596e8000 { > memory-region = <&dsp_reserved>; > status = "disabled"; > }; > + > + edma1: dma-controller@599f0000 { > + compatible = "fsl,imx8qm-edma"; > + reg = <0x599f0000 0xc0000>; Ditto Shawn > + #dma-cells = <3>; > + shared-interrupt; > + dma-channels = <11>; > + dma-channel-mask = <0xc0>; > + interrupts = , /* 0 asrc 1 */ > + , /* 1 */ > + , /* 2 */ > + , /* 3 */ > + , /* 4 */ > + , /* 5 */ > + , /* 6 unused */ > + , /* 7 unused */ > + , /* sai4 */ > + , > + ; /* sai5 */ > + power-domains = <&pd IMX_SC_R_DMA_1_CH0>, > + <&pd IMX_SC_R_DMA_1_CH1>, > + <&pd IMX_SC_R_DMA_1_CH2>, > + <&pd IMX_SC_R_DMA_1_CH3>, > + <&pd IMX_SC_R_DMA_1_CH4>, > + <&pd IMX_SC_R_DMA_1_CH5>, > + <&pd IMX_SC_R_DMA_1_CH6>, > + <&pd IMX_SC_R_DMA_1_CH7>, > + <&pd IMX_SC_R_DMA_1_CH8>, > + <&pd IMX_SC_R_DMA_1_CH9>, > + <&pd IMX_SC_R_DMA_1_CH10>; > + }; > }; > diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi > index adb98a72bdfd..76e4aaaf307f 100644 > --- a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi > @@ -132,6 +132,68 @@ lpuart3: serial@5a090000 { > status = "disabled"; > }; > > + edma2: dma-controller@5a1f0000 { > + compatible = "fsl,imx8qm-edma"; > + reg = <0x5a1f0000 0x170000>; > + #dma-cells = <3>; > + dma-channels = <16>; > + interrupts = , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + ; > + power-domains = <&pd IMX_SC_R_DMA_2_CH0>, > + <&pd IMX_SC_R_DMA_2_CH1>, > + <&pd IMX_SC_R_DMA_2_CH2>, > + <&pd IMX_SC_R_DMA_2_CH3>, > + <&pd IMX_SC_R_DMA_2_CH4>, > + <&pd IMX_SC_R_DMA_2_CH5>, > + <&pd IMX_SC_R_DMA_2_CH6>, > + <&pd IMX_SC_R_DMA_2_CH7>, > + <&pd IMX_SC_R_DMA_2_CH8>, > + <&pd IMX_SC_R_DMA_2_CH9>, > + <&pd IMX_SC_R_DMA_2_CH10>, > + <&pd IMX_SC_R_DMA_2_CH11>, > + <&pd IMX_SC_R_DMA_2_CH12>, > + <&pd IMX_SC_R_DMA_2_CH13>, > + <&pd IMX_SC_R_DMA_2_CH14>, > + <&pd IMX_SC_R_DMA_2_CH15>; > + }; > + > + edma3: dma-controller@5a9f0000 { > + compatible = "fsl,imx8qm-edma"; > + reg = <0x5a9f0000 0x90000>; > + #dma-cells = <3>; > + dma-channels = <8>; > + interrupts = , > + , > + , > + , > + , > + , > + , > + ; > + power-domains = <&pd IMX_SC_R_DMA_3_CH0>, > + <&pd IMX_SC_R_DMA_3_CH1>, > + <&pd IMX_SC_R_DMA_3_CH2>, > + <&pd IMX_SC_R_DMA_3_CH3>, > + <&pd IMX_SC_R_DMA_3_CH4>, > + <&pd IMX_SC_R_DMA_3_CH5>, > + <&pd IMX_SC_R_DMA_3_CH6>, > + <&pd IMX_SC_R_DMA_3_CH7>; > + }; > + > spi0_lpcg: clock-controller@5a400000 { > compatible = "fsl,imx8qxp-lpcg"; > reg = <0x5a400000 0x10000>; > diff --git a/arch/arm64/boot/dts/freescale/imx8dxl-ss-adma.dtsi b/arch/arm64/boot/dts/freescale/imx8dxl-ss-adma.dtsi > index 6881330ab4c6..7e98c5e5624b 100644 > --- a/arch/arm64/boot/dts/freescale/imx8dxl-ss-adma.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8dxl-ss-adma.dtsi > @@ -15,6 +15,36 @@ &adc0 { > interrupts = ; > }; > > +&edma2 { > + interrupts = , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + ; > +}; > + > +&edma3 { > + interrupts = , > + , > + , > + , > + , > + , > + , > + ; > +}; > + > &i2c0 { > compatible = "fsl,imx8dxl-lpi2c", "fsl,imx8qxp-lpi2c", "fsl,imx7ulp-lpi2c"; > interrupts = ; > -- > 2.34.1 >