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[209.17.68.221]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-1ef0b9d3b0fsm159107075ad.22.2024.05.17.10.06.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 May 2024 10:06:53 -0700 (PDT) Date: Sat, 18 May 2024 02:06:50 +0900 From: Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= To: Frank Li Cc: cassel@kernel.org, bhelgaas@google.com, gustavo.pimentel@synopsys.com, helgaas@kernel.org, imx@lists.linux.dev, jdmason@kudzu.us, jingoohan1@gmail.com, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, lpieralisi@kernel.org, mani@kernel.org, robh@kernel.org Subject: Re: [PATCH v4 1/1] PCI: dwc: Fix index 0 incorrectly being interpreted as a free ATU slot Message-ID: <20240517170650.GC1947919@rocinante> References: <20240412160841.925927-1-Frank.Li@nxp.com> Precedence: bulk X-Mailing-List: imx@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20240412160841.925927-1-Frank.Li@nxp.com> Hello, > When PERST# assert and deassert happens on the PERST# supported platforms, > the both iATU0 and iATU6 will map inbound window to BAR0. DMA will access > to the area that was previously allocated (iATU0) for BAR0, instead of the > new area (iATU6) for BAR0. > > Right now, we dodge the bullet because both iATU0 and iATU6 should > currently translate inbound accesses to BAR0 to the same allocated memory > area. However, having two separate inbound mappings for the same BAR is a > disaster waiting to happen. > > The mapping between PCI BAR and iATU inbound window are maintained in the > dw_pcie_ep::bar_to_atu[] array. While allocating a new inbound iATU map for > a BAR, dw_pcie_ep_inbound_atu() API will first check for the availability > of the existing mapping in the array and if it is not found (i.e., value in > the array indexed by the BAR is found to be 0), then it will allocate a new > map value using find_first_zero_bit(). > > The issue here is, the existing logic failed to consider the fact that the > map value '0' is a valid value for BAR0. Because, find_first_zero_bit() > will return '0' as the map value for BAR0 (note that it returns the first > zero bit position). > > Due to this, when PERST# assert + deassert happens on the PERST# supported > platforms, the inbound window allocation restarts from BAR0 and the > existing logic to find the BAR mapping will return '6' for BAR0 instead of > '0' due to the fact that it considers '0' as an invalid map value. > > So fix this issue by always incrementing the map value before assigning to > bar_to_atu[] array and then decrementing it while fetching. This will make > sure that the map value '0' always represents the invalid mapping." Applied to controller/dwc, thank you! [1/1] PCI: dwc: Fix index 0 incorrectly being interpreted as a free ATU slot https://git.kernel.org/pci/pci/c/cd3c2f0fff46 Krzysztof