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charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: On Thu, Nov 14, 2024 at 11:49:44AM -0500, Frank Li wrote: > On Tue, Oct 29, 2024 at 12:36:33PM -0400, Frank Li wrote: > > Mani: > Do you have chance to check dwc part? > Frank, Sorry for the delay. I plan to look into this (and other series) tomorrow. - Mani > Frank > > > == RC side: > > > > ┌─────────┐ ┌────────────┐ > > ┌─────┐ │ │ IA: 0x8ff8_0000 │ │ > > │ CPU ├───►│ ┌────►├─────────────────┐ │ PCI │ > > └─────┘ │ │ │ IA: 0x8ff0_0000 │ │ │ > > CPU Addr │ │ ┌─►├─────────────┐ │ │ Controller │ > > 0x7ff8_0000─┼───┘ │ │ │ │ │ │ > > │ │ │ │ │ │ │ PCI Addr > > 0x7ff0_0000─┼──────┘ │ │ └──► IOSpace ─┼────────────► > > │ │ │ │ │ 0 > > 0x7000_0000─┼────────►├─────────┐ │ │ │ > > └─────────┘ │ └──────► CfgSpace ─┼────────────► > > BUS Fabric │ │ │ 0 > > │ │ │ > > └──────────► MemSpace ─┼────────────► > > IA: 0x8000_0000 │ │ 0x8000_0000 > > └────────────┘ > > > > Current dwc implimemnt, pci_fixup_addr() call back is needed when bus > > fabric convert cpu address before send to PCIe controller. > > > > bus@5f000000 { > > compatible = "simple-bus"; > > #address-cells = <1>; > > #size-cells = <1>; > > ranges = <0x80000000 0x0 0x70000000 0x10000000>; > > > > pcie@5f010000 { > > compatible = "fsl,imx8q-pcie"; > > reg = <0x5f010000 0x10000>, <0x8ff00000 0x80000>; > > reg-names = "dbi", "config"; > > #address-cells = <3>; > > #size-cells = <2>; > > device_type = "pci"; > > bus-range = <0x00 0xff>; > > ranges = <0x81000000 0 0x00000000 0x8ff80000 0 0x00010000>, > > <0x82000000 0 0x80000000 0x80000000 0 0x0ff00000>; > > ... > > }; > > }; > > > > Device tree already can descript all address translate. Some hardware > > driver implement fixup function by mask some bits of cpu address. Last > > pci-imx6.c are little bit better by fetch memory resource's offset to do > > fixup. > > > > static u64 imx_pcie_cpu_addr_fixup(struct dw_pcie *pcie, u64 cpu_addr) > > { > > ... > > entry = resource_list_first_type(&pp->bridge->windows, IORESOURCE_MEM); > > return cpu_addr - entry->offset; > > } > > > > But it is not good by using IORESOURCE_MEM to fix up io/cfg address map > > although address translate is the same as IORESOURCE_MEM. > > > > This patches to fetch untranslate range information for PCIe controller > > (pcie@5f010000: ranges). So current config ATU without cpu_fixup_addr(). > > > > == EP side: > > > > Endpoint > > ┌───────────────────────────────────────────────┐ > > │ pcie-ep@5f010000 │ > > │ ┌────────────────┐│ > > │ │ Endpoint ││ > > │ │ PCIe ││ > > │ │ Controller ││ > > │ bus@5f000000 │ ││ > > │ ┌──────────┐ │ ││ > > │ │ │ Outbound Transfer ││ > > │┌─────┐ │ Bus ┼─────►│ ATU ──────────┬┬─────► > > ││ │ │ Fabric │Bus │ ││PCI Addr > > ││ CPU ├───►│ │Addr │ ││0xA000_0000 > > ││ │CPU │ │0x8000_0000 ││ > > │└─────┘Addr└──────────┘ │ ││ > > │ 0x7000_0000 └────────────────┘│ > > └───────────────────────────────────────────────┘ > > > > bus@5f000000 { > > compatible = "simple-bus"; > > ranges = <0x80000000 0x0 0x70000000 0x10000000>; > > > > pcie-ep@5f010000 { > > reg = <0x5f010000 0x00010000>, > > <0x80000000 0x10000000>; > > reg-names = "dbi", "addr_space"; > > ... ^^^^ > > }; > > ... > > }; > > > > Add `bus_addr_base` to configure the outbound window address for CPU write. > > The BUS fabric generally passes the same address to the PCIe EP controller, > > but some BUS fabrics convert the address before sending it to the PCIe EP > > controller. > > > > Above diagram, CPU write data to outbound windows address 0x7000_0000, > > Bus fabric convert it to 0x8000_0000. ATU should use BUS address > > 0x8000_0000 as input address and convert to PCI address 0xA000_0000. > > > > Previously, `cpu_addr_fixup()` was used to handle address conversion. Now, > > the device tree provides this information. > > > > The both pave the road to eliminate ugle cpu_fixup_addr() callback function. > > > > Signed-off-by: Frank Li > > --- > > Changes in v7: > > - fix > > | Reported-by: kernel test robot > > | Closes: https://lore.kernel.org/oe-kbuild-all/202410291546.kvgEWJv7-lkp@intel.com/ > > - Link to v6: https://lore.kernel.org/r/20241028-pci_fixup_addr-v6-0-ebebcd8fd4ff@nxp.com > > > > Changes in v6: > > - merge RC and EP to one thread! > > - Link to v5: https://lore.kernel.org/r/20241015-pci_fixup_addr-v5-0-ced556c85270@nxp.com > > > > Changes in v5: > > - update address order in diagram patches. > > - remove confused 0x5f00_0000 range > > - update patch1's commit message. > > - Link to v4: https://lore.kernel.org/r/20241008-pci_fixup_addr-v4-0-25e5200657bc@nxp.com > > > > Changes in v4: > > - Improve commit message by add driver source code path. > > - Link to v3: https://lore.kernel.org/r/20240930-pci_fixup_addr-v3-0-80ee70352fc7@nxp.com > > > > Changes in v3: > > - see each patch > > - Link to v2: https://lore.kernel.org/r/20240926-pci_fixup_addr-v2-0-e4524541edf4@nxp.com > > > > Changes in v2: > > - see each patch > > - Link to v1: https://lore.kernel.org/r/20240924-pci_fixup_addr-v1-0-57d14a91ec4f@nxp.com > > > > --- > > Frank Li (7): > > of: address: Add parent_bus_addr to struct of_pci_range > > PCI: dwc: Using parent_bus_addr in of_range to eliminate cpu_addr_fixup() > > PCI: dwc: ep: Add bus_addr_base for outbound window > > PCI: imx6: Remove cpu_addr_fixup() > > dt-bindings: PCI: fsl,imx6q-pcie-ep: Add compatible string fsl,imx8q-pcie-ep > > PCI: imx6: Pass correct sub mode when calling phy_set_mode_ext() > > PCI: imx6: Add i.MX8Q PCIe Endpoint (EP) support > > > > .../devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml | 38 ++++++++++++++- > > drivers/of/address.c | 2 + > > drivers/pci/controller/dwc/pci-imx6.c | 46 +++++++++--------- > > drivers/pci/controller/dwc/pcie-designware-ep.c | 21 ++++++++- > > drivers/pci/controller/dwc/pcie-designware-host.c | 55 +++++++++++++++++++++- > > drivers/pci/controller/dwc/pcie-designware.h | 9 ++++ > > include/linux/of_address.h | 1 + > > 7 files changed, 148 insertions(+), 24 deletions(-) > > --- > > base-commit: 9852d85ec9d492ebef56dc5f229416c925758edc > > change-id: 20240924-pci_fixup_addr-a8568f9bbb34 > > > > Best regards, > > --- > > Frank Li > > -- மணிவண்ணன் சதாசிவம்