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AJvYcCXBKNzSLVQGNTpme4M08KTn0jlElrmrOpt5+uZz8nmxDw0K/AcsRpqMRnpVbO2IZ7CPKV4=@lists.linux.dev X-Gm-Message-State: AOJu0YzpyQ3MlHbrWq4nKrnSUW0vB5rf8YAe2pDXm1KNaruiU8MsjqVn yqypN1ccU96D8TL7hM53+8IvIUEraHzmPkOHMLnDxprbiQ/pRGbBRy+SX5rKHg== X-Google-Smtp-Source: AGHT+IGA2wP5EZO//DczjdnLKwXL89OrzkosGXPzS/O5S6Z8HF8QEOaPag4uwMWdG7hB0NyuZCDjFw== X-Received: by 2002:a05:6871:691:b0:270:27e6:6f1a with SMTP id 586e51a60fabf-2962e2a0d04mr1279132fac.41.1731653662715; Thu, 14 Nov 2024 22:54:22 -0800 (PST) Received: from thinkpad ([117.193.208.47]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-7f8c1c3224asm650735a12.29.2024.11.14.22.54.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 14 Nov 2024 22:54:22 -0800 (PST) Date: Fri, 15 Nov 2024 12:24:12 +0530 From: Manivannan Sadhasivam To: Richard Zhu Cc: l.stach@pengutronix.de, bhelgaas@google.com, lpieralisi@kernel.org, kw@linux.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, shawnguo@kernel.org, frank.li@nxp.com, s.hauer@pengutronix.de, festevam@gmail.com, imx@lists.linux.dev, kernel@pengutronix.de, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v6 06/10] PCI: imx6: Fix the missing reference clock disable logic Message-ID: <20241115065412.l2r5vmqaw3ufcjo3@thinkpad> References: <20241101070610.1267391-1-hongxing.zhu@nxp.com> <20241101070610.1267391-7-hongxing.zhu@nxp.com> Precedence: bulk X-Mailing-List: imx@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20241101070610.1267391-7-hongxing.zhu@nxp.com> On Fri, Nov 01, 2024 at 03:06:06PM +0800, Richard Zhu wrote: > Ensure the *_enable_ref_clk() function is symmetric by addressing missing > disable parts on some platforms. > > Fixes: d0a75c791f98 ("PCI: imx6: Factor out ref clock disable to match enable") > Signed-off-by: Richard Zhu Reviewed-by: Manivannan Sadhasivam - Mani > Reviewed-by: Frank Li > --- > drivers/pci/controller/dwc/pci-imx6.c | 24 ++++++++++++------------ > 1 file changed, 12 insertions(+), 12 deletions(-) > > diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c > index 54039d2760d5..bb130c84c016 100644 > --- a/drivers/pci/controller/dwc/pci-imx6.c > +++ b/drivers/pci/controller/dwc/pci-imx6.c > @@ -595,10 +595,9 @@ static int imx_pcie_attach_pd(struct device *dev) > > static int imx6sx_pcie_enable_ref_clk(struct imx_pcie *imx_pcie, bool enable) > { > - if (enable) > - regmap_clear_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR12, > - IMX6SX_GPR12_PCIE_TEST_POWERDOWN); > - > + regmap_update_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR12, > + IMX6SX_GPR12_PCIE_TEST_POWERDOWN, > + enable ? 0 : IMX6SX_GPR12_PCIE_TEST_POWERDOWN); > return 0; > } > > @@ -627,19 +626,20 @@ static int imx8mm_pcie_enable_ref_clk(struct imx_pcie *imx_pcie, bool enable) > { > int offset = imx_pcie_grp_offset(imx_pcie); > > - if (enable) { > - regmap_clear_bits(imx_pcie->iomuxc_gpr, offset, IMX8MQ_GPR_PCIE_CLK_REQ_OVERRIDE); > - regmap_set_bits(imx_pcie->iomuxc_gpr, offset, IMX8MQ_GPR_PCIE_CLK_REQ_OVERRIDE_EN); > - } > - > + regmap_update_bits(imx_pcie->iomuxc_gpr, offset, > + IMX8MQ_GPR_PCIE_CLK_REQ_OVERRIDE, > + enable ? 0 : IMX8MQ_GPR_PCIE_CLK_REQ_OVERRIDE); > + regmap_update_bits(imx_pcie->iomuxc_gpr, offset, > + IMX8MQ_GPR_PCIE_CLK_REQ_OVERRIDE_EN, > + enable ? IMX8MQ_GPR_PCIE_CLK_REQ_OVERRIDE_EN : 0); > return 0; > } > > static int imx7d_pcie_enable_ref_clk(struct imx_pcie *imx_pcie, bool enable) > { > - if (!enable) > - regmap_set_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR12, > - IMX7D_GPR12_PCIE_PHY_REFCLK_SEL); > + regmap_update_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR12, > + IMX7D_GPR12_PCIE_PHY_REFCLK_SEL, > + enable ? 0 : IMX7D_GPR12_PCIE_PHY_REFCLK_SEL); > return 0; > } > > -- > 2.37.1 > -- மணிவண்ணன் சதாசிவம்