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[209.17.68.221]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-72d4056a6b4sm9361210b3a.60.2025.01.15.05.06.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 15 Jan 2025 05:06:11 -0800 (PST) Date: Wed, 15 Jan 2025 22:06:09 +0900 From: Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= To: Richard Zhu Cc: l.stach@pengutronix.de, bhelgaas@google.com, lpieralisi@kernel.org, manivannan.sadhasivam@linaro.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, shawnguo@kernel.org, frank.li@nxp.com, s.hauer@pengutronix.de, festevam@gmail.com, imx@lists.linux.dev, kernel@pengutronix.de, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v7 0/10] A bunch of changes to refine i.MX PCIe driver Message-ID: <20250115130609.GT4176564@rocinante> References: <20241126075702.4099164-1-hongxing.zhu@nxp.com> <20250115130406.GS4176564@rocinante> Precedence: bulk X-Mailing-List: imx@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20250115130406.GS4176564@rocinante> Hello, > > A bunch of changes to refine i.MX PCIe driver. > > - Add ref clock gate for i.MX95 PCIe. > > The changes of clock part are here [1], and had been applied by Abel. > > [1] https://lkml.org/lkml/2024/10/15/390 > > - Clean i.MX PCIe driver by removing useless codes. > > Patch #3 depends on dts changes. And the dts changes had been applied > > by Shawn, there is no dependecy now. > > - Make core reset and enable_ref_clk symmetric for i.MX PCIe driver. > > - Use dwc common suspend resume method, and enable i.MX8MQ, i.MX8Q and > > i.MX95 PCIe PM supports. > > Applied to controller/imx6 for v6.14, thank you! Richard and Frank, please have a look at the code to make sure that everything looks fine to you. There were some conflicts while I applied the series, and I want to make sure that nothing is broken. Thank you! Krzysztof