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From: Marco Felsch <m.felsch@pengutronix.de>
To: Adam Ford <aford173@gmail.com>
Cc: nicolas.dufresne@collabora.com, benjamin.gaignard@collabora.com,
	p.zabel@pengutronix.de, mchehab@kernel.org, shawnguo@kernel.org,
	Sascha Hauer <s.hauer@pengutronix.de>,
	kernel@pengutronix.de, festevam@gmail.com, robh@kernel.org,
	krzk+dt@kernel.org, conor+dt@kernel.org, paulk@sys-base.io,
	hverkuil@xs4all.nl, laurent.pinchart@ideasonboard.com,
	sebastian.fricke@collabora.com, ming.qian@nxp.com,
	linux-kernel@vger.kernel.org, linux-media@vger.kernel.org,
	linux-rockchip@lists.infradead.org, imx@lists.linux.dev,
	linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org
Subject: Re: [RFC PATCH 07/11] arm64: dts: imx8mp: fix VPU_BUS clock setting
Date: Wed, 28 May 2025 10:42:49 +0200	[thread overview]
Message-ID: <20250528084249.6qn2mnu2rmrv7xhi@pengutronix.de> (raw)
In-Reply-To: <CAHCN7xLecU12XtXFuwfNP+eee+9RLCSB9iErNmk7VFV+WrozJA@mail.gmail.com>

Hi Adam,

thanks for testing.

On 25-05-27, Adam Ford wrote:
> On Fri, May 2, 2025 at 11:55 AM Marco Felsch <m.felsch@pengutronix.de> wrote:
> >
> > On 25-05-02, Adam Ford wrote:
> > > On Fri, May 2, 2025 at 10:10 AM Marco Felsch <m.felsch@pengutronix.de> wrote:
> > > >
> > > > The VPU_PLL clock must be set before the VPU_BUS clock which is derived
> > > > from the VPU_PLL clock else the VPU_BUS clock is 300MHz and not 600MHz.
> 
> I did verify the current clock rate ends up at 300MHz instead of the
> desired 600 or 800MHz, so we should do something.
> 
> > > >
> > > > Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
> > > > ---
> > > >  arch/arm64/boot/dts/freescale/imx8mp.dtsi | 4 ++--
> > > >  1 file changed, 2 insertions(+), 2 deletions(-)
> > > >
> > > > diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > > > index 97b09b647ec7..7f4bdefb3480 100644
> > > > --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > > > +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > > > @@ -2289,8 +2289,8 @@ vpumix_blk_ctrl: blk-ctrl@38330000 {
> > > >                                  <&clk IMX8MP_CLK_VPU_G2_ROOT>,
> > > >                                  <&clk IMX8MP_CLK_VPU_VC8KE_ROOT>;
> > > >                         clock-names = "g1", "g2", "vc8000e";
> > > > -                       assigned-clocks = <&clk IMX8MP_CLK_VPU_BUS>, <&clk IMX8MP_VPU_PLL>;
> > > > -                       assigned-clock-parents = <&clk IMX8MP_VPU_PLL_OUT>;
> > > > +                       assigned-clocks = <&clk IMX8MP_VPU_PLL>, <&clk IMX8MP_CLK_VPU_BUS>;
> > > > +                       assigned-clock-parents = <0>, <&clk IMX8MP_VPU_PLL_OUT>;
> > > >                         assigned-clock-rates = <600000000>, <600000000>;
> > >
> > > I think there was a move to make the default be overdrive [1]  and [2]
> > > and use a 'nominal' device tree for those who are not in overdrive
> > > mode.  According to the TRM, the VPU_BUS_CLK_ROOT, the nominal is
> > > 600MHz and the overdrive is 800MHz.  Based on that, I wonder if the
> > > values here should be 800MHz and if we should add the nominal values
> > > of 600MHz to the imx8m-nominal.dtsi file.
> >
> > You're right, Ahamd and Lucas did change this. I will adapt it later on.
> 
> I updated my device tree to run in overdrive mode and ran fluster at
> the higher rates:
> VPU_G1 - 800MHz,
> VPU-G2 - 700MHz
> VPU-Bus - 800MHz
> 
> ./fluster.py run -d GStreamer-VP8-V4L2SL-Gst1.0
> Ran 57/61 tests successfully               in 5.922 secs
> (vs 7.059 secs at nominal speed)
> 
> ./fluster.py run -dGStreamer-H.264-V4L2SL-Gst1.0
> Ran 129/135 tests successfully               in 40.107 secs
> (vs 45.741 secs at nominal speed)
> 
> If you want, I can submit the clock updates I have for overdrive or
> send them to you to save you some time.

Sure, you can pick-up my patches or add new ones. Either way you're
right, the clock fixes can go in separately.

Regards,
  Marco

> 
> adam
> 
> >
> > Regards,
> >   Marco
> 

  reply	other threads:[~2025-05-28  8:43 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-05-02 15:05 [RFC PATCH 00/11] VC8000E H.264 V4L2 Stateless Encoder Marco Felsch
2025-05-02 15:05 ` [RFC PATCH 01/11] media: Introduce Hantro V4L2 H.264 stateless encoding API Marco Felsch
2025-05-02 15:05 ` [RFC PATCH 02/11] media: uapi: add documentation for the " Marco Felsch
2025-05-02 15:05 ` [RFC PATCH 03/11] media: uapi: add nal unit header fields to encode_params Marco Felsch
2025-05-02 16:38   ` Nicolas Dufresne
2025-05-02 15:05 ` [RFC PATCH 04/11] media: uapi: add more V4L2_H264_ENCODE_FLAGs Marco Felsch
2025-05-02 15:05 ` [RFC PATCH 05/11] arm64: dts: imx8mp: drop gpcv2 vpu power-domains and clocks Marco Felsch
2025-05-02 16:30   ` Adam Ford
2025-05-02 16:53     ` Marco Felsch
2025-05-28  2:40   ` Adam Ford
2025-05-02 15:05 ` [RFC PATCH 06/11] arm64: dts: imx8mp: add VC8000E encoder node Marco Felsch
2025-05-02 15:05 ` [RFC PATCH 07/11] arm64: dts: imx8mp: fix VPU_BUS clock setting Marco Felsch
2025-05-02 16:52   ` Adam Ford
2025-05-02 16:55     ` Marco Felsch
2025-05-28  3:05       ` Adam Ford
2025-05-28  8:42         ` Marco Felsch [this message]
2025-05-28 14:14         ` Nicolas Dufresne
2025-05-28 14:47           ` Adam Ford
2025-05-02 15:05 ` [RFC PATCH 08/11] media: hantro: use hantro_decoded_buffer only for dst_vq Marco Felsch
2025-05-02 15:05 ` [RFC PATCH 09/11] media: verisilicon: add H264 encoder support Marco Felsch
2025-05-02 15:05 ` [RFC PATCH 10/11] media: verisilicon: split read/write debug Marco Felsch
2025-05-02 15:05 ` [RFC PATCH 11/11] media: hantro: add support for i.MX8MP VC8000E Marco Felsch
2025-06-10 18:19 ` [RFC PATCH 00/11] VC8000E H.264 V4L2 Stateless Encoder Nicolas Dufresne

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