From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EDA272E3B03; Tue, 8 Jul 2025 17:49:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751996968; cv=none; b=Uyv5WhLeDAmxMNDu7HFH8h/408ge0L6rTnno0/H1BuvftIjNwuNyx01Y+WjAlnAbSzOscXwN+Oek+2qTmERCzLIi676Cg4BZOzVPD8drDpmplbCEy9QDUYmVGbK9CQhDEZm5LHexj9GeTy7fXNvDRoLrjbwBWrYm28ZCjRCOdHI= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751996968; c=relaxed/simple; bh=y422oLl4Af8bIStHV0FEsx1jbyaFQfD6IX+O8/xN0bI=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=bfjr6IiPVjJYIEVSCKeee/N/LSpmUt4vxQRiWvwo6pTHTs1fdcKkP8OLC+WOJPwxBFk3tHnL4htWec7t+CthEQ21l4Ap7IhUcarhcqqRjmmh774cBq2jNC30WKCwypRKIsTndBAkVslnSIyF07mtIjZfoGdNaWuEJXeZgc9kIoc= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=s3kCJT1h; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="s3kCJT1h" Received: by smtp.kernel.org (Postfix) with ESMTPS id 89D85C4CEFE; Tue, 8 Jul 2025 17:49:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1751996967; bh=y422oLl4Af8bIStHV0FEsx1jbyaFQfD6IX+O8/xN0bI=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=s3kCJT1hX08M8FG/jF79mfOEmGy9WkAoZ+36No9E7u+qT0aAVb1n821xkD4d3oApp Prc6TE+8Y8Z+CdcYwdhZwlaAiijjct/554Xx49TVf2hetQhr6hW4S4JQPYF0SqVQTf sUklemAjhK0TnhD5mWcYB32CeYRhibP2A8co2E3UydW8qMaSwv2tbGkg2XbV9Om0Lg zT4RMt5PzGr6/p8ph2DkkOHbDFSXQm8f8h9IyRcOxOPDUvOnk3kT4fp9FUSUZZ/Tzb a0iFyWQhkq//Jyub5KGDfen/XAuEKbk3ZoDbStMzI3q/ThBaHKBDbCV7i3dS9L2APJ C1Nh7p3Zs52tg== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7D333C83F15; Tue, 8 Jul 2025 17:49:27 +0000 (UTC) From: Frank Li via B4 Relay Date: Tue, 08 Jul 2025 13:48:45 -0400 Subject: [PATCH v3 4/4] arm64: dts: imx8qxp-mek: add parallel ov5640 camera support Precedence: bulk X-Mailing-List: imx@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20250708-imx8qxp_pcam-v3-4-c8533e405df1@nxp.com> References: <20250708-imx8qxp_pcam-v3-0-c8533e405df1@nxp.com> In-Reply-To: <20250708-imx8qxp_pcam-v3-0-c8533e405df1@nxp.com> To: Laurent Pinchart , Mauro Carvalho Chehab , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Rui Miguel Silva , Martin Kepplinger , Purism Kernel Team , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel Cc: linux-media@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Frank Li X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1751996966; l=3808; i=Frank.Li@nxp.com; s=20240130; h=from:subject:message-id; bh=FpMilXYCpACC8eUJJu2RUd94r9uH1mqEpsHmTQ4r+GA=; b=LXSCs1NlOU4BcME49CIR7E+uQV9Q2NJLEocoJl926QzI9muKFgn/otWFMNlBk7ZoKuO/0Isuz XSlKsvujR+wBuhgmhEDJMmfD0sSqsTxY4BijqA7AmhiREEsyYRenPZ2 X-Developer-Key: i=Frank.Li@nxp.com; a=ed25519; pk=I0L1sDUfPxpAkRvPKy7MdauTuSENRq+DnA+G4qcS94Q= X-Endpoint-Received: by B4 Relay for Frank.Li@nxp.com/20240130 with auth_id=121 X-Original-From: Frank Li Reply-To: Frank.Li@nxp.com From: Frank Li Add parallel ov5640 nodes in imx8qxp-mek and create overlay file to enable it because it can work at two mode: MIPI CSI and parallel mode. Signed-off-by: Frank Li --- changes in v3 - replace csi with cpi. - use imx8qxp-mek-ov5640-cpi.dtso since csi use imx8qxp-mek-ov5640-csi.dtso change in v2 - move ov5640 part to overlay file - rename to imx8qxp-mek-ov5640-parallel.dtso - remove data-lanes --- arch/arm64/boot/dts/freescale/Makefile | 3 + .../boot/dts/freescale/imx8qxp-mek-ov5640-cpi.dtso | 82 ++++++++++++++++++++++ 2 files changed, 85 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile index 02ef35578dbc7e05b35b781dbfca0f0bc124ead1..d5b6cbdc144bb00963d93c92dd493513d1f00540 100644 --- a/arch/arm64/boot/dts/freescale/Makefile +++ b/arch/arm64/boot/dts/freescale/Makefile @@ -330,6 +330,9 @@ dtb-$(CONFIG_ARCH_MXC) += imx8qxp-mek-pcie-ep.dtb imx8qxp-mek-ov5640-csi-dtbs := imx8qxp-mek.dtb imx8qxp-mek-ov5640-csi.dtbo dtb-${CONFIG_ARCH_MXC} += imx8qxp-mek-ov5640-csi.dtb +imx8qxp-mek-ov5640-cpi-dtbs := imx8qxp-mek.dtb imx8qxp-mek-ov5640-cpi.dtbo +dtb-${CONFIG_ARCH_MXC} += imx8qxp-mek-ov5640-cpi.dtb + dtb-$(CONFIG_ARCH_MXC) += imx8qxp-tqma8xqp-mba8xx.dtb dtb-$(CONFIG_ARCH_MXC) += imx8qxp-tqma8xqps-mb-smarc-2.dtb dtb-$(CONFIG_ARCH_MXC) += imx8ulp-evk.dtb diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-mek-ov5640-cpi.dtso b/arch/arm64/boot/dts/freescale/imx8qxp-mek-ov5640-cpi.dtso new file mode 100644 index 0000000000000000000000000000000000000000..01f6333f507286133000eb0401a50043ca49a5df --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8qxp-mek-ov5640-cpi.dtso @@ -0,0 +1,82 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2025 NXP + */ + +/dts-v1/; +/plugin/; + +#include +#include +#include +#include + +&cm40_i2c { + #address-cells = <1>; + #size-cells = <0>; + + ov5640_pi: camera@3c { + compatible = "ovti,ov5640"; + reg = <0x3c>; + clocks = <&pi0_misc_lpcg IMX_LPCG_CLK_0>; + clock-names = "xclk"; + assigned-clocks = <&pi0_misc_lpcg IMX_LPCG_CLK_0>; + assigned-clock-rates = <24000000>; + AVDD-supply = <®_2v8>; + DOVDD-supply = <®_1v8>; + DVDD-supply = <®_1v5>; + pinctrl-0 = <&pinctrl_parallel_cpi>; + pinctrl-names = "default"; + powerdown-gpios = <&lsio_gpio3 2 GPIO_ACTIVE_HIGH>; + reset-gpios = <&lsio_gpio3 3 GPIO_ACTIVE_LOW>; + + port { + ov5640_pi_ep: endpoint { + bus-type = ; + bus-width = <8>; + hsync-active = <1>; + pclk-sample = <1>; + remote-endpoint = <¶llel_cpi_in>; + vsync-active = <0>; + }; + }; + }; +}; + +&iomuxc { + pinctrl_parallel_cpi: parallelcpigrp { + fsl,pins = < + IMX8QXP_CSI_D00_CI_PI_D02 0xc0000041 + IMX8QXP_CSI_D01_CI_PI_D03 0xc0000041 + IMX8QXP_CSI_D02_CI_PI_D04 0xc0000041 + IMX8QXP_CSI_D03_CI_PI_D05 0xc0000041 + IMX8QXP_CSI_D04_CI_PI_D06 0xc0000041 + IMX8QXP_CSI_D05_CI_PI_D07 0xc0000041 + IMX8QXP_CSI_D06_CI_PI_D08 0xc0000041 + IMX8QXP_CSI_D07_CI_PI_D09 0xc0000041 + + IMX8QXP_CSI_MCLK_CI_PI_MCLK 0xc0000041 + IMX8QXP_CSI_PCLK_CI_PI_PCLK 0xc0000041 + IMX8QXP_CSI_HSYNC_CI_PI_HSYNC 0xc0000041 + IMX8QXP_CSI_VSYNC_CI_PI_VSYNC 0xc0000041 + IMX8QXP_CSI_EN_LSIO_GPIO3_IO02 0xc0000041 + IMX8QXP_CSI_RESET_LSIO_GPIO3_IO03 0xc0000041 + >; + }; +}; + +&isi { + status = "okay"; +}; + +¶llel_cpi { + status = "okay"; + + ports { + port@0 { + parallel_cpi_in: endpoint { + remote-endpoint = <&ov5640_pi_ep>; + }; + }; + }; +}; -- 2.34.1