From: James Clark <james.clark@linaro.org>
To: Frank Li <Frank.Li@nxp.com>, Mark Brown <broonie@kernel.org>,
Clark Wang <xiaoning.wang@nxp.com>,
Fugang Duan <B38611@freescale.com>, Gao Pan <pandy.gao@nxp.com>,
Fugang Duan <fugang.duan@nxp.com>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Shawn Guo <shawnguo@kernel.org>,
Sascha Hauer <s.hauer@pengutronix.de>,
Fabio Estevam <festevam@gmail.com>,
Larisa Grigore <larisa.grigore@oss.nxp.com>,
Larisa Grigore <larisa.grigore@nxp.com>,
Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>,
Ciprianmarian Costea <ciprianmarian.costea@nxp.com>,
s32@nxp.com
Cc: James Clark <james.clark@linaro.org>,
linux-spi@vger.kernel.org, imx@lists.linux.dev,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org
Subject: [PATCH 05/13] spi: spi-fsl-lpspi: Enumerate all pin configuration definitions
Date: Thu, 14 Aug 2025 17:06:45 +0100 [thread overview]
Message-ID: <20250814-james-nxp-lpspi-v1-5-9586d7815d14@linaro.org> (raw)
In-Reply-To: <20250814-james-nxp-lpspi-v1-0-9586d7815d14@linaro.org>
Add all the possible options, use names more similar to the reference
manual and convert _OFFSET to _MASK so we can use FIELD_PREP() and
FIELD_FITS() macros etc.
This will make it slightly easier to add a DT property for this in the
next commit.
Signed-off-by: James Clark <james.clark@linaro.org>
---
drivers/spi/spi-fsl-lpspi.c | 21 +++++++++++++++------
1 file changed, 15 insertions(+), 6 deletions(-)
diff --git a/drivers/spi/spi-fsl-lpspi.c b/drivers/spi/spi-fsl-lpspi.c
index 79b170426bee..816e48bbc810 100644
--- a/drivers/spi/spi-fsl-lpspi.c
+++ b/drivers/spi/spi-fsl-lpspi.c
@@ -69,7 +69,11 @@
#define DER_RDDE BIT(1)
#define DER_TDDE BIT(0)
#define CFGR1_PCSCFG BIT(27)
-#define CFGR1_PINCFG (BIT(24)|BIT(25))
+#define CFGR1_PINCFG_MASK GENMASK(25, 24)
+#define CFGR1_PINCFG_SIN_IN_SOUT_OUT 0
+#define CFGR1_PINCFG_SIN_ONLY 1
+#define CFGR1_PINCFG_SOUT_ONLY 2
+#define CFGR1_PINCFG_SOUT_IN_SIN_OUT 3
#define CFGR1_PCSPOL_MASK GENMASK(11, 8)
#define CFGR1_NOSTALL BIT(3)
#define CFGR1_HOST BIT(0)
@@ -411,8 +415,9 @@ static int fsl_lpspi_dma_configure(struct spi_controller *controller)
static int fsl_lpspi_config(struct fsl_lpspi_data *fsl_lpspi)
{
- u32 temp;
+ u32 temp = 0;
int ret;
+ u8 pincfg;
if (!fsl_lpspi->is_target) {
ret = fsl_lpspi_set_bitrate(fsl_lpspi);
@@ -422,10 +427,14 @@ static int fsl_lpspi_config(struct fsl_lpspi_data *fsl_lpspi)
fsl_lpspi_set_watermark(fsl_lpspi);
- if (!fsl_lpspi->is_target)
- temp = CFGR1_HOST;
- else
- temp = CFGR1_PINCFG;
+ if (!fsl_lpspi->is_target) {
+ temp |= CFGR1_HOST;
+ pincfg = CFGR1_PINCFG_SIN_IN_SOUT_OUT;
+ } else {
+ pincfg = CFGR1_PINCFG_SOUT_IN_SIN_OUT;
+ }
+ temp |= FIELD_PREP(CFGR1_PINCFG_MASK, pincfg);
+
if (fsl_lpspi->config.mode & SPI_CS_HIGH)
temp |= FIELD_PREP(CFGR1_PCSPOL_MASK,
BIT(fsl_lpspi->config.chip_select));
--
2.34.1
next prev parent reply other threads:[~2025-08-14 16:07 UTC|newest]
Thread overview: 51+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-14 16:06 [PATCH 00/13] spi: spi-fsl-lpspi: Generic fixes and support for S32G devices James Clark
2025-08-14 16:06 ` [PATCH 01/13] spi: spi-fsl-lpspi: Fix transmissions when using CONT James Clark
2025-08-14 16:06 ` [PATCH 02/13] spi: spi-fsl-lpspi: Set correct chip-select polarity bit James Clark
2025-08-14 16:49 ` Frank Li
2025-08-18 13:05 ` James Clark
2025-08-18 15:19 ` Frank Li
2025-08-19 8:21 ` James Clark
2025-08-19 14:11 ` Frank Li
2025-08-15 3:37 ` kernel test robot
2025-08-14 16:06 ` [PATCH 03/13] spi: spi-fsl-lpspi: Reset FIFO and disable module on transfer abort James Clark
2025-08-14 16:51 ` Frank Li
2025-08-18 13:17 ` James Clark
2025-08-14 16:06 ` [PATCH 04/13] spi: spi-fsl-lpspi: Clear status register after disabling the module James Clark
2025-08-14 16:58 ` Frank Li
2025-08-18 13:21 ` James Clark
2025-08-14 16:06 ` James Clark [this message]
2025-08-14 18:10 ` [PATCH 05/13] spi: spi-fsl-lpspi: Enumerate all pin configuration definitions Frank Li
2025-08-18 13:48 ` James Clark
2025-08-14 16:06 ` [PATCH 06/13] spi: spi-fsl-lpspi: Add DT property to override default pin config James Clark
2025-08-14 16:06 ` [PATCH 07/13] spi: spi-fsl-lpspi: Constify devtype datas James Clark
2025-08-14 18:38 ` Frank Li
2025-08-18 13:50 ` James Clark
2025-08-14 16:06 ` [PATCH 08/13] spi: spi-fsl-lpspi: Make prescale erratum a bool James Clark
2025-08-14 18:36 ` Frank Li
2025-08-18 13:54 ` James Clark
2025-08-14 16:06 ` [PATCH 09/13] spi: spi-fsl-lpspi: Parameterize reading num-cs from hardware James Clark
2025-08-14 18:31 ` Frank Li
2025-08-18 14:22 ` James Clark
2025-08-14 16:06 ` [PATCH 10/13] spi: spi-fsl-lpspi: Add compatible for S32G James Clark
2025-08-14 18:25 ` Frank Li
2025-08-18 14:31 ` James Clark
2025-08-18 15:18 ` Mark Brown
2025-08-19 8:23 ` James Clark
2025-08-18 15:28 ` Frank Li
2025-08-14 16:06 ` [PATCH 11/13] dt-bindings: lpspi: Update maximum num-cs value James Clark
2025-08-14 18:28 ` Frank Li
2025-08-18 13:31 ` James Clark
2025-08-14 20:59 ` Rob Herring
2025-08-18 12:49 ` James Clark
2025-08-14 16:06 ` [PATCH 12/13] dt-bindings: lpspi: Document nxp,lpspi-pincfg property James Clark
2025-08-14 18:19 ` Frank Li
2025-08-18 14:47 ` James Clark
2025-08-18 15:39 ` Frank Li
2025-08-19 9:51 ` James Clark
2025-08-19 14:08 ` Frank Li
2025-08-19 9:52 ` James Clark
2025-08-14 16:06 ` [PATCH 13/13] dt-bindings: lpspi: Document support for S32G James Clark
2025-08-14 18:23 ` Frank Li
2025-08-18 15:00 ` James Clark
2025-08-14 16:40 ` [PATCH 00/13] spi: spi-fsl-lpspi: Generic fixes and support for S32G devices Frank Li
2025-08-14 18:35 ` Mark Brown
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