From: Frank Li <Frank.Li@nxp.com>
To: Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Shawn Guo <shawnguo@kernel.org>,
Sascha Hauer <s.hauer@pengutronix.de>,
Pengutronix Kernel Team <kernel@pengutronix.de>,
Fabio Estevam <festevam@gmail.com>
Cc: devicetree@vger.kernel.org, imx@lists.linux.dev,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, Frank Li <Frank.Li@nxp.com>
Subject: [PATCH 12/12] arm64: dts: imx8qxp-mek: change space with tab
Date: Wed, 29 Oct 2025 15:54:48 -0400 [thread overview]
Message-ID: <20251029-8qxp_dts-v1-12-cf61b7e5fc78@nxp.com> (raw)
In-Reply-To: <20251029-8qxp_dts-v1-0-cf61b7e5fc78@nxp.com>
Change space with tab to align with code style.
Signed-off-by: Frank Li <Frank.Li@nxp.com>
---
arch/arm64/boot/dts/freescale/imx8qxp-mek.dts | 46 +++++++++++++--------------
1 file changed, 23 insertions(+), 23 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
index 8b47623835bac028c2e4368d26c8891989b4751d..39a1b52f27d676b3e515b2932d75a6b5feb44eba 100644
--- a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
+++ b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
@@ -864,8 +864,8 @@ &iomuxc {
pinctrl_cm40_i2c: cm40i2cgrp {
fsl,pins = <
- IMX8QXP_ADC_IN1_M40_I2C0_SDA 0x0600004c
- IMX8QXP_ADC_IN0_M40_I2C0_SCL 0x0600004c
+ IMX8QXP_ADC_IN1_M40_I2C0_SDA 0x0600004c
+ IMX8QXP_ADC_IN0_M40_I2C0_SCL 0x0600004c
>;
};
@@ -878,16 +878,16 @@ IMX8QXP_ADC_IN0_LSIO_GPIO1_IO10 0xc600004c
pinctrl_esai0: esai0grp {
fsl,pins = <
- IMX8QXP_ESAI0_FSR_ADMA_ESAI0_FSR 0xc6000040
- IMX8QXP_ESAI0_FST_ADMA_ESAI0_FST 0xc6000040
- IMX8QXP_ESAI0_SCKR_ADMA_ESAI0_SCKR 0xc6000040
- IMX8QXP_ESAI0_SCKT_ADMA_ESAI0_SCKT 0xc6000040
- IMX8QXP_ESAI0_TX0_ADMA_ESAI0_TX0 0xc6000040
- IMX8QXP_ESAI0_TX1_ADMA_ESAI0_TX1 0xc6000040
- IMX8QXP_ESAI0_TX2_RX3_ADMA_ESAI0_TX2_RX3 0xc6000040
- IMX8QXP_ESAI0_TX3_RX2_ADMA_ESAI0_TX3_RX2 0xc6000040
- IMX8QXP_ESAI0_TX4_RX1_ADMA_ESAI0_TX4_RX1 0xc6000040
- IMX8QXP_ESAI0_TX5_RX0_ADMA_ESAI0_TX5_RX0 0xc6000040
+ IMX8QXP_ESAI0_FSR_ADMA_ESAI0_FSR 0xc6000040
+ IMX8QXP_ESAI0_FST_ADMA_ESAI0_FST 0xc6000040
+ IMX8QXP_ESAI0_SCKR_ADMA_ESAI0_SCKR 0xc6000040
+ IMX8QXP_ESAI0_SCKT_ADMA_ESAI0_SCKT 0xc6000040
+ IMX8QXP_ESAI0_TX0_ADMA_ESAI0_TX0 0xc6000040
+ IMX8QXP_ESAI0_TX1_ADMA_ESAI0_TX1 0xc6000040
+ IMX8QXP_ESAI0_TX2_RX3_ADMA_ESAI0_TX2_RX3 0xc6000040
+ IMX8QXP_ESAI0_TX3_RX2_ADMA_ESAI0_TX3_RX2 0xc6000040
+ IMX8QXP_ESAI0_TX4_RX1_ADMA_ESAI0_TX4_RX1 0xc6000040
+ IMX8QXP_ESAI0_TX5_RX0_ADMA_ESAI0_TX5_RX0 0xc6000040
>;
};
@@ -1006,15 +1006,15 @@ IMX8QXP_UART1_CTS_B_ADMA_UART1_CTS_B 0x06000020
pinctrl_lpuart2: lpuart2grp {
fsl,pins = <
- IMX8QXP_UART2_TX_ADMA_UART2_TX 0x06000020
- IMX8QXP_UART2_RX_ADMA_UART2_RX 0x06000020
+ IMX8QXP_UART2_TX_ADMA_UART2_TX 0x06000020
+ IMX8QXP_UART2_RX_ADMA_UART2_RX 0x06000020
>;
};
pinctrl_lpuart3: lpuart3grp {
fsl,pins = <
- IMX8QXP_FLEXCAN2_TX_ADMA_UART3_TX 0x06000020
- IMX8QXP_FLEXCAN2_RX_ADMA_UART3_RX 0x06000020
+ IMX8QXP_FLEXCAN2_TX_ADMA_UART3_TX 0x06000020
+ IMX8QXP_FLEXCAN2_RX_ADMA_UART3_RX 0x06000020
>;
};
@@ -1036,13 +1036,13 @@ IMX8QXP_PCIE_CTRL0_WAKE_B_LSIO_GPIO4_IO02 0x04000021
pinctrl_typec: typecgrp {
fsl,pins = <
- IMX8QXP_SPI2_SCK_LSIO_GPIO1_IO03 0x06000021
+ IMX8QXP_SPI2_SCK_LSIO_GPIO1_IO03 0x06000021
>;
};
pinctrl_typec_mux: typecmuxgrp {
fsl,pins = <
- IMX8QXP_ENET0_REFCLK_125M_25M_LSIO_GPIO5_IO09 0x60
+ IMX8QXP_ENET0_REFCLK_125M_25M_LSIO_GPIO5_IO09 0x60
>;
};
@@ -1057,11 +1057,11 @@ IMX8QXP_SAI0_TXFS_ADMA_SAI0_TXFS 0x06000040
pinctrl_sai1: sai1grp {
fsl,pins = <
- IMX8QXP_SAI1_RXD_ADMA_SAI1_RXD 0x06000040
- IMX8QXP_SAI1_RXC_ADMA_SAI1_TXC 0x06000040
- IMX8QXP_SAI1_RXFS_ADMA_SAI1_TXFS 0x06000040
- IMX8QXP_SPI0_CS1_ADMA_SAI1_TXD 0x06000060
- IMX8QXP_SPI2_CS0_LSIO_GPIO1_IO00 0x06000040
+ IMX8QXP_SAI1_RXD_ADMA_SAI1_RXD 0x06000040
+ IMX8QXP_SAI1_RXC_ADMA_SAI1_TXC 0x06000040
+ IMX8QXP_SAI1_RXFS_ADMA_SAI1_TXFS 0x06000040
+ IMX8QXP_SPI0_CS1_ADMA_SAI1_TXD 0x06000060
+ IMX8QXP_SPI2_CS0_LSIO_GPIO1_IO00 0x06000040
>;
};
--
2.34.1
next prev parent reply other threads:[~2025-10-29 19:55 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-29 19:54 [PATCH 00/12] arm64: dts: imx8qxp: collect some imx8qxp-mek dts patches Frank Li
2025-10-29 19:54 ` [PATCH 01/12] arm64: dts: imx8qxp: add MAC address in ocotp Frank Li
2025-10-29 19:54 ` [PATCH 02/12] arm64: dts: imx8qxp: add readonly for ocotp Frank Li
2025-11-03 11:22 ` John Ernberg
2025-11-03 15:09 ` Frank Li
2025-10-29 19:54 ` [PATCH 03/12] arm64: dts: imx8qxp: add wakeup source for power-key Frank Li
2025-10-29 19:54 ` [PATCH 04/12] arm64: dts: imx8qxp-mek: add state_100mhz and state_200mhz for usdhc Frank Li
2025-10-29 19:54 ` [PATCH 05/12] arm64: dts: imx8qxp-mek: update usdhc1 clock to 400Mhz Frank Li
2025-10-29 19:54 ` [PATCH 06/12] arm64: dts: imx8qxp-mek: add flexspi and flash Frank Li
2025-10-29 19:54 ` [PATCH 07/12] arm64: dts: imx8qxp-mek: add phandle ocotp mac-address for fec Frank Li
2025-10-29 19:54 ` [PATCH 08/12] arm64: dts: imx8qxp-mek: add fec2 support Frank Li
2025-10-29 19:54 ` [PATCH 09/12] arm64: dts: imx8: add edma error interrupt support Frank Li
2025-10-29 19:54 ` [PATCH 10/12] arm64: dts: imx8qxp-mek: Add supports-clkreq property to PCIe M.2 port Frank Li
2025-10-29 19:54 ` [PATCH 11/12] arm64: dts: imx8qxp-mek: Add lpuart1 to support the M.2 PCIE9098 bluetooth Frank Li
2025-10-29 19:54 ` Frank Li [this message]
2025-11-16 9:58 ` [PATCH 00/12] arm64: dts: imx8qxp: collect some imx8qxp-mek dts patches Shawn Guo
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