Re: [PATCH v3 3/3] arm64: dts: imx8qm-var-som: Add support for Variscite Symphony board

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] Ethernet PHY is unpowered during MDIO bus scan due to decoupled phy-supply and MDIO parent
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--- Patch [3]: [PATCH v3 3/3] arm64: dts: imx8qm-var-som: Add support for Variscite Symphony board ---
commit ac21a70e1bd0bf7f486143508c499cc45337cbf8
Author: Stefano Radaelli <stefano.r@variscite.com>

arm64: dts: imx8qm-var-som: Add support for Variscite Symphony board

This commit adds device tree support for the Variscite Symphony carrier
board equipped with the VAR-SOM-MX8 QuadMax system on module. It defines
various peripherals including uSD Card, USB, Gigabit Ethernet, UART, SPI,
I2C interfaces, and PCIe.

Link: https://variscite.com/carrier-boards/symphony-board/

> diff --git a/arch/arm64/boot/dts/freescale/imx8qm-var-som-symphony.dts b/arch/arm64/boot/dts/freescale/imx8qm-var-som-symphony.dts
> new file mode 100644
> index 0000000000000..7c7fc8958efc0
> --- /dev/null
> +++ b/arch/arm64/boot/dts/freescale/imx8qm-var-som-symphony.dts

[ ... ]

> +&fec1 {
> +	mdio {
> +		ethphy1: ethernet-phy@5 {
> +			compatible = "ethernet-phy-ieee802.3-c22";
> +			reg = <5>;
> +			vddio-supply = <&reg_phy_vddio>;
> +			reset-gpios = <&pca9534 5 GPIO_ACTIVE_LOW>;
> +			reset-assert-us = <10000>;
> +			reset-deassert-us = <100000>;

[ ... ]

> +&fec2 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_fec2>;
> +	/*
> +	 * The required RGMII TX and RX 2ns delays are implemented directly
> +	 * in hardware via passive delay elements on the SOM PCB.
> +	 * No delay configuration is needed in software via PHY driver.
> +	 */
> +	phy-mode = "rgmii";
> +	phy-handle = <&ethphy1>;
> +	phy-supply = <&reg_fec_phy>;

[Severity: High]
Will this PHY fail to probe because it is unpowered during the MDIO bus scan?

Since ethphy1 is defined as a child of the fec1 MDIO bus, fec1 initiates
the PHY probe. However, its power supply (reg_fec_phy) is coupled to fec2 here.

When fec1 probes and registers its MDIO bus, it scans for PHYs. Because fec2
has not successfully probed yet (or deferred due to the missing PHY),
reg_fec_phy will be OFF. 

The MDIO core will fail to read the PHY ID of the unpowered ethphy1 and
silently skip registering it. When fec2 eventually probes and enables the
regulator, it will likely fail to connect because ethphy1 was never registered.

Does phy-supply need to be moved to the MDIO node or ethphy1 directly so
it gets powered on before the MDIO bus is scanned?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/cover.1784113547.git.stefano.r@variscite.com?part=3