From: sashiko-bot@kernel.org
To: pankaj.gupta@oss.nxp.com
Cc: Frank.Li@kernel.org, conor+dt@kernel.org, robh@kernel.org,
imx@lists.linux.dev, devicetree@vger.kernel.org
Subject: Re: [PATCH v43 6/7] arm64: dts: imx8ulp: add secure enclave node
Date: Mon, 31 Aug 2026 06:58:44 +0000 [thread overview]
Message-ID: <20260831065844.9D5671F00A3D@smtp.kernel.org> (raw)
In-Reply-To: <20260831-imx-se-if-v43-6-a3deadbda4ef@nxp.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] Missing required 'memory-region' property causes dtbs_check warnings for boards not enabling the secure enclave.
--
commit 2106f9e7211e704a2695d4d64ea8d1fd6500e104
Author: Pankaj Gupta <pankaj.gupta@nxp.com>
arm64: dts: imx8ulp: add secure enclave node
This commit adds the EdgeLock Enclave (ELE) secure-enclave node to the
i.MX8ULP SoC dtsi. It defaults to disabled so that boards must explicitly
opt-in to provide the required memory-region.
> diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
> index 777b89ed68490..ac8293f81c6b2 100644
> --- a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
[ ... ]
> @@ -186,6 +186,14 @@ scmi_sensor: protocol@15 {
> #thermal-sensor-cells = <1>;
> };
> };
> +
> + hsm0: secure-enclave {
> + compatible = "fsl,imx8ulp-se-ele-hsm";
> + mbox-names = "tx", "rx";
> + mboxes = <&s4muap 0 0>, <&s4muap 1 0>;
> + sram = <&sram0>;
> + status = "disabled";
> + };
[Severity: Low]
Will adding the hsm0 node here without a memory-region property trigger a
dtbs_check warning for boards that do not enable it?
The commit message notes this is kept disabled to avoid imposing a
reserved-memory requirement on every board. However, the fsl,imx-se.yaml
dt-binding schema strictly requires the memory-region property unconditionally,
regardless of the node's status.
Because of this, any board including imx8ulp.dtsi that does not include
imx8ulp-firmware.dtsi (or otherwise define the memory-region) might fail
validation during dtbs_check.
Does the schema need to be relaxed to only require memory-region when
status is "okay", or is there a dummy region we should provide by default?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260831-imx-se-if-v43-0-a3deadbda4ef@nxp.com?part=6
next prev parent reply other threads:[~2026-08-31 6:58 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-31 12:18 [PATCH v43 0/7] firmware: imx: driver for NXP secure-enclave pankaj.gupta
2026-08-31 12:18 ` [PATCH v43 1/7] Documentation/firmware: add imx/se to other_interfaces pankaj.gupta
2026-08-31 12:18 ` [PATCH v43 2/7] dt-bindings: arm: fsl: add imx-se-fw binding doc pankaj.gupta
2026-08-31 7:00 ` sashiko-bot
2026-08-31 12:18 ` [PATCH v43 3/7] firmware: imx: add driver for NXP EdgeLock Enclave pankaj.gupta
2026-08-31 7:05 ` sashiko-bot
2026-08-31 12:18 ` [PATCH v43 4/7] firmware: imx: device context dedicated to priv pankaj.gupta
2026-08-31 12:18 ` [PATCH v43 5/7] firmware: imx: adds miscdev pankaj.gupta
2026-08-31 7:05 ` sashiko-bot
2026-09-01 15:52 ` Pankaj Gupta (OSS)
2026-09-01 16:07 ` Frank Li
2026-08-31 12:18 ` [PATCH v43 6/7] arm64: dts: imx8ulp: add secure enclave node pankaj.gupta
2026-08-31 6:58 ` sashiko-bot [this message]
2026-08-31 12:18 ` [PATCH v43 7/7] arm64: dts: imx8ulp: add reserved memory for EdgeLock Enclave pankaj.gupta
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