Re: [PATCH 2/2] arm64: dts: freescale: imx95-aquila: Add ENETC port 2 in SGMII mode

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] Incorrect alphabetical ordering of Device Tree nodes in board file.
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commit 0d298c35f819e60d18b42987638eda0dd342b16e
Author: Franz Schnyder <franz.schnyder@toradex.com>

arm64: dts: freescale: imx95-aquila: Add ENETC port 2 in SGMII mode

This commit adds support for the Aquila ETH_2 using the ENETC port 2 as a
SGMII Ethernet interface. It enables the required nodes in both the dev
and clover carrier boards.

> diff --git a/arch/arm64/boot/dts/freescale/imx95-aquila-dev.dts b/arch/arm64/boot/dts/freescale/imx95-aquila-dev.dts
> index 3df17700b632f..2ff7bb8d6ac43 100644
> --- a/arch/arm64/boot/dts/freescale/imx95-aquila-dev.dts
> +++ b/arch/arm64/boot/dts/freescale/imx95-aquila-dev.dts
> @@ -99,11 +99,29 @@ &dsi2dp_out {
>  	remote-endpoint = <&dp_1_connector_in>;
>  };
>  
> +/* Aquila ETH_2_XGMII_MDIO, shared between all ethernet ports */
> +&netc_emdio {

[Severity: Low]
This isn't a bug, but device tree node overrides in board files are
conventionally ordered alphabetically by their label. Could this
&netc_emdio node be placed after nodes starting with 'e', rather than before
the &enetc_port0 node just below it? It appears this alphabetical ordering
was followed correctly for imx95-aquila-clover.dts.

> +	ethphy2: ethernet-phy@4 {
> +		reg = <4>;
> +		interrupt-parent = <&som_gpio_expander_1>;
> +		interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
> +	};
> +};
> +
>  /* Aquila ETH_1 */
>  &enetc_port0 {
>  	status = "okay";
>  };

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Sashiko AI review · https://sashiko.dev/#/patchset/20260903-add-enetc-port2-v1-0-2a21139d7a7c@toradex.com?part=2