Linux kernel and device drivers for NXP i.MX platforms
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From: sashiko-bot@kernel.org
To: "Frieder Schrempf" <frieder@fris.de>
Cc: conor+dt@kernel.org, devicetree@vger.kernel.org, robh@kernel.org,
	Frank.Li@kernel.org, imx@lists.linux.dev
Subject: Re: [PATCH v2 7/9] arm64: dts: imx8mm-kontron: Add GPIO labels and comments
Date: Mon, 14 Sep 2026 14:25:20 +0000	[thread overview]
Message-ID: <20260914142520.A706F1F000FF@smtp.kernel.org> (raw)
In-Reply-To: <20260914-upstreaming-v7-2-imx-dt-improvements-08-26-v2-7-8e12bc5f1f10@kontron.de>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Undocumented functional change in hardware pin configuration
--

commit d302aef127127e0c0034e70e30def7814e7b8ba2
Author: Oualid Derouiche <oualid.derouiche@kontron.de>

arm64: dts: imx8mm-kontron: Add GPIO labels and comments

Describe the GPIOs and their purpose using labels and comments.

> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-kontron-bl.dts b/arch/arm64/boot/dts/freescale/imx8mm-kontron-bl.dts
> index 1f3d0577f10c9..72588af057d21 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm-kontron-bl.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-kontron-bl.dts
[ ... ]
>  	pinctrl_gpio4: gpio4grp {
>  		fsl,pins = <
> -			MX8MM_IOMUXC_SAI1_TXD2_GPIO4_IO14		0x19
> -			MX8MM_IOMUXC_SAI1_TXD3_GPIO4_IO15		0x19
> +			/* CAN address DIP switches 1-4 */
> +			MX8MM_IOMUXC_SAI1_RXC_GPIO4_IO1			0x19 /* CAN_ADR0 */
> +			MX8MM_IOMUXC_SAI1_RXD2_GPIO4_IO4		0x19 /* CAN_ADR1 */
> +			MX8MM_IOMUXC_SAI1_RXD3_GPIO4_IO5		0x19 /* CAN_ADR2 */
> +			MX8MM_IOMUXC_SAI1_RXD4_GPIO4_IO6		0x19 /* CAN_ADR3 */

[Severity: Medium]
Does this code introduce an undocumented functional change to the hardware pin
configurations in pinctrl_gpio4?

The patch modifies pinctrl_gpio4 to actively configure four entirely new pins
(GPIO4_IO1, GPIO4_IO4, GPIO4_IO5, GPIO4_IO6) with the pad setting 0x19. Since
the &gpio4 node references this group, applying this patch alters the hardware
pin multiplexing state during boot.

The commit message strictly claims to 'Add GPIO labels and comments' and
'Describe the GPIOs and their purpose using labels and comments', implying no
functional behavioral changes.

Could the commit message be updated to describe this functional change, or
should these new pins be separated into their own patch?

> +			MX8MM_IOMUXC_SAI1_TXD2_GPIO4_IO14		0x19 /* DSI_MUX_SEL */
> +			MX8MM_IOMUXC_SAI1_TXD3_GPIO4_IO15		0x19 /* DSI_MUX_OE */
>  		>;
>  	};

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260914-upstreaming-v7-2-imx-dt-improvements-08-26-v2-0-8e12bc5f1f10@kontron.de?part=7

  reply	other threads:[~2026-09-14 14:25 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-14 13:46 [PATCH v2 0/9] Misc Kontron i.MX DT improvements Frieder Schrempf
2026-09-14 13:46 ` [PATCH v2 1/9] ARM: dts: imx6ul-kontron-bl-common: Replace UART3 with DIP switch GPIOs Frieder Schrempf
2026-09-14 13:46 ` [PATCH v2 2/9] ARM: dts: imx6ul-kontron-bl-common: Add GPIO labels Frieder Schrempf
2026-09-14 13:46 ` [PATCH v2 3/9] ARM: dts: imx6ul-kontron-bl-common: Fix USB OTG1 ID pin configuration Frieder Schrempf
2026-09-14 13:46 ` [PATCH v2 4/9] arm64: dts: imx93-kontron: Adjust GPIO4_IO29 usage Frieder Schrempf
2026-09-14 13:46 ` [PATCH v2 5/9] arm64: dts: imx93-kontron: Make USB-C connector "device-only" Frieder Schrempf
2026-09-14 13:46 ` [PATCH v2 6/9] arm64: dts: imx8mm-kontron: Describe the ethernet PHY LEDs Frieder Schrempf
2026-09-14 13:46 ` [PATCH v2 7/9] arm64: dts: imx8mm-kontron: Add GPIO labels and comments Frieder Schrempf
2026-09-14 14:25   ` sashiko-bot [this message]
2026-09-14 13:46 ` [PATCH v2 8/9] arm64: dts: imx8mm-kontron: Add SPI EERAM on BL device Frieder Schrempf
2026-09-14 13:46 ` [PATCH v2 9/9] arm64: dts: imx8mp-kontron: Fix LVDS clock frequency for DL device Frieder Schrempf
2026-09-23 20:22 ` (subset) [PATCH v2 0/9] Misc Kontron i.MX DT improvements Frank.Li

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