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From: Andrei Stefanescu <andrei.stefanescu@oss.nxp.com>
To: Krzysztof Kozlowski <krzk@kernel.org>,
	Arnd Bergmann <arnd@arndb.de>,
	Linus Walleij <linus.walleij@linaro.org>,
	Bartosz Golaszewski <brgl@bgdev.pl>,
	Rob Herring <robh@kernel.org>,
	krzk+dt@kernel.org, Conor Dooley <conor+dt@kernel.org>,
	Chester Lin <chester62515@gmail.com>,
	Matthias Brugger <mbrugger@suse.com>,
	Ghennadi Procopciuc <Ghennadi.Procopciuc@nxp.com>,
	Larisa Grigore <larisa.grigore@nxp.com>,
	Lee Jones <lee@kernel.org>, Shawn Guo <shawnguo@kernel.org>,
	Sascha Hauer <s.hauer@pengutronix.de>,
	Fabio Estevam <festevam@gmail.com>,
	aisheng.dong@nxp.com, Jacky Bai <ping.bai@nxp.com>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	"Rafael J . Wysocki" <rafael@kernel.org>,
	Srinivas Kandagatla <srini@kernel.org>
Cc: "open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	NXP S32 Linux Team <s32@nxp.com>,
	Christophe Lizzi <clizzi@redhat.com>,
	Alberto Ruiz <aruizrui@redhat.com>,
	Enric Balletbo <eballetb@redhat.com>,
	echanude@redhat.com,
	Pengutronix Kernel Team <kernel@pengutronix.de>,
	imx@lists.linux.dev, Vincent Guittot <vincent.guittot@linaro.org>
Subject: Re: [PATCH v7 10/12] nvmem: s32g2_siul2: add NVMEM driver for SoC information
Date: Tue, 5 Aug 2025 15:53:51 +0300	[thread overview]
Message-ID: <23f2af9b-753f-4213-ba5e-b439e33be239@oss.nxp.com> (raw)
In-Reply-To: <b5775270-5306-4eb7-9fe5-44b087b20c40@kernel.org>

Hi Krzysztof,

On 04/08/2025 10:26, Krzysztof Kozlowski wrote:
> On 04/08/2025 09:12, Andrei Stefanescu wrote:
>> Hi Krzysztof,
>>
>> Thank you for the quick response!
>> On 02/08/2025 11:32, Krzysztof Kozlowski wrote:
>>> On 02/08/2025 10:28, Krzysztof Kozlowski wrote:
>>>> On 01/08/2025 16:36, Andrei Stefanescu wrote:
>>>>> Apart from the proposed NVMEM driver, there is also an option of exporting
>>>>> a syscon regmap for the registers which provide information about the SoC.
>>>>>
>>>>> I have seen that typically NVMEM drivers export information read from fuses
>>>>> but I think having a NVMEM driver is nicer way to access the information
>>>>> instead of using a syscon regmap and manually extracting the needed bits. 
>>>>
>>>>
>>>> nvmem is not a syscon. Mixing these two means device is something
>>>> completely else.
>>
>> Yes, I don't want to mix them. The driver will either be a NVMEM driver or
>> a syscon. These registers are read-only. I suggested NVMEM because it's a
> 
> We do not talk about drivers here, but hardware.
> 
>> an abstraction layer which makes it easier for drivers which want to use
>> that information without knowing where to actually read it i.e. reg address,
>> bit mask.
> 
> Sorry, but no. You design it for drivers, that's not the way. Describe
> properly the hardware.

I don't think there's a clear way. These are read-only registers, I am not sure
if exporting them as a syscon regmap properly describes the hardware. Moreover,
I saw the following phrase in the NVMEM documentation [1]:

"NVMEM is the abbreviation for Non Volatile Memory layer. It is used to retrieve
configuration of SOC or Device specific data from non volatile memories like eeprom,
efuses and so on."

This suggests that NVMEM might be a fit. I incline more towards the NVVMEM driver
because it will also reduce code duplication (if multiple drivers need to read the
part number for example).

What do you think? Would you consider NVMEM the way to go in this case?

Best regards,
Andrei

[1] - https://www.kernel.org/doc/html/latest/driver-api/nvmem.html


  reply	other threads:[~2025-08-05 12:53 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-07-10 14:20 [PATCH v7 00/12] gpio: siul2-s32g2: add initial GPIO driver Andrei Stefanescu
2025-07-10 14:20 ` [PATCH v7 01/12] dt-bindings: mfd: add support for the NXP SIUL2 module Andrei Stefanescu
2025-07-10 15:49   ` Frank Li
2025-07-11  7:36   ` Krzysztof Kozlowski
2025-07-11  7:45     ` Krzysztof Kozlowski
2025-07-11  7:37   ` Krzysztof Kozlowski
2025-07-11  7:39   ` Krzysztof Kozlowski
2025-07-11 12:25     ` Andrei Stefanescu
2025-07-10 14:20 ` [PATCH v7 02/12] mfd: nxp-siul2: add support for NXP SIUL2 Andrei Stefanescu
2025-07-10 16:20   ` Frank Li
2025-07-11  7:13     ` Andrei Stefanescu
2025-07-10 14:20 ` [PATCH v7 03/12] arm64: dts: s32g: change pinctrl node into the new mfd node Andrei Stefanescu
2025-07-10 14:20 ` [PATCH v7 04/12] pinctrl: s32cc: small refactoring Andrei Stefanescu
2025-07-10 16:24   ` Frank Li
2025-07-10 14:20 ` [PATCH v7 05/12] pinctrl: s32cc: change to "devm_pinctrl_register_and_init" Andrei Stefanescu
2025-07-10 16:24   ` Frank Li
2025-07-10 14:20 ` [PATCH v7 06/12] dt-bindings: pinctrl: deprecate SIUL2 pinctrl bindings Andrei Stefanescu
2025-07-10 16:26   ` Frank Li
2025-07-11  7:44   ` Krzysztof Kozlowski
2025-07-10 14:20 ` [PATCH v7 07/12] pinctrl: s32g2: change the driver to also be probed as an MFD cell Andrei Stefanescu
2025-07-11 10:52   ` kernel test robot
2025-07-10 14:20 ` [PATCH v7 08/12] pinctrl: s32cc: implement GPIO functionality Andrei Stefanescu
2025-07-10 14:20 ` [PATCH v7 09/12] MAINTAINERS: add MAINTAINER for NXP SIUL2 MFD driver Andrei Stefanescu
2025-07-10 14:20 ` [PATCH v7 10/12] nvmem: s32g2_siul2: add NVMEM driver for SoC information Andrei Stefanescu
2025-07-11  5:37   ` Arnd Bergmann
2025-07-11 12:39     ` Andrei Stefanescu
2025-08-01 14:36       ` Andrei Stefanescu
2025-08-02  8:28         ` Krzysztof Kozlowski
2025-08-02  8:32           ` Krzysztof Kozlowski
2025-08-04  7:12             ` Andrei Stefanescu
2025-08-04  7:26               ` Krzysztof Kozlowski
2025-08-05 12:53                 ` Andrei Stefanescu [this message]
2025-07-18 13:45   ` Lee Jones
2025-07-10 14:20 ` [PATCH v7 11/12] MAINTAINERS: add MAINTAINER for NXP SIUL2 NVMEM cell Andrei Stefanescu
2025-07-10 14:20 ` [PATCH v7 12/12] pinctrl: s32cc: set num_custom_params to 0 Andrei Stefanescu
2025-07-10 19:05 ` [PATCH v7 00/12] gpio: siul2-s32g2: add initial GPIO driver Rob Herring (Arm)

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