Linux kernel and device drivers for NXP i.MX platforms
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From: Larisa Ileana Grigore <larisa.grigore@oss.nxp.com>
To: sashiko-reviews@lists.linux.dev
Cc: conor+dt@kernel.org, robh@kernel.org, Frank.Li@kernel.org,
	imx@lists.linux.dev, devicetree@vger.kernel.org,
	linux-scsi@vger.kernel.org
Subject: Re: [PATCH v3 07/10] scsi: ufs: Add NXP S32N79 UFS host controller driver
Date: Thu, 17 Sep 2026 12:06:48 +0300	[thread overview]
Message-ID: <289dd7ff-023e-4220-b573-cf411f0faeda@oss.nxp.com> (raw)
In-Reply-To: <20260916090010.6C7111F00899@smtp.kernel.org>

On 9/16/2026 12:00 PM, sashiko-bot@kernel.org wrote:
> [You don't often get email from sashiko-bot@kernel.org. Learn why this is important at https://aka.ms/LearnAboutSenderIdentification ]
> 
> Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
> - [High] pm: positive return in ufs_s32n7_link_startup_notify() causes unclocked access
> - [Low] pm: missing pm_sleep_ptr() wrapper for .prepare and .complete callbacks
> --
> 
> commit 774c9ff68bb8216bae4f82205ba8ce70b0364e59
> Author: Larisa Grigore <larisa.grigore@oss.nxp.com>
> 
> scsi: ufs: Add NXP S32N79 UFS host controller driver
> 
> This commit adds support for the UFS host controller on the NXP S32N79 SoC,
> built on the Synopsys DesignWare (DWC) UFS architecture. It implements
> S32N79-specific initialization sequences before link startup and applies
> post-link calibration for HS operation.
> 
>> diff --git a/drivers/ufs/host/ufs-nxp-s32n7.c b/drivers/ufs/host/ufs-nxp-s32n7.c
>> new file mode 100644
>> index 0000000000000..4f9a001562024
>> --- /dev/null
>> +++ b/drivers/ufs/host/ufs-nxp-s32n7.c
> 
> [ ... ]
> 
>> +static int ufs_s32n7_link_startup_notify(struct ufs_hba *hba,
>> +                          enum ufs_notify_change_status status)
>> +{
>> +     int err;
>> +
>> +     if (status == PRE_CHANGE) {
>> +             err = ufs_s32n7_link_startup_pre_change(hba);
>> +             if (err) {
>> +                     dev_err(hba->dev, "MPHY setup failed (%d).\n", err);
>> +                     return err;
>> +             }
>> +             return 0;
>> +     }
>> +
>> +     /* POST_CHANGE */
>> +     err = ufshcd_dwc_link_is_up(hba);
>> +     if (err) {
>> +             dev_err(hba->dev, "Link is not up.\n");
>> +             return err;
> 
> [Severity: High]
> Could this propagate a positive return value on failure?
> 
> When ufshcd_dwc_link_is_up() fails, it returns 1. If this positive value is
> returned here, it will propagate up through ufshcd_link_startup() and
> ufshcd_resume() to ufshcd_runtime_resume().
> 
> The PM core's rpm_resume() will treat the positive return value as a failure,
> marking the device as RPM_SUSPENDED, but will propagate the positive 1
> back to callers of pm_runtime_get_sync().
> 
> Since callers typically check for failure using a ret < 0 condition, they
> will assume the device successfully resumed and proceed to access unclocked
> or powered-off hardware registers. This can cause a system crash or bus hang.
> 

Will address it in V4.

>> +     }
>> +
>> +     err = ufs_s32n7_link_startup_post_change(hba);
> 
> [ ... ]
> 
>> +static const struct dev_pm_ops ufs_s32n7_pm_ops = {
>> +     SYSTEM_SLEEP_PM_OPS(ufshcd_system_suspend, ufshcd_system_resume)
>> +     RUNTIME_PM_OPS(ufshcd_runtime_suspend, ufshcd_runtime_resume, NULL)
>> +     .prepare        = ufshcd_suspend_prepare,
>> +     .complete       = ufshcd_resume_complete,
> 
> [Severity: Low]
> Should these sleep callbacks be wrapped with pm_sleep_ptr()?
> 
> The power management subsystem guidelines require sleep callbacks like
> .prepare and .complete to be wrapped in pm_sleep_ptr() to prevent them
> from becoming dead code when CONFIG_PM_SLEEP is disabled.
> 
> Assigning them unconditionally can cause minor memory bloat and potential
> compiler warnings due to unused symbols being retained.
> 
ufshcd_suspend_prepare and ufshcd_resume_prepare are not guarded by 
CONFIG_PM_SLEEP so this is a false positive.

>> +};
>> +
>> +static struct platform_driver ufs_s32n7_driver = {
> 
> [ ... ]
> 
> --
> Sashiko AI review · https://sashiko.dev/#/patchset/20260916084411.941297-1-larisa.grigore@oss.nxp.com?part=7


  parent reply	other threads:[~2026-09-17  9:06 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-16  8:44 [PATCH v3 00/10] Add S32N79RDB UFS support Larisa Grigore
2026-09-16  8:44 ` [PATCH v3 01/10] ufs: unipro: Move Tx/Rx FSM state definitions to unipro.h Larisa Grigore
2026-09-16 16:14   ` Frank Li
2026-09-17  9:00     ` Larisa Ileana Grigore
2026-09-16  8:44 ` [PATCH v3 02/10] ufs: unipro: Add TX/RX FSM state attributes Larisa Grigore
2026-09-16  8:44 ` [PATCH v3 03/10] ufs: host: Add common Hibern8 TX FSM polling helper Larisa Grigore
2026-09-16 16:22   ` Frank Li
2026-09-17  9:00     ` Larisa Ileana Grigore
2026-09-16  8:44 ` [PATCH v3 04/10] scsi: ufs: Move Versal2 M-PHY CREG access helpers into ufshcd-dwc Larisa Grigore
2026-09-16 16:29   ` Frank Li
2026-09-16  8:44 ` [PATCH v3 05/10] scsi: ufs: dwc: Export common clock divider and link status helpers Larisa Grigore
2026-09-16  8:44 ` [PATCH v3 06/10] dt-bindings: ufs: Add NXP S32N79 UFS host controller Larisa Grigore
2026-09-16 16:34   ` Frank Li
2026-09-16  8:44 ` [PATCH v3 07/10] scsi: ufs: Add NXP S32N79 UFS host controller driver Larisa Grigore
2026-09-16  9:00   ` sashiko-bot
2026-09-16 16:36     ` Frank Li
2026-09-17  9:01       ` Larisa Ileana Grigore
2026-09-17  9:06     ` Larisa Ileana Grigore [this message]
2026-09-16  8:44 ` [PATCH v3 08/10] arm64: dts: freescale: s32n79: Add UFS host controller Larisa Grigore
2026-09-16  8:44 ` [PATCH v3 09/10] arm64: dts: freescale: s32n79-rdb: Enable UFS Larisa Grigore
2026-09-16  8:44 ` [PATCH v3 10/10] MAINTAINERS: Add NXP S32N7 UFS host controller entry Larisa Grigore

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