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From: Liu Ying <victor.liu@nxp.com>
To: Marek Vasut <marex@nabladev.com>, Marco Felsch <m.felsch@pengutronix.de>
Cc: Laurentiu Palcu <laurentiu.palcu@oss.nxp.com>,
	imx@lists.linux.dev, Andrzej Hajda <andrzej.hajda@intel.com>,
	Neil Armstrong <neil.armstrong@linaro.org>,
	Robert Foss <rfoss@kernel.org>,
	Laurent Pinchart <Laurent.pinchart@ideasonboard.com>,
	Jonas Karlman <jonas@kwiboo.se>,
	Jernej Skrabec <jernej.skrabec@gmail.com>,
	David Airlie <airlied@gmail.com>, Simona Vetter <simona@ffwll.ch>,
	Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
	Maxime Ripard <mripard@kernel.org>,
	Thomas Zimmermann <tzimmermann@suse.de>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>, Marek Vasut <marex@denx.de>,
	dri-devel@lists.freedesktop.org, Frank Li <Frank.Li@nxp.com>,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v8 1/9] dt-bindings: display: fsl,ldb: Add i.MX94 LDB
Date: Mon, 23 Mar 2026 15:22:35 +0800	[thread overview]
Message-ID: <2fe36f04-97d3-4e99-97e9-7a3ac53cffdb@nxp.com> (raw)
In-Reply-To: <4e75f1d3-29ff-46a2-adb5-78a08f781834@nabladev.com>

On Sat, Mar 21, 2026 at 03:37:47AM +0100, Marek Vasut wrote:
> On 3/20/26 9:23 AM, Marco Felsch wrote:
> 
> Hello Marco,
> 
>>> The LDB driver was always written with parsing 'reg' out of the DT, so
>>
>> Not sure what you mean by always.
> 
> By always, I mean since the very beginning.

Marek, your below patch is not accepted(at least for now).  In that patch,
register offset(s) are directly parsed by calling of_property_read_reg().
Without that patch, register offset(s) are determined via device data in
driver according to compatible string.

[PATCH v3] drm/bridge: fsl-ldb: Parse register offsets from DT
https://lore.kernel.org/all/20260104213712.128982-1-marek.vasut@mailbox.org/

[...]

> 
>>> encoding the register offsets into the driver was a mistake. The LDB
>>> controls two registers, which can be comfortably described in DT.
>>
>> Sorry but I have to disagree on this. It's no about if it's possible,
>> it's about if the abstraction is correct and IMHO the LDB is just one
>> subdevice of the syscon. For i.MX6SX the syscon is the iomuxc-gpr for
>> the i.MX8M and i.MX9 this is now a blkctrl.
> 
> Right, and the "reg" DT property specifies at which offsets are the LDB
> control registers from the start of that blkctrl. What is the problem
> with that ?

The problem is that ...

> 
> Look at e.g. imx8mp.dtsi as an example with blkctrl and LDB as a subnode
> with "reg" DT properties:
> 
> 1938                         media_blk_ctrl: blk-ctrl@32ec0000 {
> 1939                                 compatible = "fsl,imx8mp-media-blk-ctrl",
> 1940                                              "syscon";
> ...
> 2003                                 lvds_bridge: bridge@5c {
> 2004                                         compatible = "fsl,imx8mp-ldb";
> 2005                                         reg = <0x5c 0x4>, <0x128 0x4>;
> 2006                                         reg-names = "ldb", "lvds";

... i.MX8MP LVDS bridge node is fine with the reg property, but the property
is not allowed for i.MX93 LVDS bridge node according to commit[1] while
commit[2] requires the property for all LVDS bridge nodes.  See the contradict
here?

[1] 3feaa4342637 dt-bindings: soc: imx93-media-blk-ctrl: Add PDFC subnode to schema and example
[2] 8aa2f0ac08d3 dt-bindings: display: bridge: ldb: Add check for reg and reg-names

To avoid the contradict, how about requiring the reg property only for i.MX6SX
and i.MX8MP LVDS bridge nodes and making it kind of optional for i.MX93 and
i.MX94 LVDS bridge nodes?  Overall, in terms of the reg property, I feel the
LVDS bridge nodes look similar to reg-mux/mmio-mux(See reg-mux.yaml) where
the property is optional.  BTW, there is a mux-controller node with 'mmio-mux'
compatible string in i.MX8mq syscon@30340000:

iomuxc_gpr: syscon@30340000 {
	compatible = "fsl,imx8mq-iomuxc-gpr", "syscon", "simple-mfd";
	reg = <0x30340000 0x10000>;

	mux: mux-controller {
		compatible = "mmio-mux";
		#mux-control-cells = <1>;
		mux-reg-masks = <0x34 0x00000004>; /* MIPI_MUX_SEL */
	};
};

We never know if HW designer would put a mux-controller next to a LVDS
bridge under a syscon device like gpr or blk-ctrl in future i.MX SoCs,
so the optional reg property would buy us some flexibility.

The below patch is what I propose together with a Fixes tag for commit[2].
Since commit[2] is not in v6.19 and v7.0-rc5 was just released, it seems
that we have time to land the proposal fix if it makes sense.  WDYT?

--- a/Documentation/devicetree/bindings/display/bridge/fsl,ldb.yaml
+++ b/Documentation/devicetree/bindings/display/bridge/fsl,ldb.yaml
@@ -28,6 +28,7 @@ properties:
     const: ldb
 
   reg:
+    minItems: 1
     maxItems: 2
 
   reg-names:
@@ -68,7 +69,6 @@ required:
   - compatible
   - clocks
   - ports
-  - reg
 
 allOf:
   - if:
@@ -83,12 +83,23 @@ allOf:
         ports:
           properties:
             port@2: false
+
   - if:
-      not:
-        properties:
-          compatible:
-            contains:
-              const: fsl,imx6sx-ldb
+      properties:
+        compatible:
+          contains:
+            enum:
+              - fsl,imx6sx-ldb
+              - fsl,imx8mp-ldb
+    then:
+      required:
+        - reg
+
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: fsl,imx8mp-ldb
     then:
       required:
         - reg-names

-- 
Regards,
Liu Ying

  reply	other threads:[~2026-03-23  7:21 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-03-04 11:34 [PATCH v8 0/9] Add support for i.MX94 DCIF Laurentiu Palcu
2026-03-04 11:34 ` [PATCH v8 1/9] dt-bindings: display: fsl,ldb: Add i.MX94 LDB Laurentiu Palcu
2026-03-06  7:44   ` Liu Ying
2026-03-06  8:46     ` Marco Felsch
2026-03-19  8:57       ` Laurentiu Palcu
2026-03-19 14:38         ` Marek Vasut
2026-03-20  8:23           ` Marco Felsch
2026-03-21  2:37             ` Marek Vasut
2026-03-23  7:22               ` Liu Ying [this message]
2026-03-25  8:02                 ` Laurentiu Palcu
2026-03-25 12:51                   ` Marek Vasut
2026-03-27 23:17                 ` Marek Vasut
2026-03-04 11:34 ` [PATCH v8 2/9] drm/bridge: fsl-ldb: Get the next non-panel bridge Laurentiu Palcu
2026-03-06  7:36   ` Liu Ying
2026-03-10 11:34     ` Luca Ceresoli
2026-03-10 11:53       ` Luca Ceresoli
2026-03-04 11:34 ` [PATCH v8 3/9] drm/bridge: fsl-ldb: Add support for i.MX94 Laurentiu Palcu
2026-03-06  8:15   ` Liu Ying
2026-03-04 11:34 ` [PATCH v8 4/9] dt-bindings: display: imx: Add i.MX94 DCIF Laurentiu Palcu
2026-03-04 11:34 ` [PATCH v8 5/9] drm/imx: Add support for " Laurentiu Palcu
2026-03-04 11:34 ` [PATCH v8 6/9] dt-bindings: clock: nxp,imx95-blk-ctl: Add ldb child node Laurentiu Palcu
2026-03-06  8:17   ` Liu Ying
2026-03-04 11:34 ` [PATCH v8 7/9] arm64: dts: imx943: Add display pipeline nodes Laurentiu Palcu
2026-03-06  8:27   ` Liu Ying
2026-03-04 11:34 ` [PATCH v8 8/9] arm64: dts: imx943-evk: Add display support using IT6263 Laurentiu Palcu
2026-03-06  8:45   ` Liu Ying
2026-03-04 11:34 ` [PATCH v8 9/9] MAINTAINERS: Add entry for i.MX94 DCIF driver Laurentiu Palcu

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