From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4A02D1E1E16; Sun, 24 May 2026 18:20:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779646858; cv=none; b=JDnl0XfPW5rPZPA2jL050i/FrlqbH6HOxGP6ycE96aS4Yi0zmR+HSfT8CJpG0RaLfn/xN1dhyuGz+EDpEZZI4qHv20vWHDhqKSa3YXFqXFdykKNEWFo8ig3Fz1CgB68kTkKm0KSP1FHeYk500mdc2v973gW3r84MFTCJ1VXu+Lw= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779646858; c=relaxed/simple; bh=1lOzmvtqA2Sa8jOHX43PmPT+2J9Ysw9MUcZ4ZGJmxW8=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=WBzoKIRNL3focLjmMIF92wP7IV8/r3Tk25O8ZdqHhU2VrlhHgW+HnuAptkDO6kNHsQ7xnpnx6IevJNDj4OQbuQneZirKeQk1JNBRNq4qL+RDCAEwtGxNzlg4FkyKvvh3G2bSqbR2MYwchuFkKfamQSBu04DYMjJk6lXr8tg1rog= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=amOuWBZR; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="amOuWBZR" Received: by smtp.kernel.org (Postfix) with ESMTPSA id A3D8C1F000E9; Sun, 24 May 2026 18:20:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1779646856; bh=ti+0QCXGT7ETl1POeyETi1M8HN2lZW4xpw/OVCjE8eQ=; h=Date:Subject:To:Cc:References:From:In-Reply-To; b=amOuWBZRkpbbzWRXSo0gLh2BW8aM/+huZFF2HgwpnPIrHiaifu58+cgFfxhkF4Yu9 4tjk0xP50i8CFEvfYatq3JDxwCU7iykVppJ/J1PD5sD7WMqceQ0YtJhWw36nQTdFxF rEp77CXtuolc9w+Gcc+YkxFjC3WnAt0U9VWh5Y4QsOHBMryussGc2P09HAdmAuAM56 znOWGWHlv/Q9JcIRiqSdAUKHZFQUtaxuKOJLBjj4Q7YwRb4VYtWE8Seiu22Gqw0h2D HVMbttNmUIiRokX5YHhFZLOoU6u0/5xCymzbnz+Wg4HV6KEh/c1PGtP1UXD/dNuFnz OlRdFgjSuZykQ== Message-ID: <74eb56fb-546d-4b2c-9bbc-01a40937f5d3@kernel.org> Date: Sun, 24 May 2026 20:20:52 +0200 Precedence: bulk X-Mailing-List: imx@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/5] dt-bindings: connector: Add fsl,io-connector binding To: Frank Li Cc: "Chancel Liu (OSS)" , Chancel Liu , "robh@kernel.org" , "krzk+dt@kernel.org" , "conor+dt@kernel.org" , "s.hauer@pengutronix.de" , "festevam@gmail.com" , "mturquette@baylibre.com" , "sboyd@kernel.org" , "kernel@pengutronix.de" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "imx@lists.linux.dev" , "linux-arm-kernel@lists.infradead.org" , "linux-clk@vger.kernel.org" References: <20260509024846.2094049-1-chancel.liu@nxp.com> <20260509024846.2094049-3-chancel.liu@nxp.com> <20260515-resourceful-singing-roadrunner-ce25ec@quoll> <20260519-macho-degu-from-nibiru-960af2@quoll> From: Krzysztof Kozlowski Content-Language: en-US Autocrypt: addr=krzk@kernel.org; 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charset=UTF-8 Content-Transfer-Encoding: 8bit On 20/05/2026 16:33, Frank Li wrote: > On Wed, May 20, 2026 at 09:08:42AM +0200, Krzysztof Kozlowski wrote: >> On 20/05/2026 07:02, Chancel Liu (OSS) wrote: >>>>>>>>> +description: >>>>>>>>> + The NXP I/O connector represents a physically present I/O >>>>>>>>> +connector on the >>>>>>>>> + base board. It acts as a nexus that exposes a constrained set >>>> of >>>>>>>>> +I/O >>>>>>>>> + resources, such as GPIOs, clocks, PWMs and interrupts, through >>>>>>>>> +fixed >>>>>>>>> + electrical wiring. All actual hardware providers reside on the >>>> base >>>>>> board. >>>>>>>>> + The connector node only defines index-based mappings to those >>>>>>>> providers. >>>>>>>>> + >>>>>>>>> +properties: >>>>>>>>> + compatible: >>>>>>>>> + const: fsl,io-connector >>>>>>>> >>>>>>>> Everything is IO. Everything is connector, so your compatible does >>>>>>>> not match requirements from writing bindings. >>>>>>>> >>>>>>> >>>>>>> Yes, this compatible is too generic. I will rename the compatible to >>>>>>> fsl,aud-io-connector. >>>>>> >>>>>> aud is not much better. Which boards have it? What's the pinout? >>>> What's >>>>>> standard? Is it described anywhere? If so, provide reference to >>>> spec/docs. >>>>>> >>>>> >>>>> This is not an industry standard electrical interface. This connector >>>> >>>> Then if you do not have standard, then you have board specific layouts >>>> thus you need board-specific compatibles. You can use fallbacks. Generic >>>> fallback could work, but both io-connector and aud-io-connector are just >>>> too generic. Every connector is "connector" and "io", thus absolutely >>>> anything can be "io-connector". "aud" improves it only a bit, thus >>>> honestly I would go with board specific fallback as well. >>>> >>> >>> How about board specific + common fallback compatible like this: >>> compatible: >>> items: >>> - enum: >>> - fsl,imx95-19x19-evk-aud-io-connector >>> - fsl,imx952-evk-aud-io-connector >>> - const: fsl,imx-aud-io-connector >>> Since the daughter board is named “IMX-AUD-IO” in publicly available >> >> I don't think it is named like that. >> >> git grep -i imx-aud-io >> >>> documentation, common compatible clearly indicates that this connector >>> is intended for that. >>> >>> Also, I want to talk about the topic of generic connector. It's a common >>> design that daughter board is connected to base board through a >>> connector. This connector more often acts as a nexus that exposes a >>> constrained subset of GPIO, clock, PWM and interrupt resources to the >>> daughter board. Can we document this kind of connector as a generic >>> binding? >> >> So this binding is the connector between carrier and some addon? Then >> you don't get a compatible for that at all, because it is not necessary, >> not useful and NEVER used. Do you see socket LGA "connector" bindings? No. > > Not exactly. Any connector connects a carrier board with an add-on board. > The key point here is that this connector type is reused across different > boards, even though it is not an industry-standard connector. Both the > signal definitions and the mechanical layout are defined. > > The same add-on boards can therefore be reused across different base boards > that use this type of connector. > > There are also GPIO mappings involved. For example, pin 1 on the connector > may represent reset-gpios, but it could be connected to GPIO0 on board A > and GPIO1 on board B. > > Without a connector definition layer, this would create an N × M > combination problem. The Nexus node discussion already covered this topic: > https://osseu2025.sched.com/event/25Vrw > > An LGA socket is a CPU socket, where the signals are completely transparent > to software, so it is not a good comparison. A PCIe M.2 Key-M/E connector > would be a more appropriate comparison. > So the terminology of daughter and carrier boards was confusing. If this is a hat, mezzanine or other addon, it's fine. I still insist on board specific compatibles - fallback and specific. Best regards, Krzysztof